CN211404494U

CN211404494U - Chip package made of metal material

Info

Publication number: CN211404494U
Application number: CN201921869503.7U
Authority: CN
Inventors: 朱道田; 黄明
Original assignee: Jiangsu Yunhonghui Electronic Technology Co ltd
Current assignee: Jiangsu Yunhonghui Electronic Technology Co ltd
Priority date: 2019-11-01
Filing date: 2019-11-01
Publication date: 2020-09-01
Anticipated expiration: 2029-11-01

Abstract

The utility model belongs to the technical field of the chip package, especially, be a chip package of metal material, including the upper end packaging body, upper end packaging body bottom fixedly connected with lower extreme packaging body, the filling opening has been seted up to fixed surface on the packaging body of upper end, the side obturator has been seted up to the external fixed surface of lower extreme packaging body, pin weld joint has been seted up to the external surface of upper end packaging body, the inside fixed filling groove that is provided with of lower extreme packaging body, welding passageway has been seted up to lower extreme packaging body upper surface one end, the inside fixedly connected with base plate of filling groove, the external fixed surface of upper end packaging body is connected with PVC protecting sheathing, PVC protecting sheathing bottom fixedly connected with. The utility model discloses a set up a novel chip package device, effectively avoid the chip to receive external electromagnetic interference in packaging process, for the chip provides good encapsulation environment, adopt dual filling mode simultaneously, improved chip package's efficiency, improved the qualification rate of chip, reduced manufacturing cost.

Description

Chip package made of metal material

Technical Field

The utility model relates to a chip package technical field specifically is a chip package of metal material.

Background

The chip package is a housing for mounting a semiconductor integrated circuit chip, and has functions of mounting, fixing, sealing, protecting the chip, and enhancing the electrothermal performance. The chip package is a bridge for communicating the internal world of the chip with an external circuit, the connection point of the chip is connected to the pin of the package shell by a lead, and the pin is connected with other devices by the lead on the printed board; the package plays an important role in CPU and other LSI integrated circuits, the pin number is increased, the pin pitch is reduced, the weight is reduced, the reliability is improved, and the use is more convenient. As is well known for CPUs 286, 386, 486, Pentium, PII, Celeron, K6, K6-2, Athlon … … believe you can list a long string as in the family of several precious. But not necessarily many people are aware of the packaging of CPUs and other large scale integrated circuits. The package is a package for mounting a semiconductor integrated circuit chip, which not only plays a role of mounting, fixing, sealing, protecting the chip and enhancing heat conduction performance, but also is a bridge for communicating the internal world of the chip with an external circuit, i.e., a contact on the chip is connected to pins of the package by wires, and the pins are connected with other devices by wires on a printed circuit board. Therefore, the package plays an important role for both the CPU and other LSI (large scale integration-on) integrated circuits, and the emergence of new generation CPUs is often accompanied by the use of new package forms. The chip packaging technology has undergone several generations of changes, from DIP, QFP, PGA, BGA, to CSP to MCM, the technology index generation is more advanced than the generation, including the ratio of the chip area to the packaging area is closer to 1, the applicable frequency is higher and higher, and the temperature resistance is better and better. The number of pins is increased, the pin pitch is reduced, the weight is reduced, the reliability is improved, the use is more convenient, and the like.

There are the following problems:

the existing chip packaging belongs to high-precision operation, the interference of various external factors needs to be shielded, and the internal signal of the chip is changed due to the fact that the chip is easily interfered by external electromagnetic signals before being packaged, so that the chip is out of work, the production cost is improved, and the qualified rate of the packaged chip is reduced.

SUMMERY OF THE UTILITY MODEL

The utility model provides a not enough to prior art, the utility model provides a chip package of metal material has solved the interference of shielding external various factors, because the chip receives external electromagnetic signal's interference easily before not encapsulating, leads to chip internal signal to change, causes the chip to become invalid, has improved manufacturing cost, has reduced the problem of encapsulation back chip qualification rate.

In order to achieve the above object, the utility model provides a following technical scheme: the utility model provides a chip package of metal material, includes the upper end packaging body, upper end packaging body bottom fixedly connected with lower extreme packaging body, fixed surface has seted up the filling opening on the packaging body of upper end, the external fixed surface of lower extreme packaging body has seted up the side filling body, pin welding mouth has been seted up to the external surface of upper end packaging body, the inside fixed filling groove that is provided with of lower extreme packaging body, welding passageway has been seted up to lower extreme packaging body upper surface one end, the inside fixedly connected with base plate of filling groove, the external fixed surface of upper end packaging body is connected with PVC protecting sheathing, PVC protecting sheathing bottom fixedly connected with electromagnetic shield layer, electromagnetic shield layer bottom fixedly connected with high temperature resistant insulating layer, base plate bottom fixed mounting has the supporter.

As an optimal technical scheme of the utility model, fill inslot portion surface and laid high temperature resistant material, the base plate height is highly unanimous with the welding passageway.

As an optimized technical scheme of the utility model, PVC protecting sheathing's material is PVC plastic material, the metal mesh grid that forms is woven for using beryllium copper silk, Monel silk to the electromagnetic shield layer.

As an optimized technical scheme of the utility model, the supporter is connected with surface fixed in the filling groove, the base plate activity is placed in the supporter upper end.

As an optimized technical scheme of the utility model, the quantity of welding passageway is a plurality of groups, the welding passageway is linear array arrangement at lower extreme packaging body upper surface.

As a preferred technical scheme of the utility model, the side obturator communicates with each other with the inside filling groove of lower extreme encapsulation body, the filler opening communicates with each other through the inside filling groove of upper end encapsulation body and lower extreme encapsulation body.

As an optimal technical scheme of the utility model, electromagnetic shield layer, high temperature resistant insulating layer are through inlaying with PVC protecting sheathing bottom fixed connection, the quantity of pin welding mouth is two sets of, pin welding mouth is axial symmetry about the vertical center line of lower extreme packaging body.

Compared with the prior art, the utility model provides a chip package of metal material possesses following beneficial effect:

this chip package of metal material through setting up a novel chip package device, effectively avoids the chip to receive external electromagnetic interference in packaging process, for the chip provides good encapsulation environment, adopts dual filling mode simultaneously, has improved chip package's efficiency, has improved the qualification rate of chip, has reduced manufacturing cost.

Drawings

FIG. 1 is a schematic structural view of the present invention;

FIG. 2 is a schematic view of the packaging structure of the present invention;

FIG. 3 is a schematic view of the internal structure of the housing of the present invention;

fig. 4 is a schematic diagram of the internal structure of the package of the present invention.

In the figure: 1. an upper end package; 2. a lower end package; 3. a fill port; 4. a side filling body; 5. a pin welding port; 6. filling the groove; 7. welding a channel; 8. a substrate; 9. a PVC protective housing; 10. an electromagnetic shielding layer; 11. a high temperature resistant insulating layer; 12. and a support body.

Detailed Description

The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative work belong to the protection scope of the present invention.

Referring to fig. 1-4, in this embodiment: a chip package made of metal materials comprises an upper end package body 1, wherein the bottom end of the upper end package body 1 is fixedly connected with a lower end package body 2, the upper surface of the upper end package body 1 is fixedly provided with a filling port 3, the outer surface of the lower end package body 2 is fixedly provided with a side surface filling body 4, the outer surface of the upper end package body 1 is provided with a pin welding port 5, the inner part of the lower end package body 2 is fixedly provided with a filling groove 6, one end of the upper surface of the lower end package body 2 is provided with a welding channel 7, the inner part of the filling groove 6 is fixedly connected with a substrate 8, the outer surface of the upper end package body 1 is fixedly connected with a PVC protective shell 9, the bottom of the PVC protective shell 9 is fixedly connected with an electromagnetic shielding layer 10; the electromagnetic shielding layer 10 and the high-temperature-resistant insulating layer 11 effectively protect the chip from being interfered by external electromagnetic signals, the supporting body 12 plays a role in supporting and packaging the chip, and the chip is filled with packaging materials through the filling port 3 and the side surface filling body 4.

In this embodiment, a high temperature resistant material is laid on the inner surface of the filling groove 6, the height of the substrate 8 is the same as that of the welding channel 7, the PVC protective casing 9 is made of PVC plastic, the electromagnetic shielding layer 10 is a metal mesh woven by beryllium copper wire and Monel wire, the support 12 is fixedly connected with the inner surface of the filling groove 6, the substrate 8 is movably placed on the upper end of the support 12, the number of the welding channels 7 is a plurality of groups, the welding channels 7 are arranged in a linear array on the upper surface of the lower end package 2, the side surface fillers 4 are communicated with the filling groove 6 inside the lower end package 2, the filling port 3 is communicated with the filling groove 6 inside the lower end package 2 through the upper end package 1, the electromagnetic shielding layer 10, the high-temperature-resistant insulating layer 11 is fixedly connected with the bottom of the PVC protective shell 9 through embedding, the number of the pin welding ports 5 is two, and the pin welding ports 5 are axially symmetrical relative to the vertical center line of the lower end packaging body 2; the packaged chip is kept in a horizontal state, the qualification rate of chip packaging is improved, and the chip is effectively protected due to the electromagnetic shielding layer 10 and the high-temperature-resistant insulating layer 11 which are arranged inside the upper end packaging body 1.

The utility model discloses a theory of operation and use flow: the chip packaging method comprises the steps that firstly, chip pins needing to be welded are placed in a welding channel 7 through a pin welding port 5, the chips are horizontally aligned and placed on the upper surface of a substrate 8, the pins are connected with the chips through precise welding, meanwhile, an upper end packaging body 1 is aligned to a lower end packaging body 2 to enable the upper end packaging body 1 and the lower end packaging body 2 to be closed, chip packaging materials are filled into the lower end packaging body 2 through a side surface filling body 4 and a filling port 3, when packaging is completed, the upper end packaging body 1 is taken away, leftover materials of the packaged chips are taken out, packaging of the whole chips is completed, due to an electromagnetic shielding layer 10 and a high-temperature-resistant insulating layer 11 which are arranged inside the upper end packaging body 1, the chips are effectively protected, interference of external electromagnetism in the packaging process is avoided, chip packaging efficiency is improved, the qualification rate of the chips is improved, and production cost is reduced.

Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described in the foregoing embodiments, or equivalents may be substituted for elements thereof. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. The utility model provides a chip package of metal material, includes upper end packaging body (1), its characterized in that: the bottom end of the upper end packaging body (1) is fixedly connected with a lower end packaging body (2), the upper surface of the upper end packaging body (1) is fixedly provided with a filling opening (3), the outer surface of the lower end packaging body (2) is fixedly provided with a side surface filling body (4), the outer surface of the upper end packaging body (1) is provided with a pin welding port (5), the inner part of the lower end packaging body (2) is fixedly provided with a filling groove (6), one end of the upper surface of the lower end packaging body (2) is provided with a welding channel (7), a substrate (8) is fixedly connected inside the filling groove (6), a PVC protective shell (9) is fixedly connected on the outer surface of the upper end packaging body (1), the bottom of the PVC protective shell (9) is fixedly connected with an electromagnetic shielding layer (10), the bottom of the electromagnetic shielding layer (10) is fixedly connected with a high-temperature-resistant insulating layer (11), and the bottom of the substrate (8) is fixedly provided with a supporting body (12).

2. The chip package of claim 1, wherein: high-temperature-resistant materials are laid on the inner surface of the filling groove (6), and the height of the base plate (8) is consistent with that of the welding channel (7).

3. The chip package of claim 1, wherein: the PVC protective shell (9) is made of PVC plastic, and the electromagnetic shielding layer (10) is a metal woven mesh woven by beryllium copper wires and Monel wires.

4. The chip package of claim 1, wherein: the supporting body (12) is fixedly connected with the inner surface of the filling groove (6), and the substrate (8) is movably arranged at the upper end of the supporting body (12).

5. The chip package of claim 1, wherein: the number of the welding channels (7) is a plurality of groups, and the welding channels (7) are arranged on the upper surface of the lower end packaging body (2) in a linear array mode.

6. The chip package of claim 1, wherein: the side surface filling body (4) is communicated with the filling groove (6) in the lower end packaging body (2), and the filling port (3) is communicated with the filling groove (6) in the lower end packaging body (2) through the upper end packaging body (1).

7. The chip package of claim 1, wherein: electromagnetic shield layer (10), high temperature resistant insulating layer (11) are through inlaying and PVC protecting sheathing (9) bottom fixed connection, the quantity of pin welding mouth (5) is two sets of, pin welding mouth (5) are axisymmetric about lower extreme packaging body (2) vertical center line.