CN211125630U - 一种高反压晶体管 - Google Patents

一种高反压晶体管 Download PDF

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CN211125630U
CN211125630U CN202020216874.1U CN202020216874U CN211125630U CN 211125630 U CN211125630 U CN 211125630U CN 202020216874 U CN202020216874 U CN 202020216874U CN 211125630 U CN211125630 U CN 211125630U
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pin
wafer
transistor
substrate
plastic package
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靳泽桂
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Shenzhen Zhichao Microelectronics Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

本实用新型公开了一种高反压晶体管,通过在晶体管的正面设有散热结构,结合晶体管的基板来实现对晶体管内部晶片的双侧高效散热,提高晶体管的工作性能,具体地,该高反压晶体管包括塑封壳体,塑封壳体内封装有基板,基板的下端具有伸出塑封壳体的第一管脚、第二管脚和第三管脚。基板的正面凹设一贴片区,其背面裸露于塑封壳体的背面。贴片区内设有晶片,晶片通过金线分别于第二管脚和第三管脚连接。贴片区内设有绝缘导热垫片,绝缘导热垫片的背面与晶片的表面接触。塑封壳体的正面设有容置槽,容置槽内设有散热铜片,散热铜片的背面与绝缘导热垫片接触。

Description

一种高反压晶体管
技术领域
本实用新型涉及半导体器件的技术领域,特别涉及一种高反压晶体管。
背景技术
高反压晶体管被广泛应用在节能灯、电子变压器、电源适配器、以及充电器等各类电子产品中。高反压晶体管的主要特点是:反向击穿电压高、放大小、电功率大。高反压晶体管的功率越大,其单位时间内产生的热量越大,由于现有的电子产品中的电路板上集成的电子元件基本都是通过散热片进行散热,但这种方式的散热方式对晶体管内部晶片的散热并不明显,不能解决晶体管内部晶片的散热问题。因此,当晶体管在工作一段时间后会烧毁晶体管,从而影响电子产品的正常使用。
实用新型内容
针对现有技术存在的问题,本实用新型的主要目的是提供一种高反压晶体管,旨在解决晶体管内部晶片的散热问题。
为实现上述目的,本实用新型提出的高反压晶体管,包括塑封壳体,所述塑封壳体内封装有基板,所述基板的下端具有伸出所述塑封壳体的第一管脚、第二管脚和第三管脚;所述基板的正面凹设一贴片区,其背面裸露于所述塑封壳体的背面;所述贴片区内设有晶片,所述晶片通过金线分别于第二管脚和第三管脚连接;
所述贴片区内设有绝缘导热垫片,所述绝缘导热垫片的背面与晶片的表面接触;
所述塑封壳体的正面设有容置槽,所述容置槽内设有散热铜片,所述散热铜片的背面与所述绝缘导热垫片接触。
优选地,所述绝缘导热垫片为硅胶片。
优选地,所述散热铜片的正面设置有若干均匀排列的散热鳍片。
所述晶片与所述贴片区之间的留空区域内填充有导热硅脂。
优选地,所述基板为铝制基板。
本实用新型的技术方案通过在晶体管基板的正面设置凹槽,将晶片设置在该凹槽内,并在凹槽内设置绝缘导热垫片,并在塑封壳体的正面设置散热铜片,通过绝缘导热垫片将晶片正面的热量导出到散热铜片上,再通过铜片将热量导出,而晶片背面热量则直接通过基板散发出去。由此,通过从晶片的两面进行散热,可以有效将晶体管内部晶片在工作时产生的热量散发出去,从而有效避免晶体管内部过热导致器件损坏,进而提高晶体管的工作性能。
附图说明
图1为本实用新型高反压晶体管一实施例的结构示意图;
图2为本实用新型高反压晶体管一实施例的分解示意图;
图3为本实用新型高反压晶体管另一实施例的结构示意图。
附图标号中:100-塑封壳体,100a-容置槽;200-基板,200a-第一管脚,200b-第二管脚,200c-第三管脚,200d-凹槽,210-晶片,220-导热硅脂;300-绝缘导热垫片;400-散热铜片,400a-散热鳍片。
具体实施方式
下面将结合本实用新型实施例中的中附图,对本发明实施例中的技术方案进行清除、完整的描述,显然,所描述的实施例仅仅是本实用新型一部分实施例,而不是全部的实施例。基于本实用新型中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本实用新型保护的范围。
请参阅说明书附图1-2,在本实用新型实施例提出了一种高反压晶体管,该高反压晶体管包括塑封壳体100,该塑封壳体100内封装有铝制基板200。基板200的下端具有伸出塑封壳体100的第一管脚200a、第二管脚200b和第三管脚200c,其中,第二管脚200b和第三管脚200c分为晶体管的输入管脚和输出管脚。基板200的正面凹设一凹槽200d作为贴片区,其背面裸露于塑封壳体100的背面。贴片区内设有晶片210,晶片210通过金线分别于第二管脚200b和第三管脚200c连接。
贴片区内设有绝缘导热垫片300,绝缘导热垫片300的背面与晶片210的表面接触。塑封壳体100的正面设有容置槽100a,该容置槽100a内设有散热铜片400,散热铜片400的背面与绝缘导热垫片300接触。
本实用新型的技术方案通过在晶体管基板200的正面设置凹槽200d,将晶片210设置在该凹槽200d内,并在凹槽200d内设置绝缘导热垫片300,并在塑封壳体100的正面设置散热铜片400,通过绝缘导热垫片300将晶片210正面的热量导出到散热铜片400上,再通过铜片将热量导出,而晶片210背面热量则直接通过基板200散发出去。由此,通过从晶片210的两面进行散热,可以有效将晶体管内部晶片210在工作时产生的热量散发出去,从而有效避免晶体管内部过热导致器件损坏,进而提高晶体管的工作性能。
在本实施例中,该绝缘导热垫片300为硅胶片,硅胶片的绝缘导热性能好,且价格便宜,便于控制生产成本。
进一步地,晶片210与贴片区之间的留空区域内填充有导热硅脂220。晶片210与贴片区的大小一般都会存在一定的留空区域,以便于晶片210的安装。而硅胶片很难填充到该留空区域,会导致这些留空区域存在空气,从而影响晶片210的整体散热。通过在晶片210与贴片区的留空区域填充导热硅脂220,可以有效保证晶片210的热量可以通过硅胶片传导至散热铜片400,再散发出去。
再进一步地,如图3所示,在上一实施例的基础上,在散热铜片400的正面设置若干均匀排列的散热鳍片。通过在散热铜片400上设置散热鳍片,可以增大散热铜片400的散热面积,提高散热铜片400的散热效果,进而将晶片210产生的热量快速散发出去。
以上所述仅为本实用新型的优选实施例,并不用以本实用新型,凡是依据本实用新型的技术实质对以上实施例所作的任何细微修改、等同替换和改进,均应包含在本实用新型技术方案的保护范围内。

Claims (5)

1.一种高反压晶体管,其特征在于,包括塑封壳体,所述塑封壳体内封装有基板,所述基板的下端具有伸出所述塑封壳体的第一管脚、第二管脚和第三管脚;所述基板的正面凹设一贴片区,其背面裸露于所述塑封壳体的背面;所述贴片区内设有晶片,所述晶片通过金线分别于第二管脚和第三管脚连接;
所述贴片区内设有绝缘导热垫片,所述绝缘导热垫片的背面与晶片的表面接触;
所述塑封壳体的正面设有容置槽,所述容置槽内设有散热铜片,所述散热铜片的背面与所述绝缘导热垫片接触。
2.如权利要求1所述的高反压晶体管,其特征在于,所述绝缘导热垫片为硅胶片。
3.如权利要求2所述的高反压晶体管,其特征在于,所述晶片与所述贴片区之间的留空区域内填充有导热硅脂。
4.如权利要求1所述的高反压晶体管,其特征在于,所述散热铜片的正面设置有若干均匀排列的散热鳍片。
5.如权利要求1-4任一项所述的高反压晶体管,其特征在于,所述基板为铝制基板。
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