CN210899888U

CN210899888U - Multilayer substrate and electronic device

Info

Publication number: CN210899888U
Application number: CN201890000453.6U
Authority: CN
Inventors: 伊藤慎悟
Original assignee: Murata Manufacturing Co Ltd
Current assignee: Murata Manufacturing Co Ltd
Priority date: 2017-03-06
Filing date: 2018-02-23
Publication date: 2020-06-30
Anticipated expiration: 2028-02-23
Also published as: WO2018163859A1

Abstract

The utility model provides a multilayer substrate and electronic equipment possesses a plurality of insulating substrate layers of range upon range of and the laminate that forms and the structure of forming the installation electrode at insulating substrate layer, when installing mounting substrate etc. can ensure the abundant joint strength to mounting substrate etc.. The multilayer substrate is provided with: a laminate having a mounting surface and formed by laminating a plurality of insulating base material layers including a first insulating base material layer and a second insulating base material layer; and a mounting electrode having a first surface and a second surface facing the first surface, the mounting electrode being formed on any one of the plurality of insulating base material layers, the mounting electrode being sandwiched between the first insulating base material layer and the second insulating base material layer such that the first surface faces the first insulating base material layer and the second surface faces the second insulating base material layer, the surface roughness of the first surface being larger than the surface roughness of the second surface, the first insulating base material layer having a base material layer non-formation portion in which a part of the first surface is exposed.

Description

Multilayer substrate and electronic device

Technical Field

The present invention relates to a multilayer substrate, and more particularly, to a multilayer substrate including a laminate formed by laminating a plurality of insulating substrate layers and a conductor pattern formed on the insulating substrate layers, and an electronic device including the multilayer substrate.

Background

Conventionally, a method of forming a laminate by laminating a plurality of insulating base material layers to the surfaces of which conductor patterns such as copper foils are attached is known.

For example, patent document 1 discloses a multilayer substrate in which a plurality of insulating base material layers having conductor patterns attached to the surfaces thereof are stacked, and the surface roughness of one main surface side of the conductor patterns attached to the insulating base material layers is made larger than the surface roughness of the other main surface side. With this configuration, the bonding strength of the conductor pattern to the insulating base layer can be improved.

Prior art documents

Patent document

Patent document 1: international publication No. 2014/115433

SUMMERY OF THE UTILITY MODEL

Problem to be solved by utility model

However, in the structure shown in patent document 1, the mounting surface of the mounting electrode for mounting the multilayer substrate to the mounting substrate or the like is the other main surface of the conductor pattern having a surface roughness relatively smaller than that of the one main surface. Therefore, the contact area of the mounting electrode with the conductive bonding material is small, high bonding strength cannot be obtained, and the multilayer substrate may be peeled off from the mounting substrate or the like after mounting.

An object of the present invention is to provide a multilayer substrate which can secure sufficient bonding strength to a mounting substrate and the like when mounted to the mounting substrate and the like in a structure including a laminate formed by laminating a plurality of insulating substrate layers and a mounting electrode formed on the insulating substrate layers.

Means for solving the problems

(1) The utility model discloses a multilayer substrate's characterized in that possesses:

a laminate having a mounting surface and formed by laminating a plurality of insulating base material layers including a first insulating base material layer and a second insulating base material layer; and

a mounting electrode having a first surface and a second surface opposite to the first surface, formed on any one of the plurality of insulating base material layers,

the mounting electrode is sandwiched between the first insulating substrate layer and the second insulating substrate layer such that the first surface is opposed to the first insulating substrate layer and the second surface is opposed to the second insulating substrate layer,

the surface roughness of the first face is greater than the surface roughness of the second face,

the first insulating base material layer has a base material layer non-formation portion exposing a part of the first surface.

In this configuration, the surface roughness of the first surface of the mounting electrode bonded to the mounting substrate or the like via the conductive bonding material is larger than the surface roughness of the second surface, and therefore the contact area of the mounting electrode with the conductive bonding material is larger than that in the case where the second surface of the mounting electrode is bonded to the mounting substrate or the like via the conductive bonding material. Therefore, with this configuration, the conductive bonding material and the mounting electrode can be bonded with high bonding strength, and peeling of the multilayer substrate from the mounting substrate or the like after mounting can be suppressed. Further, with this configuration, the conductor loss of the mount electrode can be reduced as compared with the case where the surface roughness of both the first surface and the second surface of the mount electrode is large.

In this configuration, a part of the mount electrode is sandwiched between the first insulating substrate layer and the second insulating substrate layer. Therefore, the mounting electrode can be made less likely to be peeled off from the laminate as compared with the case where the mounting electrode is formed on the surface of the laminate.

(2) Preferably, in the above (1), the first insulating substrate layer and the second insulating substrate layer are made of the same resin material. With this configuration, the difference in physical properties between the first insulating substrate layer and the second insulating substrate layer sandwiching a part of the mounting electrode is eliminated, and the bonding strength between the first insulating substrate layer and the second insulating substrate layer is improved. Therefore, peeling of the mount electrode from the multilayer substrate can be suppressed.

(3) Preferably, in the above (1) or (2), the mounting electrode does not reach an outer edge of the mounting surface when viewed from a direction in which the plurality of insulating base material layers are stacked. In the case where the mount electrode reaches the surface of the laminate (in the case where the mount electrode is exposed on the surface of the laminate), an external force is applied to the exposed portion of the mount electrode, whereby the mount electrode becomes easily peeled off from the multilayer substrate. On the other hand, in this structure, since the mount electrodes are not exposed from the outer edge (surface) of the mount surface of the laminate, peeling of the mount electrodes from the multilayer substrate due to application of an external force can be suppressed. Further, with this configuration, when the individual pieces are separated from the collective substrate, the mounting electrodes can be prevented from peeling off from the laminate due to stress applied to the end portions of the mounting electrodes.

(4) Preferably, in any one of the above (1) to (3), the first insulating base material layer covers more than half of an outer periphery of the first face. With this configuration, the mount electrode can be made less likely to be peeled off from the multilayer substrate, as compared with a case where the insulating base material layer covers less than half of the outer periphery of the first surface of the mount electrode.

(5) Preferably, in the above (4), the mounting electrode is disposed in the vicinity of an outer edge of the mounting surface as viewed from a direction in which the plurality of insulating base material layers are stacked, and the base material layer non-formation portion reaches the outer edge of the mounting surface as viewed from the direction in which the plurality of insulating base material layers are stacked. With this configuration, the solder fillet can be formed without increasing the mounting area of the multilayer board by the base material layer non-formation portion reaching the outer edge of the mounting surface. Therefore, the reliability of bonding to a mounting substrate or the like can be improved, and a multilayer substrate capable of high-density arrangement can be realized.

(6) The utility model discloses an electronic equipment's characterized in that possesses:

the multilayer substrate according to any one of the above (1) to (5); and

a mounting substrate is mounted on the substrate,

the first surface of the mounting electrode is bonded to the mounting substrate via a conductive bonding material.

With this configuration, the conductive bonding material and the mounting electrode can be bonded with high bonding strength, and an electronic device in which peeling of the multilayer substrate from the mounting substrate or the like after mounting is suppressed can be realized.

(7) The utility model discloses an electronic equipment's characterized in that possesses:

the multilayer substrate according to the above (4) or (5); and

a mounting substrate is mounted on the substrate,

the first surface of the mounting electrode is joined to the mounting substrate by forming a solder fillet.

With this configuration, it is possible to realize an electronic apparatus in which the reliability of bonding of the multilayer substrate to the mounting substrate or the like is improved without increasing the mounting area of the multilayer substrate.

Effect of the utility model

According to the present invention, in the structure including the laminate formed by laminating the plurality of insulating substrate layers and the mounting electrode formed on the insulating substrate layer, sufficient bonding strength to the mounting substrate or the like can be ensured when the multilayer substrate is mounted on the mounting substrate or the like.

Drawings

Fig. 1 is a perspective view of a multilayer substrate 101 according to the first embodiment.

Fig. 2(a) is a sectional view taken along line a-a in fig. 1, and fig. 2(B) is an exploded sectional view of the multilayer substrate 101.

Fig. 3 is a bottom view of the multilayer substrate 101.

Fig. 4 is a sectional view showing a main part of an electronic device 301 according to the first embodiment.

Fig. 5(a) to 5(D) are cross-sectional views sequentially showing the steps of manufacturing the multilayer substrate 101.

Fig. 6 is a perspective view of the multilayer substrate 102 according to the second embodiment.

Fig. 7(a) is a cross-sectional view B-B in fig. 6, and fig. 7(B) is a bottom view of the multilayer substrate 102.

Fig. 8 is a sectional view showing a main part of an electronic apparatus 302 according to the second embodiment.

Detailed Description

Hereinafter, a plurality of embodiments for carrying out the present invention will be described with reference to the drawings by way of a few specific examples. In the drawings, the same reference numerals are given to the same parts. The embodiments are separately shown for convenience in view of ease of explanation or understanding of the points, but partial replacement or combination of the structures shown in different embodiments can be made. In the second and subsequent embodiments, descriptions of common matters with the first embodiment will be omitted, and only differences will be described. In particular, the same operational effects based on the same structure will not be mentioned in each embodiment.

First embodiment

Fig. 1 is a perspective view of a multilayer substrate 101 according to the first embodiment. Fig. 2(a) is a sectional view taken along line a-a in fig. 1, and fig. 2(B) is an exploded sectional view of the multilayer substrate 101. Fig. 3 is a bottom view of the multilayer substrate 101. Fig. 2(a) and 2(B) exaggeratedly show the thickness of each insulating base material layer and the surface roughness of the mounting electrode. This is also true in the sectional views shown later. In fig. 3, in order to make the structure understandable, a portion exposed from the laminate is shown in a dot pattern on the first surface on which the electrode is mounted.

The multilayer substrate 101 includes a laminate 10A formed by laminating a plurality of insulating base material layers 11, 12, 13, 14, 15, mounting electrodes P1, P2, a plurality of

conductors

21, 22, 23, 24, 25, a plurality of interlayer connection conductors V1, V2, and the like.

The laminate 10A is a substantially rectangular parallelepiped made of a thermoplastic resin having a longitudinal direction aligned with the X-axis direction, and has a first main surface VS1 and a second main surface VS2 facing each other. The laminate 10A is formed by laminating a plurality of insulating base material layers 11, 12, 13, 14, and 15 in this order. Each of the plurality of insulating base material layers 11, 12, 13, 14, and 15 is a flat plate of thermoplastic resin having a rectangular planar outer shape. The insulating base material layers 11, 12, 13, 14, and 15 are resin sheets made of, for example, Liquid Crystal Polymer (LCP) or polyether ether ketone (PEEK).

The first main surface VS1 of the laminate 10A corresponds to the "mounting surface" in the present invention. In the present embodiment, the insulating base material layer 11 corresponds to the "first insulating base material layer" of the present invention, and the insulating base material layers 12, 13, 14, and 15 correspond to the "second insulating base material layer" of the present invention.

The mounting electrodes P1, P2 are rectangular conductors formed on any one of the insulating base material layers 11, 12, 13, 14, 15, and have a first surface S1 and a second surface facing each other. The mounting electrodes P1 and P2 are conductor patterns such as Cu foils, for example.

The surface roughness (Ra1) of the first surfaces S1A and S1B of the mounting electrodes P1 and P2 is greater than the surface roughness (Ra2) of the second surfaces S2A and S2B (Ra1 > Ra 2). The first surfaces S1A and S1B of the mounting electrode P1 have their surfaces roughened by, for example, sandblasting, plasma, plating, etching, or the like. The surface roughness of the first surfaces S1A and S1B is, for example, 0.5 μm, and the surface roughness of the second surfaces S2A and S2B is, for example, 0.2 μm. The surface roughness was estimated by using the standard (arithmetic mean roughness) specified in "JISB 0601-2001".

The mounting electrodes P1, P2 are sandwiched between the first insulating base material layer and the second insulating base material layer such that the first faces S1A, S1B face the first insulating base material layer (insulating base material layer 11), and the second faces S2A, S2B face the second insulating base material layer (insulating base material layer 12). As shown in fig. 3, the first insulating base material layer has rectangular base material layer non-formation sections NFP1 and NFP2 in which part of the first surfaces S1A and S1B is exposed.

In the present embodiment, the first insulating base material layer (see the insulating base material layer 11 in fig. 2 a) covers the entire outer peripheries of the first surfaces S1A and S1B, and as shown in fig. 3, the center portions of the first surfaces S1A and S1B are exposed from the laminate 10A.

In the present embodiment, the mounting electrodes P1, P2 are disposed near the outer edge of the first main surface (mounting surface) of the laminate 10A when viewed from the lamination direction (Z-axis direction) of the plurality of insulating base material layers 11, 12, 13, 14, 15. Specifically, the mounting electrode P1 is disposed near the first side of the mounting surface (the left side of the first main surface of the laminate 10A in fig. 3) as viewed in the Z-axis direction. Further, the mounting electrode P2 is disposed near the second side of the mounting surface (the right side of the first main surface of the laminate 10A in fig. 3) as viewed in the Z-axis direction. Further, in the present embodiment, the mounting electrodes P1, P2 do not reach the outer edge of the first main surface (mounting surface) when viewed from the Z-axis direction.

The plurality of

conductors

21, 22, 23, 24, and 25 and the plurality of interlayer connection conductors V1 and V2 are conductors formed in the laminate 10A. Specifically, the conductor 21 is a conductor pattern formed on the surface of the insulating base material layer 12. The

conductors

22 and 23 are conductor patterns formed on the surface of the insulating base layer 13. The

conductors

24 and 25 are conductor patterns formed on the surface of the insulating base layer 14. The conductor 21 and the conductor 22 are connected to each other via an interlayer connection conductor V1 formed on the insulating base layer 13. The conductor 23 and the conductor 24 are connected to each other via an interlayer connection conductor V2 formed on the insulating base material layer 14. The

conductors

21, 22, 23, 24, and 25 are conductor patterns such as Cu foils, for example.

Next, a state in which the multilayer substrate 101 is mounted on a mounting substrate using a conductive bonding material will be described with reference to the drawings. Fig. 4 is a sectional view showing a main part of an electronic device 301 according to the first embodiment.

The electronic device 301 includes a multilayer substrate 101, a mounting substrate 201, and the like. As shown in fig. 4, the multilayer substrate 101 is mounted on a mounting substrate 201. The mounting substrate 201 is, for example, a printed wiring substrate.

Conductors

41 and 42 are formed on the main surface of the mounting substrate 201. The first surfaces S1A and S1B of the mounting electrodes P1 and P2 are bonded to the

conductors

41 and 42 of the mounting substrate 201, respectively, via the conductive bonding material 1. The conductive bonding material 1 is, for example, solder or the like.

According to the multilayer substrate 101 of the present embodiment, the following effects are achieved.

(a) In the multilayer substrate 101, the first surfaces S1A and S1B of the mounting electrodes P1 and P2 are bonded to a mounting substrate or the like via the conductive bonding material 1, and the surface roughness (Ra1) of the first surfaces S1A and S1B is larger than the surface roughness (Ra2) of the second surfaces S2A and S2B (Ra1 > Ra 2). Therefore, the contact area of the mounting electrodes P1, P2 with the conductive bonding material 1 is larger than that in the case where the second surfaces S2A, S2B of the mounting electrode P2 are bonded to a mounting substrate or the like via the conductive bonding material 1. Therefore, with this structure, the conductive bonding material 1 and the mounting electrodes P1 and P2 can be bonded with high bonding strength, and peeling of the multilayer substrate 101 from a mounting substrate or the like after mounting can be suppressed. Further, with this configuration, the conductor loss of the mount electrodes P1 and P2 can be reduced as compared with the case where the surface roughness of both the first surfaces S1A and S1B and the second surfaces S2A and S2B of the mount electrodes P1 and P2 is large.

(b) In the multilayer substrate 101, as shown in fig. 2a and 3, a part of the mounting electrodes P1 and P2 (outer edge portions of the mounting electrodes P1 and P2 in fig. 3) is sandwiched between the first insulating base material layer (insulating base material layer 11) and the second insulating base material layer (insulating base material layer 12). Therefore, as compared with the case where the mount electrodes P1, P2 are formed on the surface of the laminate 10A, it is possible to make it difficult to peel the mount electrodes P1, P2 from the laminate 10A.

(c) In the multilayer substrate 101, the first insulating base material layer (insulating base material layer 11) and the second insulating base material layer (insulating base material layer 12) are made of the same resin material. With this configuration, the difference in physical properties between the first insulating base material layer and the second insulating base material layer sandwiching a part of the mounting electrodes P1 and P2 is eliminated, and the bonding strength between the first insulating base material layer and the second insulating base material layer is improved. Therefore, peeling of the mount electrodes P1, P2 from the multilayer substrate can be suppressed.

(d) In the multilayer substrate 101, the mounting electrodes P1 and P2 do not reach the outer edge of the first main surface VS1 (mounting surface) when viewed from the Z-axis direction. When the mount electrodes P1 and P2 reach the surface of the laminate 10A (are exposed on the surface of the laminate), an external force is applied to the exposed portions of the mount electrodes P1 and P2, and thus the mount electrodes P1 and P2 are easily peeled off from the multilayer substrate. On the other hand, in this structure, since the mounting electrodes P1, P2 are not exposed from the outer edge (surface) of the mounting surface of the laminate 10A, peeling of the mounting electrodes P1, P2 from the multilayer substrate due to the application of an external force can be suppressed. In addition, with this structure, when separating a single piece (multilayer substrate) from the collective substrate (described later), it is not necessary to separate the individual mounting electrodes P1 and P2. Therefore, during manufacturing, the mounting electrodes P1 and P2 can be prevented from peeling off from the laminate 10A due to stress applied to the ends of the mounting electrodes P1 and P2.

(e) In the multilayer substrate 101, the first insulating base material layer (insulating base material layer 11) covers the entire outer periphery of the first surfaces S1A and S1B. With this structure, the mounting electrodes can be made less likely to be peeled off from the multilayer substrate (laminate) than in the case where the first insulating base material layer covers part of the outer peripheries of the first faces S1A and S1B of the mounting electrodes P1 and P2.

(f) In the electronic device 301 according to the present embodiment, the first surfaces S1A and S1B of the mounting electrodes P1 and P2 of the multilayer substrate 101 are bonded to the mounting substrate 201 via the conductive bonding material 1. With this configuration, the conductive bonding material 1 and the mounting electrodes P1 and P2 can be bonded with high bonding strength, and an electronic device in which peeling of the multilayer substrate from the mounting substrate 201 and the like after mounting is suppressed can be realized.

The multilayer substrate 101 according to the present embodiment is manufactured, for example, by the following steps. Fig. 5(a) to 5(D) are cross-sectional views sequentially showing the steps of manufacturing the multilayer substrate 101. In fig. 5 a to 5D, for convenience of explanation, the manufacturing process of a single chip (single piece) is described, but the actual manufacturing process of the diaphragm is performed in a state of a collective substrate.

As shown in fig. 5(a), first, a plurality of insulating base material layers 11, 12, 13, 14, 15 are prepared. The insulating base material layers 11, 12, 13, 14, and 15 are thermoplastic resin sheets such as Liquid Crystal Polymer (LCP) and polyether ether ketone (PEEK).

Then, the mounting electrodes P1 and P2 having the first surfaces S1A and S1B and the second surfaces S2A and S2B facing each other are formed on the insulating base material layer 11 (first insulating base material layer). Specifically, a metal foil (for example, Cu foil) is laminated on one main surface of the insulating base layer 11 in a collective substrate state so that the first surfaces S1A and S1B of the metal foil are in contact with the insulating base layer 11. Thereafter, the metal foil is patterned by photolithography, thereby forming the mounting electrodes P1, P2. The first surfaces S1A and S1B of the mount electrodes P1 and P2 are roughened. The first surfaces S1A and S1B are roughened by, for example, sandblasting, plasma, plating, etching, or the like.

The step of forming the mounting electrodes P1 and P2 on the surface of the first insulating base material layer (insulating base material layer 11) such that the first surfaces S1A and S1B are in contact with the surface of the first insulating base material layer is an example of the "electrode forming step" in the present invention.

Further,

conductors

21, 22, 23, 24, 25 and the like are formed on the plurality of insulating base material layers 12, 13, 14 (second insulating base material layers), respectively. Specifically,

conductors

21, 22, 23, 24, 25 and the like are formed by laminating a metal foil (for example, Cu foil) on one main surface of the insulating base material layers 12, 13, 14 in the aggregate substrate state and patterning the metal foil by photolithography. One surface of each of the

conductors

21, 22, 23, 24, 25 connected to the insulating base material layers 12, 13, 14 (the lower surface of the

conductors

21, 22, 23, 24, 25 in fig. 5 a to 5D) is roughened in the same manner as the first surfaces S1A, S1B of the mounting electrodes P1, P2.

Further, interlayer connection conductors V1, V2 are formed on the plurality of insulating base material layers 13, 14. The interlayer connection conductors V1 and V2 are provided by providing through holes in the insulating base material layers 13 and 14 by laser light or the like, then providing a conductive paste containing one or more of Cu, Ag, Sn, Ni, Mo, and the like, or an alloy thereof, and hardening (curing) the conductive paste by subsequent heating and pressing. Therefore, the interlayer connection conductors V1 and V2 are made of a material having a melting point (melting temperature) lower than the temperature at the time of heating and pressing.

Next, as shown in fig. 5(B), the insulating base material layers 11, 12, 13, 14, and 15 are laminated in this order. At this time, the plurality of insulating base material layers 11, 12, 13, 14, 15 are laminated such that the first surfaces S1A, S1B of the mounting electrodes P1, P2 face the first insulating base material layer (insulating base material layer 11), and the second surfaces S2A, S2B face the second insulating base material layer (insulating base material layer 12).

After the "electrode forming step", the step of laminating the plurality of insulating base material layers 11, 12, 13, 14, and 15 so that the first surfaces S1A and S1B face the first insulating base material layer and the second surfaces S2A and S2B face the second insulating base material layer is an example of the "laminating step" in the present invention.

Thereafter, as shown in fig. 5(B) and 5(C), the stacked insulating base material layers 11, 12, 13, 14, and 15 are heated and pressed (collectively pressed), thereby forming a laminated body 10AP in a collective substrate state. At this time, the mounting electrodes P1 and P2 are embedded in the laminate 10 AP.

The step of forming the laminate 10AP by heating and pressing the plurality of insulating base material layers 11, 12, 13, 14, and 15 stacked after the above-described "stacking step" and embedding the mounting electrodes P1 and P2 in the laminate 10AP is an example of the "laminate forming step" in the present invention.

Next, as shown in fig. 5C, the laminate 10AP is removed, and the base material layer non-formation portions NFP1 and NFP2 in which part of the first surfaces S1A and S1B is exposed are formed in the first insulating base material layer (insulating base material layer 11). Specifically, the laser beam LR is formed by irradiating the first main surface VS1 of the multilayer body 10AP in the stacking direction (Z-axis direction). The laser beam LR is shielded by the mounting electrodes P1 and P2 buried in the laminate 10 AP. Therefore, by using this manufacturing method, the base material layer non-formation portions NFP1 and NFP2 in which part of the first surfaces S1A and S1B is exposed can be easily formed.

After the "laminate forming step", the step of removing the laminate 10AP from the mounting surface side and forming the substrate layer non-formation portions NFP1 and NFP2 exposing a part of the first surfaces S1A and S1B in the first insulating substrate layer (insulating substrate layer 11) is an example of the "removing step" in the present invention.

Finally, the multilayer substrate 101 shown in fig. 5(D) is obtained by separating the collective substrate into individual pieces.

By the above-described manufacturing method, a multilayer substrate having the structure including the laminate 10A formed by laminating a plurality of insulating base material layers 11, 12, 13, 14, and 15 and the mounting electrodes P1 and P2 formed on any one of the insulating base material layers can be easily manufactured, and when the multilayer substrate is mounted on a mounting substrate or the like, sufficient bonding strength to the mounting substrate or the like can be secured.

In the multilayer substrate 101, the mounting electrodes P1 and P2 do not reach the outer edge of the first main surface VS1 (mounting surface) when viewed from the Z-axis direction. Therefore, when the individual pieces (multilayer substrates) are separated from the collective substrate, the mounting electrodes P1 and P2 do not need to be separated into individual pieces. Therefore, the mounting electrodes P1 and P2 can be prevented from peeling off from the laminate 10A during manufacturing.

Further, in the present embodiment, the plurality of insulating base material layers 11, 12, 13, 14, and 15 forming the laminate are made of a thermoplastic resin. According to the above manufacturing method, the laminated body 10A can be easily formed by collectively pressing the plurality of laminated insulating base material layers 11, 12, 13, 14, and 15, and therefore, the number of steps for manufacturing the insulating base material can be reduced, and the cost can be reduced.

Second embodiment

In the second embodiment, an example of a multilayer substrate having a different structure of a base material layer non-formation portion is shown.

Fig. 6 is a perspective view of the multilayer substrate 102 according to the second embodiment. Fig. 7(a) is a cross-sectional view B-B in fig. 6, and fig. 7(B) is a bottom view of the multilayer substrate 102. Fig. 7(B) shows a portion of the first surface on which the electrodes are mounted, which portion is exposed from the laminate, in a dot pattern so as to make the structure understandable.

The multilayer substrate 102 includes a laminate 10B formed by laminating a plurality of insulating base material layers 11, 12, 13, 14, 15, mounting electrodes P1, P2, a plurality of

conductors

In the multilayer substrate 102, the shapes of the base material layer non-formation portions NFP1 and NFP2 are different from those of the multilayer substrate 101 according to the first embodiment. Other structures are substantially the same as the multilayer substrate 101.

Hereinafter, a description will be given of a portion different from the multilayer substrate 101 according to the first embodiment.

In the present embodiment, the base material layer non-formation portions NFP1 and NFP2 reach the outer edge of the first main surface (mounting surface) when viewed from the Z-axis direction (see the left side of the base material layer non-formation portion NFP1 and the right side of the base material layer non-formation portion NFP2 in fig. 7B).

In the present embodiment, as shown in fig. 7B, the first insulating base material layer (see the insulating base material layer 11 in fig. 7 a) covers at least half of the outer periphery of the first surface (S1A, S1B). Specifically, the first insulating base material layer covers about 3/4 (the upper, right, and lower sides of the mount electrode P1 in fig. 7 (B)) of the outer periphery of the first face (S1A). Further, the first insulating base material layer covers about 3/4 (the upper, left, and lower sides of the mount electrode P2 in fig. 7 (B)) of the outer periphery of the first face (S1B).

Next, a state in which the multilayer substrate 102 is mounted on a mounting substrate using a conductive bonding material will be described with reference to the drawings. Fig. 8 is a sectional view showing a main part of an electronic apparatus 302 according to the second embodiment.

The electronic device 302 includes the multilayer substrate 102, the mounting substrate 201, and the like. As shown in fig. 8, the multilayer substrate 102 is mounted on a mounting substrate 201. The mounting substrate 201 is the same as the mounting substrate described in the first embodiment.

The first surfaces S1A and S1B of the mounting electrodes P1 and P2 are bonded to the

conductors

41 and 42 of the mounting substrate 201, respectively, via the conductive bonding material 1. As shown in fig. 8, the first surfaces S1A and S1B are joined to the mounting board 201 by forming solder fillets.

The multilayer substrate 102 according to the present embodiment achieves the following effects in addition to the effects described in the first embodiment.

(a) In the multilayer substrate 102, the mounting electrodes P1 and P2 do not reach the outer edge of the first main surface (mounting surface) when viewed in the Z-axis direction. On the other hand, when viewed from the Z-axis direction, the base material layer non-formation portions NFP1 and NFP2 reach the outer edge of the first main surface (mounting surface). With this configuration, as shown in fig. 8, solder fillets can be formed by the base material layer non-formation portions NFP1 and NFP2 reaching the outer edge of the mounting surface without increasing the mounting area of the multilayer board. Therefore, the reliability of bonding to the mounting substrate 201 and the like can be improved, and a multilayer substrate capable of high-density arrangement can be realized.

That is, with this configuration, it is possible to realize an electronic apparatus in which the bonding reliability of the multilayer substrate to the mounting substrate 201 and the like is improved without increasing the mounting area of the multilayer substrate.

In the present embodiment, an example of a multilayer substrate in which the first insulating base material layer covers approximately 3/4 of the outer periphery of the first surface (S1A, S1B) is shown, but the present invention is not limited to this configuration. If the first insulating base material layer (insulating base material layer 11) covers at least half of the outer periphery of the first surface (S1A, S1B), the effect and effect can be achieved that the mounting electrodes P1, P2 can be made less likely to be peeled off from the multilayer substrate (laminate) (see (e) above). However, from the viewpoint of making it difficult to peel the mounting electrodes P1, P2 from the multilayer substrate, the first insulating base material layer preferably covers the entire outer periphery of the first surface (S1A, S1B).

Other embodiments

In the above-described embodiments, the

laminated bodies

10A and 10B have a substantially rectangular parallelepiped shape, but the present invention is not limited to this configuration. The planar shape of the laminate may be changed as appropriate within the range that achieves the operation and effect of the present invention, and may be, for example, a polygon, a circle, an ellipse, an L-shape, a crank-shape, a T-shape, a Y-shape, or the like.

In the above-described embodiments, the plurality of insulating base material layers 11, 12, 13, 14, and 15 forming the laminate are made of thermoplastic resin, but the present invention is not limited to this configuration. The plurality of insulating base material layers 11, 12, 13, 14, and 15 may be made of thermosetting resin. When the plurality of insulating base material layers 11, 12, 13, 14, and 15 are made of thermoplastic resin, the insulating base material can be easily formed as described above, and therefore, the number of steps in the manufacturing process of the multilayer substrate can be reduced, and the cost can be reduced.

In the above-described embodiments, the multilayer substrate including the laminate formed by laminating the five insulating base material layers 11, 12, 13, 14, and 15 is shown, but the present invention is not limited to this configuration. The number of layers of the insulating base material layer forming the laminate can be appropriately changed within the range of achieving the operation and effect of the present invention.

Further, in each of the embodiments described above, an example of a laminate in which one first insulating base material layer (insulating base material layer 11) and four second insulating base material layers (insulating base material layers 12, 13, 14, and 15) are laminated is shown, but the number of first insulating base material layers and the number of second insulating base material layers are not limited to this. The number of the first insulating substrate layer and the number of the second insulating substrate layer can be appropriately changed within the range of the effects and effects of the present invention. The number of the first insulating base material layers may be two or more, for example. The number of the second insulating base material layers may be one, or two or more.

Although the multilayer substrate including the rectangular mounting electrodes P1 and P2 is exemplified in the above embodiments, the present invention is not limited to this structure. The shape of the mounting electrode may be changed as appropriate within the range of achieving the operation and effect of the present invention, and may be, for example, a polygon, a circle, an ellipse, an L-shape, a crank shape, a T-shape, a Y-shape, or the like. The number of mounting electrodes can be changed as appropriate depending on the circuit formed on the multilayer substrate.

Further, in the above-described embodiments, the examples in which the first insulating base material layer has the rectangular base material layer non-formation sections NFP1 and NFP2 have been described, but the present invention is not limited to this configuration. The shape of the non-formation portion of the base material layer may be appropriately changed within the range of achieving the operation and effect of the present invention, and may be, for example, a polygon, a circle, an ellipse, or the like. The number of the base layer non-formation portions is not limited to two, and may be one, or may be three or more.

Although the above embodiments have illustrated examples of the laminate in which a plurality of insulating base material layers 11, 12, 13, 14, and 15 are laminated, a protective layer such as a solder resist or a cover film may be formed on the first main surface VS1 or the second main surface VS2 of the laminate.

In addition, the circuit formed on the multilayer substrate can be freely configured within a range that achieves the operation and effect of the present invention. A transmission line such as a strip line structure, a microstrip line structure, or a coplanar line may be formed on the multilayer substrate, and a coil or a capacitor formed of a conductor pattern may be formed. Further, chip components such as chip inductors and chip capacitors may be mounted on the multilayer substrate.

Finally, the above description of the embodiments is in all respects illustrative and not restrictive. It is obvious to those skilled in the art that the modifications and variations can be appropriately made. The scope of the present invention is shown not by the above-described embodiments but by the claims. Further, the scope of the present invention includes modifications from the embodiments within the scope equivalent to the claims.

Description of the reference numerals

LR: laser;

NFP1, NFP 2: a base material layer non-formation section;

p1, P2: mounting an electrode;

S1A, S1B: a first side on which the electrode is mounted;

S2A, S2B: a second face on which the electrode is mounted;

v1, V2: an interlayer connection conductor;

VS 1: a first main surface (mounting surface) of the laminate;

VS 2: a second main surface of the laminate;

1: a conductive bonding material;

10A, 10AP, 10B: a laminate;

11. 12, 13, 14, 15: an insulating substrate layer;

21. 22, 23, 24, 25, 41, 42: a conductor;

101. 102: a multilayer substrate;

201: a mounting substrate;

301. 302: an electronic device.

Claims

1. A multilayer substrate is characterized by comprising:

2. The multilayer substrate of claim 1,

the first insulating substrate layer and the second insulating substrate layer are made of the same resin material.

3. The multilayer substrate according to claim 1 or 2,

the mounting electrode does not reach the outer edge of the mounting surface when viewed from the direction in which the plurality of insulating base material layers are stacked.

4. The multilayer substrate according to claim 1 or 2,

the first insulating base material layer covers more than half of the periphery of the first surface.

5. The multilayer substrate of claim 4,

the mounting electrode is disposed near an outer edge of the mounting surface when viewed from a direction in which the plurality of insulating base material layers are stacked,

the substrate layer non-formation portion reaches the outer edge of the mounting surface when viewed from the stacking direction of the plurality of insulating substrate layers.

6. An electronic device is characterized by comprising:

the multilayer substrate of any one of claims 1 to 5; and

a mounting substrate is mounted on the substrate,

7. An electronic device is characterized by comprising:

the multilayer substrate of claim 4 or 5; and

a mounting substrate is mounted on the substrate,