TWI440416B - Multilayered circuit board having coil structure surrounding embedded component and manufacturing method of the same - Google Patents
Multilayered circuit board having coil structure surrounding embedded component and manufacturing method of the same Download PDFInfo
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Description
本發明係關於一種電路板及其製造方法,特別是關於一種具有線圈結構環繞埋入元件之多層電路板及其製造方法。The present invention relates to a circuit board and a method of fabricating the same, and more particularly to a multilayer circuit board having a coil structure surrounding a buried component and a method of fabricating the same.
將各種電子零件整合於印刷電路板中已是近幾年來眾所囑目的發展技術。先進半導體技術的發展更是不斷造就多種具複雜功能且體型更精巧的電子產品。因應這種趨勢,人們對電路板功能的需求日益增加,且要求整合更多的電子零件。為滿足這種需求,需要持續不斷地提升多層電路板的結構與製造方法。The integration of various electronic components into printed circuit boards has been a development technology that has attracted attention in recent years. The development of advanced semiconductor technology is constantly creating a variety of electronic products with complex functions and more compact. In response to this trend, there is an increasing demand for board functions and the need to integrate more electronic components. In order to meet this demand, it is necessary to continuously improve the structure and manufacturing method of the multilayer circuit board.
在一方面,本發明係提供一種具有一線圈結構環繞一埋入元件之多層電路板的製造方法,包含:提供一第一雙面導電基板,一第二雙面導電基板,及至少一第三雙面導電基板置於該第一雙面導電基板及該第二雙面導電基板之間,其中該等雙面導電基板由下而上包含:一底部導體層及一下層線圈線路形成於該第一雙面導電基板上,一第一中層線圈線路及一第二中層線圈線路形成於該第三雙面導電基板上,及一上層線圈線路及一頂部導體層形成於該第二雙面導電基板上;提供至少兩個絕緣膠片,分別插設於該下層線圈線路與該第一中層線圈線路之間及該第二中層線圈線路與該上層線圈線路之間;壓合該等雙面導電基板與該等絕緣膠片;形成複數個導通孔包含:一第一導通孔電連接該下層線圈線路與該第一中層線圈線路、至少一個第二導通孔電連接該第一中層線圈線路與該第二中層線圈線路;及一第三導通孔電連接該第二中層線圈線路與該上層線圈線路,藉此構成該線圈結構;及製作一開口於該線圈結構之中心,並設置該埋入元件於該開口中。In one aspect, the present invention provides a method of fabricating a multilayer circuit board having a coil structure surrounding a buried component, comprising: providing a first double-sided conductive substrate, a second double-sided conductive substrate, and at least a third The double-sided conductive substrate is disposed between the first double-sided conductive substrate and the second double-sided conductive substrate, wherein the double-sided conductive substrate comprises a bottom conductor layer and a lower layer coil circuit formed thereon a first intermediate layer coil line and a second middle layer coil line are formed on the third double-sided conductive substrate, and an upper layer coil line and a top conductor layer are formed on the second double-sided conductive substrate. Providing at least two insulating films respectively interposed between the lower layer coil line and the first intermediate layer coil line and between the second middle layer coil line and the upper layer coil line; pressing the double-sided conductive substrates and The insulating film; forming a plurality of via holes includes: a first via hole electrically connecting the lower layer coil line and the first middle layer coil line and at least one second via hole electrically connected to the first a middle layer coil line and the second middle layer coil line; and a third via hole electrically connecting the second middle layer coil line and the upper layer coil line, thereby forming the coil structure; and forming an opening at a center of the coil structure, and The buried component is disposed in the opening.
在另一方面,本發明係提供以上述方法所製造之具有線圈結構環繞埋入元件之多層電路板。In another aspect, the present invention provides a multilayer circuit board having a coil structure surrounding a buried component fabricated by the above method.
此外,本發明尚包含其他方面以解決其他問題並合併上述之各方面詳細揭露於以下實施方式中。In addition, the present invention is intended to cover other problems and the various aspects described above are disclosed in detail in the following embodiments.
以下將參考所附圖式示範本發明之較佳實施例。所附圖式中相似元件係採用相同的元件符號。應注意為清楚呈現本發明,所附圖式中之各元件並非按照實物之比例繪製,而且為避免模糊本發明之內容,以下說明亦省略習知之零組件、相關材料、及其相關處理技術。Preferred embodiments of the present invention will be exemplified below with reference to the accompanying drawings. Like components in the drawings have the same component symbols. It should be noted that the various elements of the present invention are not drawn to the true aspect of the present invention, and in order to avoid obscuring the present invention, the following description also omits the known components, related materials, and related processing techniques.
圖1至圖14係本發明一實施例之示意圖,顯示具有線圈結構環繞埋入元件之多層電路板之製造過程。依據本發明之各個實施例,可同時製作一個或多個埋入元件之線圈結構,製造過程也可一併形成其他線路。為清楚說明,圖1至圖9中僅顯示單一個埋入元件的製造區域;圖10至圖11中則顯示具多個埋入元件的製造區域;圖12至圖13則顯示切割後具單一個埋入元件之多層電路板結構;圖14則顯示圖12所示之多層電路板結構中,各層線圈線路以導通孔相接之迴路示意圖。1 through 14 are schematic views of an embodiment of the present invention showing a manufacturing process of a multilayer circuit board having a coil structure surrounding a buried component. According to various embodiments of the present invention, one or more coil structures of the embedded components can be fabricated at the same time, and other circuits can be formed in the manufacturing process. For the sake of clarity, only the manufacturing area of a single embedded component is shown in FIGS. 1 to 9; the manufacturing area with a plurality of embedded components is shown in FIGS. 10 to 11; and the printed ones are shown in FIGS. 12 to 13 A multilayer circuit board structure of a buried component; FIG. 14 is a schematic diagram showing a circuit in which the coil circuits of the respective layers are connected by via holes in the multilayer circuit board structure shown in FIG.
首先,參考圖1,提供四個雙面導電基板A,B,C,D,按順序由上往下排列。此等雙面導電基板各包含兩面導體層與夾設其中的介電層D'。導體層可為銅箔或其他合適材料,介電層D'可為玻纖與環氧樹脂複合材或其他合適材料。應注意,本文在此以四個雙面導電基板做較佳實施例之說明,然應可瞭解本發明亦包含三個雙面導電基板、五個雙面導電基板、或更多雙面導電基板的實例。如圖1所示,將四個雙面導電基板A,B,C,D由上往下堆疊則可定義一頂部導體層S1及一第一導體層1於雙面導電基板A;一第二導體層2及一第三導體層3於雙面導電基板B;一第四導體層4及一第五導體層5於雙面導電基板C;一第六導體層6及一底部導體層S6於雙面導電基板D。First, referring to Fig. 1, four double-sided conductive substrates A, B, C, and D are provided, which are sequentially arranged from top to bottom. The double-sided conductive substrates each include a double-sided conductor layer and a dielectric layer D' interposed therebetween. The conductor layer may be a copper foil or other suitable material, and the dielectric layer D' may be a glass fiber and epoxy resin composite or other suitable material. It should be noted that four double-sided conductive substrates are described herein as preferred embodiments, but it should be understood that the present invention also includes three double-sided conductive substrates, five double-sided conductive substrates, or more double-sided conductive substrates. An example. As shown in FIG. 1, four top-sided conductive substrates A, B, C, and D are stacked from top to bottom to define a top conductor layer S1 and a first conductor layer 1 on the double-sided conductive substrate A; The conductor layer 2 and the third conductor layer 3 are on the double-sided conductive substrate B; a fourth conductor layer 4 and a fifth conductor layer 5 are on the double-sided conductive substrate C; a sixth conductor layer 6 and a bottom conductor layer S6 are Double-sided conductive substrate D.
接著,參考圖2,分別對四個雙面導電基板A,B,C,D之第一導體層1、第二導體層2、第三導體層3、第四導體層4、第五導體層5及第六導體層6進行蝕刻以形成如圖所示之線圈型的線路L1,L2,L3,L4,L5,L6,其中線路L1,L2,L3,L4,L5,L6各自包含線圈圖案,並將透過後續製程所形成的導通孔相互電連接,進而形成連貫於四個雙面導電基板A,B,C,D的線圈結構。於後續製程,線圈結構所環繞部分將形成一開口以置放一埋入元件。注意,由於線路L1,L3,L5係分別位在雙面導電基板A,B,C之背面,故圖中以虛線表示其線路形狀。詳言之,線路L1包含上輸出入端點1x,線圈部份1y及垂直接點1e。線路L2包含垂直接點2e,線圈部份2y及垂直接點2d,垂直接點2e將透過後續製程所形成的導通孔SH1e-2e 連接至垂直接點le。線路L3包含垂直接點3d,線圈部份3y及垂直接點3c,垂直接點3d將透過後續製程所形成的導通孔SH2d-3d 連接至垂直接點2d。線路L4包含垂直接點4c,線圈部份4y及垂直接點4b,垂直接點4c將透過後續製程所形成的導通孔SH3c-4c 連接至垂直接點3c。線路L5包含垂直接點5b,線圈部份5y及垂直接點5a,垂直接點5b將透過後續製程所形成的導通孔SH4b-5b 連接至垂直接點4b。線路L6包含垂直接點6a,線圈部份6y及下輸出入端點6x,垂直接點6a將透過後續製程所形成的導通孔SH5a-6a 連接至垂直接點5a。注意圖中線路L6靠近垂直接點6a的部分,因為被雙面導電基板C遮住,所以以虛線表示。在此實施例中,雙面導電基板B上之線路L2與L3,由上視觀之的係構成一完整圓圈,環繞後續將埋入之元件;雙面導電基板C上之線路L4與L5則構成另一完整圓圈,環繞後續將置入之埋入元件;雙面導電基板A與D上之線路L1與L6則各自具有輸出入端點1x,6x作為線圈結構之始端與末端。輸出入端點1x,6x分別向外延伸至此單一埋入元件與其線圈結構的製造區域的外緣,以於後續步驟中進一步與側面接觸電極1100(顯示於圖12)接通。Next, referring to FIG. 2, the first conductor layer 1, the second conductor layer 2, the third conductor layer 3, the fourth conductor layer 4, and the fifth conductor layer of the four double-sided conductive substrates A, B, C, and D, respectively. 5 and the sixth conductor layer 6 are etched to form coil-type lines L1, L2, L3, L4, L5, L6 as shown, wherein the lines L1, L2, L3, L4, L5, L6 each comprise a coil pattern, The via holes formed by the subsequent processes are electrically connected to each other to form a coil structure that is continuous with the four double-sided conductive substrates A, B, C, and D. In a subsequent process, the surrounding portion of the coil structure will form an opening to place a buried component. Note that since the lines L1, L3, and L5 are respectively located on the back sides of the double-sided conductive substrates A, B, and C, the line shape is indicated by a broken line in the drawing. In detail, the line L1 includes an upper input/output terminal 1x, a coil portion 1y, and a vertical contact 1e. The line L2 includes a vertical contact 2e, a coil portion 2y and a vertical contact 2d, and the vertical contact 2e is connected to the vertical contact le through a via hole SH 1e-2e formed by a subsequent process. The line L3 includes a vertical contact 3d, a coil portion 3y and a vertical contact 3c, and the vertical contact 3d is connected to the vertical contact 2d through a via hole SH 2d-3d formed by a subsequent process. The line L4 includes a vertical contact 4c, a coil portion 4y and a vertical contact 4b, and the vertical contact 4c connects the via hole SH3c-4c formed by the subsequent process to the vertical contact 3c. The line L5 includes a vertical contact 5b, a coil portion 5y and a vertical contact 5a, and the vertical contact 5b is connected to the vertical contact 4b through a via hole SH 4b-5b formed by a subsequent process. The line L6 includes a vertical contact 6a, a coil portion 6y and a lower input/output terminal 6x, and the vertical contact 6a is connected to the vertical contact 5a through the via hole SH 5a-6a formed by the subsequent process. Note that the portion of the line L6 near the vertical contact 6a in the figure is indicated by a broken line because it is covered by the double-sided conductive substrate C. In this embodiment, the lines L2 and L3 on the double-sided conductive substrate B form a complete circle from the upper view, surrounding the components to be buried later; the lines L4 and L5 on the double-sided conductive substrate C are Another complete circle is formed to surround the buried component to be placed subsequently; the lines L1 and L6 on the double-sided conductive substrates A and D each have an input/output terminal 1x, 6x as the beginning and end of the coil structure. The input and output terminals 1x, 6x extend outwardly to the outer edge of the manufacturing region of the single buried component and its coil structure, respectively, for further connection with the side contact electrode 1100 (shown in Figure 12) in a subsequent step.
然後,參考圖3及圖4,提供三層絕緣片P1,P2及P3使其分別夾設於雙面導電基板A與B,B與C,及C與D之間。依圖3所示之順序疊合雙面導電基板A,B,C,D及絕緣膠片P1,P2及P3,並進行熱壓,以形成如圖4所示之結構。Then, referring to FIG. 3 and FIG. 4, three insulating sheets P1, P2 and P3 are provided between the double-sided conductive substrates A and B, B and C, and C and D, respectively. The double-sided conductive substrates A, B, C, D and the insulating films P1, P2 and P3 are laminated in the order shown in Fig. 3, and hot pressed to form a structure as shown in Fig. 4.
參考圖4,進行鑽孔,以形成得以連接垂直接點le至垂直接點2e的通孔H1e-2e ;連接垂直接點2d至垂直接點3d的導通孔H2d-3d ;連接垂直接點4c至垂直接點3c的通孔H3c-4c ;連接垂直接點5b至垂直接點4b的通孔H4b-5b ;及連接垂直接點6a至垂直接點5a的通孔H5a-6a 。此等通孔H1e-2e 、H2d-3d 、H3c-4c 、H4b-5b 及H5a-6a 均貫穿雙面導電基板A,B,C,D及絕緣膠片P1,P2及P3。圖4相對於圖3水平旋轉180度。Referring to FIG. 4, drilling is performed to form through holes H 1e-2e for connecting the vertical contacts le to the vertical contacts 2e ; via holes H 2d-3d for connecting the vertical contacts 2d to the vertical contacts 3d ; a through hole H 3c- 4c from the point 4c to the vertical contact 3c; a through hole H 4b-5b connecting the vertical contact 5b to the vertical contact 4b; and a through hole H 5a connecting the vertical contact 6a to the vertical contact 5a 6a . The through holes H 1e - 2e , H 2d - 3d , H 3c - 4c , H 4b - 5b , and H 5a - 6a all penetrate the double-sided conductive substrates A, B, C, D and the insulating films P1, P2, and P3. Figure 4 is rotated 180 degrees horizontally with respect to Figure 3.
接著,參考圖5,對各通孔進行鍍通孔及蝕刻頂部導體層S1與底部導體層S6,以使上述之各通孔成為如圖所示導通孔SH1e-2e 、SH2d-3d 、SH3c-4c 、SH4b-5b 及SH5a-6a 。於此實施例,導通孔SH2d-3d 及SH4b-5b 係位在相對於線圈結構之一側(圖中以J側表示)且相互隔開;導通孔SH1e-2e 、SH3c-4c 及SH5a-6a 則位在另一側(圖中以K側表示)且相互隔開。J側與K側係相對而不相鄰。若有必要,頂部導體層S1與底部導體層S6可經蝕刻而有其他線路或再增層以作為其他零件組裝層,進而提供其他功能。Next, referring to FIG. 5, the through holes are plated through the via holes, and the top conductor layer S1 and the bottom conductor layer S6 are etched so that the respective via holes become the via holes SH 1e-2e and SH 2d-3d as shown in the drawing. SH 3c-4c , SH 4b-5b and SH 5a-6a . In this embodiment, the via holes SH 2d-3d and SH 4b-5b are tied at one side with respect to the coil structure (shown as J side in the drawing) and are spaced apart from each other; the via holes SH 1e-2e , SH 3c-4c And SH 5a-6a are located on the other side (shown as K side in the figure) and are spaced apart from each other. The J side and the K side are opposite and not adjacent. If necessary, the top conductor layer S1 and the bottom conductor layer S6 may be etched to have other wiring or additional layers to serve as other component assembly layers, thereby providing other functions.
然後,參考圖6及圖7,在圖5所完成之結構中形成一開口601於線圈結構之中心位置以供放置一電子元件701。電子元件701可為磁性元件或其他合適元件。可以鐵芯作為磁性元件,但其為實心的結構,而非中空之指環狀元件。開口601的形成可用各種合適製程,如機械撈孔或化學蝕刻等等。圖6所示之結構於後文稱為具線圈結構之多層電路板600。Then, referring to FIG. 6 and FIG. 7, an opening 601 is formed in the center of the coil structure for placing an electronic component 701 in the structure completed in FIG. Electronic component 701 can be a magnetic component or other suitable component. The iron core can be used as a magnetic element, but it is a solid structure rather than a hollow finger ring element. The opening 601 can be formed by various suitable processes such as mechanical hole drilling or chemical etching. The structure shown in Fig. 6 is hereinafter referred to as a multilayer circuit board 600 having a coil structure.
接著參考圖,將電子元件701置於具線圈結構之多層電路板600的開口601後,提供兩片單面導電基板801及802,及兩片絕緣膠片P4及P5。單面導電基板801及802各具有一單一表面導體層801a,802a及一介電層801b及802b,材料可與前述雙面導電基板類似。將以上所述元件依圖8所示之順序排列疊合,並進行熱壓。壓合完成之結構900如圖9所示。Referring next to the drawing, after the electronic component 701 is placed in the opening 601 of the multilayer circuit board 600 having the coil structure, two single-sided conductive substrates 801 and 802, and two sheets of insulating films P4 and P5 are provided. The single-sided conductive substrates 801 and 802 each have a single surface conductor layer 801a, 802a and a dielectric layer 801b and 802b, and the material can be similar to the above-described double-sided conductive substrate. The above-described elements are stacked in the order shown in Fig. 8 and hot pressed. The structure 900 of the press fit is shown in FIG.
為清楚說明本發明多層電路板之線圈結構的製造過程,圖1至圖9中顯示單一埋入元件及其線圈結構的製造區域。圖10至圖11則為說明本發明多層電路板之接觸結構及切割製造,故顯示多個埋入元件的製造區域。圖10至圖11中,結構900的內層結構省略未示。In order to clearly illustrate the manufacturing process of the coil structure of the multilayer circuit board of the present invention, the manufacturing regions of the single embedded component and its coil structure are shown in FIGS. 1 to 9. 10 to 11 are views showing the contact structure and the dicing manufacturing of the multilayer circuit board of the present invention, so that a plurality of manufacturing regions of the embedded components are shown. In FIGS. 10 to 11, the inner layer structure of the structure 900 is omitted.
參考圖10,進行鑽孔,以形成複數個切刻凹口1001沿預定之線I-I'排列。可視需要,同時形成單個或多個孔1003及/或1004,期可用作通氣孔,或有其他合適之用途,可位於如圖所示之位置或其他合適位置。電子元件701埋在結構900中以虛線表示。Referring to Figure 10, drilling is performed to form a plurality of nicked recesses 1001 aligned along a predetermined line I-I'. A single or multiple apertures 1003 and/or 1004 may be formed at the same time as desired, and may be used as a vent, or for other suitable purposes, and may be located as shown or at other suitable locations. Electronic component 701 is embedded in structure 900 and is shown in dashed lines.
接著,參考圖11,對各切刻凹口1001及單面導電基板801與802之表面導體層801a,802a進行鍍通孔及蝕刻製程。藉由鍍通孔製程,切刻凹口1001的內側會鍍上導體,而可作為切割後之側面接觸電極1100。應注意,每個單一埋入元件與其線圈結構的製造區域中有兩個側面接觸電極1100位於相對的兩側,其分別接觸雙面導電基板A與D上之線路L1與L6上之輸出入端點1x,6x。同時,藉由蝕刻製程,圖案化表面導體層801a及802a,進而形成頂部接觸電極1200及底部接觸電極1400(圖11未顯示,可見於圖13)。若有必要,表面導體層801a或802a可經蝕刻而有其他線路或再增層以作為其他零件組裝層,進而提供其他功能。繼鍍通孔及蝕刻製程後,可視需要進一步形成導電保護層(圖未示),如一般之化學鎳金於頂部接觸 電極1200、底部接觸電極1400及側面接觸電極1100上;以及形成絕緣防焊層(圖未示),如一般之防焊印刷於露出的介電層801b及802b表面上。Next, referring to FIG. 11, a plated through hole and an etching process are performed on each of the dicing notches 1001 and the surface conductor layers 801a, 802a of the single-sided conductive substrates 801 and 802. By the plated through hole process, the inner side of the dicing recess 1001 is plated with a conductor, and can be used as the side contact electrode 1100 after cutting. It should be noted that each of the single buried component and its coil structure have two side contact electrodes 1100 on opposite sides, which respectively contact the output terminals on the lines L1 and L6 on the double-sided conductive substrates A and D. Point 1x, 6x. At the same time, the surface conductor layers 801a and 802a are patterned by an etching process to form a top contact electrode 1200 and a bottom contact electrode 1400 (not shown in FIG. 11, which can be seen in FIG. 13). If necessary, the surface conductor layer 801a or 802a can be etched with other traces or layers to serve as an additional component assembly layer to provide other functionality. After the plated through hole and the etching process, a conductive protective layer (not shown) may be further formed as needed, such as general chemical nickel gold at the top contact. The electrode 1200, the bottom contact electrode 1400 and the side contact electrode 1100; and an insulating solder mask (not shown) are formed on the surface of the exposed dielectric layers 801b and 802b as is conventionally solder-proof.
完成圖11所示之步驟後,可進行切割。參考圖12,顯示切刻後所形成單一個具有線圈結構環繞埋入元件之多層電路板1500。After the steps shown in Fig. 11 are completed, cutting can be performed. Referring to Figure 12, a single multilayer circuit board 1500 having a coil structure surrounding the buried component is formed after dicing.
圖13為多層電路板1500之部分結構的剖面圖,其未顯示絕緣防焊層。如圖所示,SH3c-4c 係自頂部導體層S1貫穿至底部導體層S6,用於導通線路L3與L4;SH4b-5b 係自頂部導體層S1貫穿至底部導體層S6,用於導通線路L4與L5。Figure 13 is a cross-sectional view showing a portion of the structure of the multilayer circuit board 1500, which does not show an insulating solder mask. As shown, SH 3c-4c penetrates from the top conductor layer S1 to the bottom conductor layer S6 for the conduction lines L3 and L4; and SH 4b-5b penetrates from the top conductor layer S1 to the bottom conductor layer S6 for conduction Lines L4 and L5.
圖14顯示圖12所示之多層電路板中,各層線圈線路L1,L2,L3,L4,L5,L6以導通孔SH1e-2e 、SH2d-3d 、SH3c-4c 、SH4b-5b 及SH5a-6a 相接之迴路示意圖。14 shows a multilayer circuit board shown in FIG. 12, each layer of coil lines L1, L2, L3, L4, L5, L6 with via holes SH 1e-2e , SH 2d-3d , SH 3c-4c , SH 4b-5b and Schematic diagram of the circuit in which SH 5a-6a is connected.
以上所述僅為本發明之較佳實施例而已,並非用以限定本發明之申請專利範圍;凡其它未脫離本發明所揭示之精神下所完成之等效改變或修飾,均應包含在下述之申請專利範圍內。The above is only the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention; all other equivalent changes or modifications which are not departing from the spirit of the present invention should be included in the following. Within the scope of the patent application.
A,B,C,D...雙面導電基板A, B, C, D. . . Double-sided conductive substrate
D'...介電層D'. . . Dielectric layer
S1...頂部導體層S1. . . Top conductor layer
1...第一導體層1. . . First conductor layer
2...第二導體層2. . . Second conductor layer
3...第三導體層3. . . Third conductor layer
4...第四導體層4. . . Fourth conductor layer
5...第五導體層5. . . Fifth conductor layer
6...第六導體層6. . . Sixth conductor layer
S6...底部導體層S6. . . Bottom conductor layer
L1...線路L1. . . line
1x...上輸出入端點1x. . . Upper and lower input and output
1y...線圈部份1y. . . Coil part
1e...垂直接點1e. . . Vertical contact
L2...線路L2. . . line
2e...垂直接點2e. . . Vertical contact
2y...線圈部份2y. . . Coil part
2d...垂直接點2d. . . Vertical contact
L3...線路L3. . . line
3d...垂直接點3d. . . Vertical contact
3y...線圈部份3y. . . Coil part
3c...垂直接點3c. . . Vertical contact
L4...線路L4. . . line
4c...垂直接點4c. . . Vertical contact
4y...線圈部份4y. . . Coil part
4b...垂直接點4b. . . Vertical contact
L5...線路L5. . . line
5b...垂直接點5b. . . Vertical contact
5y...線圈部份5y. . . Coil part
5a...垂直接點5a. . . Vertical contact
L6...線路L6. . . line
6a...垂直接點6a. . . Vertical contact
6y...線圈部份6y. . . Coil part
6x...下輸出入端點6x. . . Input and output endpoint
P1,P2及P3...絕緣膠片P1, P2 and P3. . . Insulating film
H1e-2e 、H2d-3d 、H3c-4c 、H4b-5b 、H5a-6a ...通孔H 1e-2e , H 2d-3d , H 3c-4c , H 4b-5b , H 5a-6a . . . Through hole
SH1e-2e 、SH2d-3d 、SH3c-4c 、SH4b-5b 、SH5a-6a ...導通孔SH 1e-2e , SH 2d-3d , SH 3c-4c , SH 4b-5b , SH 5a-6a . . . Via
J...J側J. . . J side
K...K側K. . . K side
600...多層電路板600. . . Multi-layer circuit board
601...開口601. . . Opening
701...電子元件701. . . Electronic component
P4,P5...絕緣膠片P4, P5. . . Insulating film
801,802...單面導電基板801,802. . . Single-sided conductive substrate
801a,802a...表面導體層801a, 802a. . . Surface conductor layer
801b,802b...介電層801b, 802b. . . Dielectric layer
900...結構900. . . structure
1001...凹口1001. . . Notch
1003,1004...孔1003, 1004. . . hole
1100...側面接觸電極1100. . . Side contact electrode
1200...頂部接觸電極1200. . . Top contact electrode
1400...底部接觸電極1400. . . Bottom contact electrode
1500...多層電路板1500. . . Multi-layer circuit board
圖1至圖13係依據本發明一實施例,顯示具有線圈結構環繞埋入元件之多層電路板之製造過程的示意圖。1 through 13 are schematic views showing a manufacturing process of a multilayer circuit board having a coil structure surrounding a buried component, in accordance with an embodiment of the present invention.
圖14則顯示圖12所示之多層電路板結構中,各層線圈線路以導通孔相接之迴路示意圖。FIG. 14 is a schematic view showing a circuit in which the coil circuits of the respective layers are connected by via holes in the multilayer circuit board structure shown in FIG.
S1...頂部導體層S1. . . Top conductor layer
S6...底部導體層S6. . . Bottom conductor layer
701...電子元件701. . . Electronic component
SH3c-4c 、SH4b-5b ...導通孔SH 3c-4c , SH 4b-5b . . . Via
P1,P2,P3,P4,P5...絕緣膠片P1, P2, P3, P4, P5. . . Insulating film
L1,L2,L3,L4,L5,L6...線路L1, L2, L3, L4, L5, L6. . . line
801b,802b...介電層801b, 802b. . . Dielectric layer
1200...頂部接觸電極1200. . . Top contact electrode
1400...底部接觸電極1400. . . Bottom contact electrode
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TWI440416B true TWI440416B (en) | 2014-06-01 |
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