CN211828497U - Resin multilayer substrate and electronic device - Google Patents
Resin multilayer substrate and electronic device Download PDFInfo
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- CN211828497U CN211828497U CN201922028979.4U CN201922028979U CN211828497U CN 211828497 U CN211828497 U CN 211828497U CN 201922028979 U CN201922028979 U CN 201922028979U CN 211828497 U CN211828497 U CN 211828497U
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- main surface
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- Production Of Multi-Layered Print Wiring Board (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
The utility model discloses a resin multilayer base plate and electronic equipment in the structure that possesses resin substrate, conductor pattern and protective layer, has restrained the change of the electrical characteristic that the damage of above-mentioned conductor pattern when applying external force leads to. A resin multilayer substrate (101) is provided with: a resin base (30) having a 1 st main surface (VS1) and a 2 nd main surface (VS2) that face each other; mounting electrodes (P1, P2) formed only on the 1 st main surface (VS 1); a protective layer (2) formed on the 2 nd main surface (VS 2); and conductor patterns (41, 42, 43) formed on the resin base material (30). The resin base (30) is formed to include a plurality of 1 st resin layers (11, 12, 13, 14), and the protective layer (2) is composed of an insulating resin harder than a resin material of the 1 st resin layer (14) having the 2 nd main surface (VS 2). The conductor patterns (41, 42, 43) are formed outside the interface between the No. 2 main surface (VS2) and the protective layer (2) and outside the protective layer (2).
Description
Technical Field
The present invention relates to a resin multilayer substrate, and more particularly, to a resin multilayer substrate including a resin base material formed by laminating a plurality of resin layers and a protective layer formed on a surface of the resin base material, and an electronic device including the resin multilayer substrate.
Background
Conventionally, a resin multilayer substrate is known in which a protective layer is formed on the surface of a resin base material formed by laminating a plurality of resin layers.
For example, patent document 1 discloses a resin multilayer substrate including: the printed wiring board includes a resin base formed by laminating a plurality of resin layers, a conductor pattern formed on a surface of the resin base, and a protective layer laminated on a surface of the resin base so as to cover the conductor pattern. With this structure, oxidation of the conductor pattern on the surface of the resin base material, contact between the conductor pattern and an external conductor, and the like can be suppressed.
Prior art documents
Patent document
Patent document 1: international publication No. 2018/037871
However, in the resin multilayer substrate described in patent document 1, when an external impact is applied to the surface, the impact (external force) can be prevented from being directly applied to the conductor pattern, but the external force applied to the protective layer is easily transmitted to the conductor pattern directly below. Therefore, there is a concern that: the conductor pattern is easily damaged (for example, deformed, peeled, and damaged), and the electrical characteristics of the resin multilayer substrate change.
SUMMERY OF THE UTILITY MODEL
An object of the present invention is to provide a resin multilayer substrate and an electronic device including the same, in which a resin base material, a conductor pattern formed on the resin base material, and a protective layer formed on the surface of the resin base material are provided, and in which a change in electrical characteristics due to damage to the conductor pattern when an external force is applied is suppressed.
The utility model discloses a resin multilayer substrate's characterized in that possesses:
a resin substrate having a 1 st main surface and a 2 nd main surface opposed to each other, the resin substrate being formed by laminating a plurality of resin layers including a plurality of 1 st resin layers;
a mounting electrode formed only on the 1 st main surface;
a protective layer formed on the 2 nd main surface and harder than the 1 st resin layer having the 2 nd main surface among the plurality of resin layers; and
a conductor pattern formed on the resin base material,
the conductor pattern is formed outside the interface between the 2 nd main surface and the protective layer and outside the protective layer.
Furthermore, the resin multilayer substrate of the present invention is characterized by comprising:
a resin substrate having a 1 st main surface and a 2 nd main surface opposed to each other, the resin substrate being formed by laminating a plurality of resin layers including a plurality of 1 st resin layers;
a mounting electrode formed only on the 1 st main surface;
a protective layer formed on the 2 nd main surface and containing a filler harder than the 1 st resin layer having the 2 nd main surface among the plurality of resin layers; and
a conductor pattern formed on the resin base material,
the conductor pattern is formed outside the interface between the 2 nd main surface and the protective layer and outside the protective layer.
When the conductor pattern is formed at the interface between the 2 nd main surface and the protective layer, an impact applied from the 2 nd main surface side is directly applied to the conductor pattern, and the conductor pattern is easily damaged (for example, deformed, peeled, and broken). In addition, even when the hard protective layer is not formed on the 2 nd main surface, the conductor pattern is easily damaged by an impact applied from the 2 nd main surface side.
On the other hand, with this structure, the hard resist is not directly in contact with the conductor pattern, and a resin layer that is more easily deformed than the resist exists between the conductor pattern and the resist. Therefore, the transmission of the impact received from the 2 nd main surface side to the conductor pattern can be suppressed, and the damage of the conductor pattern due to the impact from the outside can be suppressed. Therefore, it is possible to suppress a change in the electrical characteristics of the resin multilayer substrate due to deformation of the conductor pattern caused by an external impact.
The electronic device of the utility model is characterized in that the electronic device comprises a resin multilayer substrate and other parts connected with the resin multilayer substrate,
the resin multilayer substrate includes:
a resin substrate having a 1 st main surface and a 2 nd main surface opposed to each other, the resin substrate being formed by laminating a plurality of resin layers including a plurality of 1 st resin layers;
a mounting electrode formed only on the 1 st main surface;
a protective layer formed on the 2 nd main surface and harder than the 1 st resin layer having the 2 nd main surface among the plurality of resin layers; and
a conductor pattern formed on the resin base material,
the conductor pattern is formed outside the interface between the 2 nd main surface and the protective layer and outside the protective layer,
the mounting electrode of the resin multilayer substrate is connected to the other member.
The electronic device of the utility model is characterized in that the electronic device comprises a resin multilayer substrate and other parts connected with the resin multilayer substrate,
the resin multilayer substrate includes:
a resin substrate having a 1 st main surface and a 2 nd main surface opposed to each other, the resin substrate being formed by laminating a plurality of resin layers including a plurality of 1 st resin layers;
a mounting electrode formed only on the 1 st main surface;
a protective layer formed on the 2 nd main surface and containing a filler harder than a resin material of the 1 st resin layer having the 2 nd main surface among the plurality of resin layers; and
a conductor pattern formed on the resin base material,
the conductor pattern is formed outside the interface between the 2 nd main surface and the protective layer and outside the protective layer,
the mounting electrode of the resin multilayer substrate is connected to the other member.
With this configuration, when the resin multilayer substrate including the resin base material, the conductor pattern formed on the resin base material, and the protective layer formed on the surface of the resin base material is connected to another member, it is possible to suppress a change in electrical characteristics due to damage to the conductor pattern when an external force is applied.
According to the present invention, in a structure including a resin base material, a conductor pattern formed on the resin base material, and a protective layer formed on the surface of the resin base material, a change in electrical characteristics due to damage to the conductor pattern when an external force is applied can be suppressed.
Drawings
Fig. 1 is a cross-sectional view of a resin multilayer substrate 101 according to embodiment 1.
Fig. 2 is a sectional view showing a main part of an electronic device 301 according to embodiment 1.
Fig. 3 is a sectional view sequentially showing the steps of manufacturing the resin multilayer substrate 101.
Fig. 4 is a cross-sectional view of a resin multilayer substrate 102 according to embodiment 2.
Fig. 5 is a cross-sectional view of a resin multilayer substrate 103 according to embodiment 3.
Fig. 6 is a sectional view sequentially showing the steps of manufacturing the resin multilayer substrate 103.
-description of symbols-
EP1, EP2
P1, P2
S1
V1, V11, V12
1 st principal plane of resin substrate
The 2 nd main face of the resin substrate
1. Protective layer
Protective layer
Conductive bonding material
11. 12, 13, 14, 15
21. 22, 23
30. 30A, 30b
41. 42, 43
101. 102, 103
Circuit substrate (his part)
An electronic device
Detailed Description
Hereinafter, a plurality of embodiments of the present invention will be described by way of specific examples with reference to the drawings. In the drawings, the same reference numerals are given to the same positions. The embodiments are shown separately for convenience in view of ease of explanation and understanding of points, but partial replacement or combination of the structures shown in different embodiments is possible. In embodiment 2 and subsequent embodiments, techniques for items common to embodiment 1 are omitted, and only differences will be described. In particular, the same operational effects based on the same structure are not mentioned in turn in accordance with each embodiment.
EXAMPLE 1 embodiment
Fig. 1 is a cross-sectional view of a resin multilayer substrate 101 according to embodiment 1.
The resin multilayer substrate 101 includes: resin base 30, conductor patterns 41, 42, 43, mounting electrodes P1, P2, interlayer connection conductor V1, protective layers 1, 2, and the like.
The resin substrate 30 is a rectangular flat plate having a longitudinal direction aligned with the X-axis direction, and has a 1 st main surface VS1 and a 2 nd main surface VS2 facing each other. The resin substrate 30 is a green body mainly composed of a thermoplastic resin.
As shown in fig. 1, mounting electrodes P1, P2 and a protective layer 1 are formed on the 1 st main surface VS1 of the resin base 30. The protective layer 2 is formed on the 2 nd main surface VS2 of the resin base 30. Inside the resin base material 30, conductor patterns 41, 42, 43 and an interlayer connection conductor V1 are formed. In addition, although not shown, other conductor patterns and interlayer connection conductors are formed on the resin base 30.
The resin substrate 30 is a laminate formed by laminating a plurality of resin layers (1 st resin layers 11, 12, 13, and 14). Specifically, the resin substrate 30 is formed by sequentially laminating the 1 st resin layers 11, 12, 13, and 14. Each of the plurality of 1 st resin layers 11, 12, 13, and 14 is a rectangular resin (thermoplastic resin) flat plate whose longitudinal direction coincides with the X-axis direction. The 1 st resin layers 11, 12, 13, and 14 are resin sheets mainly composed of, for example, Liquid Crystal Polymer (LCP), polyether ether ketone (PEEK), or the like.
Mounting electrodes P1 and P2 are formed on the lower surface (surface on the 1 st major surface VS1 side) of the 1 st resin layer 11. The mounting electrode P1 is a rectangular conductor pattern disposed in the vicinity of the 1 st end of the 1 st resin layer 11 (the left end of the 1 st resin layer 11 in fig. 1). The mounting electrode P2 is a rectangular conductor pattern disposed in the vicinity of the 2 nd end of the 1 st resin layer 11 (the right end of the 1 st resin layer 11 in fig. 1). The mounting electrodes P1 and P2 are conductor patterns such as Cu foils, for example.
On the lower surface (surface on the 1 st main surface VS1 side) of the 1 st resin layer 12, a conductor pattern 41 is formed. On the lower surface (the 1 st major surface VS1 side surface) of the 1 st resin layer 13, a conductor pattern 42 is formed. The conductor pattern 41 is a rectangular conductor pattern disposed near the center of the 1 st resin layer 12. The conductor pattern 41 is a conductor pattern such as Cu foil, for example. Further, an interlayer connection conductor V1 is formed in the 1 st resin layer 12.
On the lower surface (the 1 st major surface VS1 side surface) of the 1 st resin layer 13, a conductor pattern 42 is formed. The conductor pattern 42 is a rectangular conductor pattern disposed near the center of the 1 st resin layer 13. The conductor pattern 42 is a conductor pattern such as Cu foil.
On the lower surface (the 1 st major surface VS1 side surface) of the 1 st resin layer 14, a conductor pattern 43 is formed. The conductor pattern 43 is a rectangular conductor pattern disposed near the center of the 1 st resin layer 14. The conductor pattern 43 is a conductor pattern such as Cu foil, for example.
The protective layer 1 is a protective film laminated on the lower surface of the 1 st resin layer 11 (the 1 st main surface VS1 of the resin substrate 30), and has substantially the same shape as the 1 st resin layer 11 in a plan view. The protective layer 1 has a plurality of openings formed at positions corresponding to the positions of the mounting electrodes P1 and P2, respectively. Therefore, even when the protective layer 1 is formed on the lower surface of the 1 st resin layer 11, the mounting electrodes P1 and P2 are exposed to the outside through the plurality of openings. The protective layer 1 is a cover film made of, for example, Polyimide (PI), polyethylene terephthalate (PET), or the like, and is a solder resist mainly composed of, for example, an epoxy resin.
The protective layer 2 is a protective film laminated on the upper surface of the 1 st resin layer 14 (the 2 nd main surface VS2 of the resin substrate 30), and has substantially the same shape as the 1 st resin layer 14 in a plan view. The protective layer 2 is made of an insulating resin harder than the resin material (for example, liquid crystal polymer) of the 1 st resin layer 14 having the 2 nd main surface. The protective layer 2 is a cover film such as Polyimide (PI), for example, a solder resist mainly composed of an epoxy resin. In other words, the Young's modulus of B is higher than that of A.
The mounting electrodes P1, P2 are formed only on the 1 st main surface VS1 of the resin base 30. As shown in fig. 1, the conductor patterns 41, 42, and 43 included in the resin multilayer substrate 101 are formed except for the interface between the 2 nd main surface VS2 and the protective layer 2. In the present embodiment, the conductor patterns 41, 42, and 43 are formed between the mounting electrodes P1 and P2 when viewed from the stacking direction. Thus, the impact applied to the conductor pattern can be further alleviated than when the conductor pattern is formed in a region other than the region between the mounting electrodes P1 and P2. Further, the conductor pattern for signals, which is likely to affect the characteristics due to peeling caused by an impact, can be selectively protected by being selectively formed between the mounting electrodes P1 and P2 in a plan view.
In the present embodiment, the protective layer 2 is formed on the entire surface of the 2 nd main surface VS2. The 2 conductor patterns 41 and 42 are connected to each other via one interlayer connection conductor V1.
Next, a mounting example of the resin multilayer substrate 101 will be described with reference to the drawings. Fig. 2 is a sectional view showing a main part of an electronic device 301 according to embodiment 1. The resin multilayer substrate 101 according to the present embodiment is a surface-mounted component.
The electronic device 301 includes a resin multilayer substrate 101, a circuit board 201, and the like. On the 1 st surface S1 of the circuit board 201, external electrodes EP1, EP2 and a protective layer 3 are formed. The circuit board 201 is, for example, a glass/epoxy substrate.
In the present embodiment, the circuit board 201 is an example of "another member" in the present invention.
The resin multilayer substrate 101 is mounted on the circuit board 201. Specifically, the mounting electrode P1 of the resin multilayer substrate 101 is connected to the external electrode EP1 of the circuit board 201 via the conductive bonding material 5 such as solder. The mounting electrode P2 of the resin multilayer substrate 101 is connected to the external electrode EP2 of the circuit board 201 via the conductive bonding material 5. Although not shown, other chip components and the like are also mounted on the 1 st surface S1 of the circuit board 201.
As shown in fig. 2, the resin multilayer substrate 101 is mounted on the circuit board 201 such that the 1 st main surface VS1 of the resin base 30 faces the 1 st surface S1 of the circuit board 201. Therefore, the 2 nd main surface VS2 side of the resin base 30 is exposed to the outside. After the resin multilayer board 101 is mounted, the 2 nd main surface VS2 of the resin base 30 may be subjected to an impact from the outside to the 2 nd main surface VS2 (see the hollow arrow in fig. 2) due to, for example, contact of a mounting head when another electronic component is mounted on the 1 st surface S1, contact of a shield case when the shield case is disposed on the 1 st surface S1, or the like.
When the conductor pattern is formed at the interface between the 2 nd main surface VS2 and the protective layer 2, the impact received from the 2 nd main surface VS2 side is directly applied to the conductor pattern, and the conductor pattern is easily damaged (for example, deformation, peeling, breakage, or the like). In addition, even when the hard resist 2 is not formed on the 2 nd main surface VS2, the conductor pattern is easily damaged by an impact applied from the 2 nd main surface VS2 side.
On the other hand, in the present embodiment, the protective layer 2 harder than the 1 st resin layer 14 (see fig. 1) having the 2 nd main surface VS2 (the surface on the opposite side from the mounting surface) is formed on the 2 nd main surface VS2. The conductor pattern 43 formed on the resin substrate 30 is formed on the surface other than the interface between the 2 nd main surface VS2 and the protective layer 2 and other than the protective layer 2. With this structure, the hard resist layer 2 does not directly contact the conductor pattern 43, and the 1 st resin layer 14 (see fig. 1) which is more easily deformed than the resist layer 2 is present between the conductor pattern 43 and the resist layer 2. Therefore, transmission of an impact received from the 2 nd main surface VS2 side to the conductor pattern 43 can be suppressed, and damage to the conductor pattern 43 due to an external impact can be suppressed. Therefore, it is possible to suppress a change in the electrical characteristics of the resin multilayer substrate 101 due to deformation of the conductor pattern 43 by an impact from the outside.
Since the protective layer 2 is not a conductor, the conductor patterns 41, 42, and 43 formed on the resin base 30 are not capacitively coupled to the protective layer 2. Therefore, even if the protective layer 2 deforms when an impact is applied from the 2 nd main surface VS2 side, the electrical characteristics of the resin multilayer substrate are less likely to change than in the case where the protective layer 2 is a conductor (the case where a conductor pattern is formed on the 2 nd main surface VS 2).
In the present embodiment, the protective layer 2 is formed on the entire surface of the 2 nd main surface VS2. With this structure, damage to the conductor pattern when a shock is applied from the 2 nd main surface VS2 side can be further suppressed as compared with the case where the hard resist 2 is formed on a part of the 2 nd main surface VS2.
Further, in the present embodiment, the two conductor patterns 41 and 42 are connected to each other via one interlayer connection conductor V1. When 2 or more interlayer connection conductors formed on different resin layers are directly connected in series in the lamination direction (Z-axis direction) (see the interlayer connection conductors V11 and V12 according to embodiment 2), a connection failure is likely to occur due to stacking misalignment when a plurality of resin layers are laminated. On the other hand, with the above configuration, the interlayer connection conductors formed in different resin layers are not connected to each other, and therefore, a connection failure due to a stacking shift during lamination can be made less likely to occur.
In the present embodiment, the conductor patterns 41, 42, and 43 are disposed on the 1 st main surface VS1 side surface (the lower surface of the 1 st resin layers 11, 12, 13, and 14 in fig. 1) among the plurality of resin layers. With this configuration, the number of resin layers can be reduced compared to a resin base material (see the resin multilayer substrate 102 according to embodiment 2) formed by laminating a resin layer having a conductor pattern disposed on the surface on the 1 st main surface VS1 side and a resin layer having a conductor pattern disposed on the surface on the 2 nd main surface VS2 side, and the number of steps for producing the resin multilayer substrate can be reduced.
In the present embodiment, the resin substrate 30 is formed by laminating a plurality of resin layers (1 st resin layers 11, 12, 13, 14) made of thermoplastic resin. With this structure, as described later in detail, the resin base 30 can be easily formed by collectively pressing a plurality of resin layers. Therefore, the number of steps for manufacturing the resin multilayer substrate 101 can be reduced, and the cost can be reduced. In the present embodiment, the resin substrate 30 is a green body of a thermoplastic resin. With this structure, a resin multilayer substrate that can be easily plastically deformed and can maintain (hold) a desired shape can be realized.
In the present embodiment, the example in which the protective layer 2 is made of the insulating resin harder than the resin material of the 1 st resin layer 14 having the 2 nd main surface VS2 is shown, but the protective layer 2 formed on the 2 nd main surface VS2 is not limited to this configuration. The protective layer 2 may be a hard material containing a filler harder than the resin material of the 1 st resin layer 14 having the 2 nd main surface VS2, for example.
The resin multilayer substrate 101 according to the present embodiment is manufactured by, for example, the following manufacturing method. Fig. 3 is a sectional view sequentially showing the steps of manufacturing the resin multilayer substrate 101. In fig. 3, for the sake of convenience of explanation, a single chip (single piece) drawing is described, but the actual manufacturing process of the resin multilayer substrate 101 is performed in a collective substrate state. The "collective substrate" refers to a substrate including a plurality of resin multilayer substrates 101. This is also the same in the sectional views showing the manufacturing steps described later.
First, as shown in (1) of fig. 3, a plurality of resin layers (1 st resin layers 11, 12, 13, 14) are prepared. The 1 st resin layers 11, 12, 13, and 14 are resin sheets mainly composed of, for example, Liquid Crystal Polymer (LCP), polyether ether ketone (PEEK), or the like.
Then, conductor patterns are formed on the 1 st resin layers 11, 12, 13, and 14, respectively. Specifically, a metal foil (for example, Cu foil) is laminated on the lower surface of the 1 st resin layer, and the metal foil is patterned by photolithography. Thus, the mounting electrodes P1 and P2 are formed on the lower surface of the 1 st resin layer 11, the conductor pattern 41 is formed on the lower surface of the 1 st resin layer 12, the conductor pattern 42 is formed on the lower surface of the 1 st resin layer 13, and the conductor pattern 43 is formed on the lower surface of the 1 st resin layer 14.
Further, an interlayer connection conductor V1 is formed in the 1 st resin layer 12. The interlayer connection conductor V1 is provided by, for example, providing a through hole in the 1 st resin layer 12 by a laser or the like, then disposing a conductive paste containing 1 or more of Cu, Sn, and the like or an alloy thereof, and then curing the paste by heating and pressing.
Next, the 1 st resin layers 11, 12, 13, and 14 are stacked (mounted) in this order. Then, the plurality of 1 st resin layers 11, 12, 13, and 14 are heated and pressed (collectively pressed) in the stacking direction (Z-axis direction), thereby forming the resin base 30 shown in fig. 3 (2).
Then, as shown in fig. 3 (3), the protective layer 1 is formed on the 1 st main surface VS1 of the resin base 30, and the protective layer 2 is formed on the 2 nd main surface VS2 of the resin base 30. The protective layer 2 is made of an insulating resin harder than the resin material (for example, liquid crystal polymer) of the 1 st resin layer 14 having the 2 nd main surface VS2. The protective layers 1 and 2 may be attached to the surface of the resin base 30 by an adhesive, or may be applied to the surface of the resin base 30 and then cured.
The protective layer 1 is a cover film made of, for example, Polyimide (PI), polyethylene terephthalate (PET), or the like, and is a solder resist mainly composed of, for example, an epoxy resin. The protective layer 2 is a cover film such as Polyimide (PI), for example, and is a solder resist mainly composed of an epoxy resin.
Finally, the resin multilayer substrate 101 shown in (3) in fig. 3 is obtained by separating the collective substrate into individual pieces.
With this manufacturing method, a resin multilayer substrate in which changes in electrical characteristics due to damage to the conductor pattern when an external force is applied can be easily manufactured.
In addition, according to this manufacturing method, the resin substrate 30 can be easily formed by collectively pressing the plurality of resin layers (the 1 st resin layers 11, 12, 13, and 14). Therefore, the number of steps for manufacturing the resin multilayer substrate 101 can be reduced, and the cost can be reduced.
EXAMPLE 2 EXAMPLE
Fig. 4 is a cross-sectional view of a resin multilayer substrate 102 according to embodiment 2.
The resin multilayer substrate 102 is different from the resin multilayer substrate 101 according to embodiment 1 in that it includes a resin base 30A and interlayer connection conductors V11 and V12 formed inside the resin base 30A. The other structure of the resin multilayer substrate 102 is substantially the same as that of the resin multilayer substrate 101.
Hereinafter, a description will be given of a portion different from the resin multilayer substrate 101 according to embodiment 1.
The resin substrate 30A is a laminate formed by laminating a plurality of resin layers (1 st resin layers 11, 12, 13, 14, 15). Specifically, the resin substrate 30A is formed by sequentially laminating the 1 st resin layers 11, 12, 13, 14, and 15. The plurality of 1 st resin layers 11, 12, 13, 14, and 15 are the same as the 1 st resin layers 11, 12, 13, and 14 described in embodiment 1.
Mounting electrodes P1 and P2 are formed on the lower surface (surface on the 1 st major surface VS1 side) of the 1 st resin layer 11. The mounting electrodes P1 and P2 are the same as those described in embodiment 1.
The conductor pattern 41 is formed on the lower surface (the 1 st major surface VS1 side surface) of the 1 st resin layer 12. The conductor pattern 41 is the same as that described in embodiment 1. Further, an interlayer connection conductor V11 is formed in the 1 st resin layer 12.
On the upper surface (the 2 nd main surface VS2 side surface) of the 1 st resin layer 13, a conductor pattern 42 is formed. The conductor pattern 42 is a rectangular conductor pattern disposed near the center of the 1 st resin layer 13. Further, an interlayer connection conductor V12 is formed in the 1 st resin layer 13.
On the upper surface (the 2 nd main surface VS2 side surface) of the 1 st resin layer 14, a conductor pattern 43 is formed. The conductor pattern 43 is a rectangular conductor pattern disposed near the center of the 1 st resin layer 14.
The protective layer 1 is formed on the lower surface of the 1 st resin layer 11 (the 1 st main surface VS1 of the resin substrate 30A), and the protective layer 1 is formed on the upper surface of the 1 st resin layer 15 (the 2 nd main surface VS2 of the resin substrate 30A). The protective layers 1 and 2 are substantially the same as those described in embodiment 1.
In the present embodiment, the two conductor patterns 41 and 42 are connected to each other via the two interlayer connection conductors V11 and V12.
The resin multilayer substrate 102 according to the present embodiment also has the same operation and effect as the resin multilayer substrate 101 in that it can suppress a change in electrical characteristics due to damage to the conductor pattern when an external force is applied. However, in order to suppress a connection failure due to stacking misalignment of a plurality of resin layers, a structure in which two conductor patterns are connected via one interlayer connection conductor is preferable as in embodiment 1.
In addition, although the present embodiment shows an example including the resin substrate 30A formed by laminating the resin layer (1 st resin layer 11) and the resin layers (1 st resin layers 14 and 15), the resin layer (1 st resin layer 11) having the conductor pattern arranged on the surface on the 1 st main surface VS1 side and the resin layers (1 st resin layers 14 and 15) having the conductor pattern arranged on the surface on the 2 nd main surface VS2 side, the configuration shown in embodiment 1 is preferable in terms of reduction in the number of resin layers forming the resin substrate and reduction in the manufacturing process. That is, in terms of reducing the number of resin layers and reducing the number of manufacturing steps, a structure in which each of the plurality of conductor patterns is disposed on the 1 st main surface VS1 side among the plurality of resin layers is preferable. When the plurality of conductor patterns are disposed on the surface on the 1 st main surface VS1 side of the plurality of resin layers, the 1 st resin layer 15 on which no conductor pattern is formed does not need to be disposed between the resist 2 and the conductor pattern 43 shown in fig. 4. In addition, in order to connect the conductor pattern 42 disposed on the 2 nd main surface VS2 side surface of the 1 st resin layer 13 and the conductor pattern 41 disposed on the 1 st main surface VS1 side surface of the 1 st resin layer 12, it is also not necessary to connect two interlayer connection conductors in the stacking direction.
EXAMPLE 3
In embodiment 3, an example is shown in which the resin base material includes a plurality of resin layers made of different resin materials.
Fig. 5 is a cross-sectional view of a resin multilayer substrate 103 according to embodiment 3.
The resin multilayer substrate 103 is different from the resin multilayer substrate 101 according to embodiment 1 in that it includes the resin base 30B. The other structure of the resin multilayer substrate 103 is substantially the same as that of the resin multilayer substrate 101.
Hereinafter, a description will be given of a portion different from the resin multilayer substrate 101 according to embodiment 1.
The resin substrate 30B is a laminate formed by laminating a plurality of resin layers (the 1 st resin layers 11, 12, 13, 14 and the 2 nd resin layers 21, 22, 23). Specifically, the resin substrate 30B is formed by sequentially laminating a 1 st resin layer 11, a 2 nd resin layer 21, a 1 st resin layer 12, a 2 nd resin layer 22, a 1 st resin layer 13, a 2 nd resin layer 23, and a 1 st resin layer 14. The 2 nd resin layers 21, 22, and 23 are layers made of a resin material different from the 1 st resin layers 11, 12, 13, and 14.
The 1 st resin layers 11, 12, 13, and 14 are resin sheets mainly composed of, for example, Liquid Crystal Polymer (LCP), polyether ether ketone (PEEK), or the like. The 2 nd resin layers 21, 22, and 23 are resin sheets mainly composed of a fluororesin such as Perfluoroalkoxyalkane (PFA) or Polytetrafluoroethylene (PTFE), for example.
Mounting electrodes P1 and P2 are formed on the lower surface (surface on the 1 st major surface VS1 side) of the 1 st resin layer 11. On the lower surface (surface on the 1 st main surface VS1 side) of the 1 st resin layer 12, a conductor pattern 41 is formed. On the lower surface (the 1 st major surface VS1 side surface) of the 1 st resin layer 13, a conductor pattern 42 is formed. On the lower surface (the 1 st major surface VS1 side surface) of the 1 st resin layer 14, a conductor pattern 43 is formed. The mounting electrodes P1, P2 and the conductor patterns 41, 42, 43 are the same as those described in embodiment 1.
In this way, the resin base material may be a composite laminate composed of different resin materials.
In the present embodiment, the 2 nd resin layer is sandwiched by two 1 st resin layers among the plurality of 1 st resin layers. Specifically, as shown in fig. 5, the 2 nd resin layer 21 is sandwiched between the two 1 st resin layers 11, 12, the 2 nd resin layer 22 is sandwiched between the two 1 st resin layers 12, 13, and the 2 nd resin layer 23 is sandwiched between the two 1 st resin layers 13, 14 (the 1 st resin layer 14 is the 1 st resin layer having the 2 nd main surface). With this configuration, since there are a plurality of joint surfaces between the 1 st resin layer and the 2 nd resin layer, stress generated by application of an external force due to a difference in linear expansion coefficient between the 1 st resin layer and the 2 nd resin layer is dispersed without being concentrated on one of the joint surfaces. Therefore, even when an impact is applied from the outside due to a difference in linear expansion coefficient between the resin layers, the occurrence of interlayer peeling can be suppressed as compared with a resin base material in which one joint surface of the 1 st resin layer and the 2 nd resin layer is formed.
Further, in the present embodiment, if the protective layer 2 is harder than the 1 st resin layer 14 and the 1 st resin layer 14 is harder than the 2 nd resin layer 23, stress applied to the conductor pattern 43 formed between the 1 st resin layer 14 and the 2 nd resin layer 23 can be more dispersed by a continuous change in hardness.
In the present embodiment, an example is shown in which all of the plurality of 2 nd resin layers 21, 22, and 23 are sandwiched between two 1 st resin layers, but the present invention is not limited to this configuration. In addition, when at least one of the plurality of 2 nd resin layers is sandwiched between two 1 st resin layers, the above-described operation and effect are exhibited. Among them, in order to suppress the occurrence of interlayer peeling, it is preferable that all of the plurality of 2 nd resin layers are sandwiched between the two 1 st resin layers. The number of the 2 nd resin layer is not limited to a plurality, and may be one.
In the present embodiment, the resin base 30B includes the 2 nd resin layers 21, 22, and 23 having superior high-frequency characteristics to the 1 st resin layers 11, 12, 13, and 14. Therefore, a resin multilayer substrate having excellent high-frequency characteristics can be realized as compared with a case where the resin base material is formed only of the 1 st resin layers 11, 12, 13, and 14. Specifically, the relative dielectric constant (2) of the 2 nd resin layers 21, 22, 23 is lower than the relative dielectric constant (1) of the 1 st resin layers 11, 12, 13, 14 (2 < 1). Therefore, when a circuit having predetermined characteristics is formed on the resin multilayer substrate, the line width of the signal line (conductor pattern) formed on the resin base 30B can be increased, and the conductor loss of the circuit can be reduced. In addition, in the present embodiment, the dielectric loss tangent (tan2) of the 2 nd resin layers 21, 22, 23 is smaller than the dielectric loss tangent (tan1) of the 1 st resin layers 11, 12, 13, 14 (tan2 < tan 1). Therefore, the dielectric loss can be reduced as compared with the case where the resin base is formed by laminating only the plurality of 1 st resin layers 11, 12, 13, and 14.
The resin multilayer substrate 103 according to the present embodiment is manufactured by, for example, the following manufacturing method. Fig. 6 is a sectional view sequentially showing the steps of manufacturing the resin multilayer substrate 103.
First, as shown in fig. 6 (1), a plurality of resin layers (1 st resin layers 11, 12, 13, 14 and 2 nd resin layers 21, 22, 23) are prepared. The 1 st resin layers 11, 12, 13, and 14 are resin sheets mainly composed of, for example, Liquid Crystal Polymer (LCP), polyether ether ketone (PEEK), or the like. The 2 nd resin layers 21, 22, and 23 are resin sheets mainly composed of a fluororesin such as Perfluoroalkoxyalkane (PFA) or Polytetrafluoroethylene (PTFE), for example.
Then, conductor patterns are formed on the 1 st resin layers 11, 12, 13, and 14, respectively. Specifically, a metal foil (for example, Cu foil) is laminated on the lower surfaces of the 1 st resin layers 11, 12, 13, and 14, and the metal foil is patterned by photolithography. Thus, the mounting electrodes P1 and P2 are formed on the lower surface of the 1 st resin layer 11, the conductor pattern 41 is formed on the lower surface of the 1 st resin layer 12, the conductor pattern 42 is formed on the lower surface of the 1 st resin layer 13, and the conductor pattern 43 is formed on the lower surface of the 1 st resin layer 14.
Although not shown, interlayer connection conductors are formed in the 1 st resin layers 11, 12, 13, and 14 and the 2 nd resin layers 21, 22, and 23. The interlayer connection conductor is formed by, for example, providing a through hole in the resin layer by a laser or the like, then providing a conductive paste containing 1 or more of Cu, Sn, and the like or an alloy thereof, and then curing the paste by heating and pressing.
Next, the 1 st resin layer 11, the 2 nd resin layer 21, the 1 st resin layer 12, the 2 nd resin layer 22, the 1 st resin layer 13, the 2 nd resin layer 23, and the 1 st resin layer 14 are laminated (mounted) in this order. Then, the plurality of resin layers (the 1 st resin layers 11, 12, 13, 14 and the 2 nd resin layers 21, 22, 23) are heated and pressed (collectively pressed) in the stacking direction (Z-axis direction), thereby forming a resin base 30B shown in (2) in fig. 6.
Then, the protective layer 1 is formed on the 1 st main surface VS1 of the resin base 30B, and the protective layer 2 is formed on the 2 nd main surface VS2 of the resin base 30B. The protective layer 2 is made of a resin material harder than the resin material (for example, liquid crystal polymer) of the 1 st resin layer 14 having the 2 nd main surface VS2.
Finally, the resin multilayer substrate 103 shown in (3) in fig. 6 is obtained by separating the collective substrate into individual pieces.
Other embodiments
In the embodiments described above, the resin multilayer substrate is an example of a surface-mount component mounted on a circuit board, but the application of the resin multilayer substrate of the present invention is not limited to this. The resin multilayer substrate of the present invention may be a cable connecting two circuit boards to each other, or a cable connecting a circuit board and another component to each other. Further, a connector (other member) may be provided on the resin multilayer substrate as necessary.
In the embodiments described above, the resin base material is a rectangular flat plate, but the present invention is not limited to this configuration. The shape of the resin base material can be appropriately changed within the range that achieves the operation and effect of the present invention. The resin base material may have, for example, an L-shape, a crank-shape, a T-shape, a Y-shape, or the like in plan view. The resin multilayer substrate may have a bent portion, a part of which is bent.
In the embodiments described above, the resin base material in which 4, 5, or 7 resin layers are laminated is shown, but the resin base material of the present invention is not limited to this structure. The number of layers of the resin layer forming the resin base material can be appropriately changed within the range of achieving the operation and effect of the present invention. In the above-described embodiments, the resin multilayer substrate in which the protective layer 2 is formed on the entire surface of the 2 nd main surface VS2 is shown as an example, but the present invention is not limited to this configuration. The protective layer 2 may be formed on a part of the 2 nd main surface VS2. In addition, in the resin multilayer substrate of the present invention, the protective layer 1 formed on the 1 st main surface VS1 is not required.
In the embodiments described above, the resin base material is an example of a green body made of a thermoplastic resin, but the present invention is not limited to this configuration. The resin substrate may be a green body made of a thermosetting resin. In the above embodiments, the resin base material is formed by laminating a plurality of resin layers made of thermoplastic resin, but the present invention is not limited to this structure. The resin substrate may be a laminate of a resin layer made of a thermoplastic resin and a resin layer made of a thermosetting resin. The resin base is not limited to a member in which a plurality of resin layers are heated and pressed (collectively pressed) to melt the surfaces thereof, and may have a structure in which an adhesive layer is provided between the respective resins. For example, the resin layers may be bonded to each other via an adhesive layer, or any of the plurality of resin layers may be a layer having adhesiveness.
In the above-described embodiments, the resin multilayer substrate in which the rectangular conductor patterns 41, 42, and 43 are formed on the resin base material is exemplified, but the present invention is not limited to this configuration. The shape, number, and arrangement of the conductor patterns formed on the resin base material can be appropriately changed within the range that achieves the operation and effect of the present invention. In addition, the circuit formed on the resin multilayer substrate can be appropriately changed within the range of achieving the operation and effect of the present invention. The circuit formed on the resin multilayer substrate may be formed with a frequency filter such as a coil formed of a conductor pattern, a capacitor formed of a conductor pattern, and various filters (a low-pass filter, a high-pass filter, a band-pass filter, and a band-stop filter). In addition, various transmission lines (strip lines, microstrip lines, coplanar lines, and the like) may be formed on the resin multilayer substrate, for example. Further, various electronic components such as chip components may be mounted on or embedded in the resin multilayer substrate.
In the above embodiments, the rectangular mounting electrodes P1 and P2 are formed on the 1 st main surface VS1 of the resin base material, but the present invention is not limited to this configuration. The shape and number of the mounting electrodes can be appropriately changed within the range of achieving the operation and effect of the present invention. The shape of the mounting electrode in plan view may be, for example, polygonal, circular, elliptical, circular arc, annular, L-shaped, U-shaped, T-shaped, Y-shaped, crank-shaped, or the like. The arrangement of the mounting electrodes can be changed as appropriate if they are formed on the 1 st main surface VS1.
Finally, the above description of the embodiments is by way of example in all respects and not by way of limitation. And can be appropriately modified and changed by those skilled in the art. The scope of the present invention is defined not by the above embodiments but by the appended claims. Further, the scope of the present invention includes modifications from the embodiments within the scope equivalent to the claims.
Claims (18)
1. A resin multilayer substrate is characterized by comprising:
a resin substrate having a 1 st main surface and a 2 nd main surface opposed to each other, the resin substrate being formed by laminating a plurality of resin layers including a plurality of 1 st resin layers;
a mounting electrode formed only on the 1 st main surface;
a protective layer formed on the 2 nd main surface and harder than the 1 st resin layer having the 2 nd main surface among the plurality of resin layers; and
a conductor pattern formed on the resin base material,
the conductor pattern is formed outside the interface between the 2 nd main surface and the protective layer and outside the protective layer.
2. A resin multilayer substrate is characterized by comprising:
a resin substrate having a 1 st main surface and a 2 nd main surface opposed to each other, the resin substrate being formed by laminating a plurality of resin layers including a plurality of 1 st resin layers;
a mounting electrode formed only on the 1 st main surface;
a protective layer formed on the 2 nd main surface and containing a filler harder than the 1 st resin layer having the 2 nd main surface among the plurality of resin layers; and
a conductor pattern formed on the resin base material,
the conductor pattern is formed outside the interface between the 2 nd main surface and the protective layer and outside the protective layer.
3. The resin multilayer substrate according to claim 1 or 2,
at least two of the mounting electrodes are formed, and the conductor pattern is formed between the two mounting electrodes when viewed from the laminating direction.
4. The resin multilayer substrate according to claim 1 or 2,
the plurality of resin layers includes a 2 nd resin layer, the 2 nd resin layer being composed of a different resin material from the plurality of 1 st resin layers.
5. The resin multilayer substrate according to claim 4,
the 2 nd resin layer is formed in contact with the 1 st resin layer having the 2 nd main surface, and the conductor pattern is provided between the 1 st resin layer having the 2 nd main surface and the 2 nd resin layer.
6. The resin multilayer substrate according to claim 5,
the 1 st resin layer having the 2 nd main surface is harder than the 2 nd resin layer.
7. The resin multilayer substrate according to claim 4,
at least one of the 2 nd resin layers is sandwiched by two 1 st resin layers among the plurality of 1 st resin layers.
8. The resin multilayer substrate according to claim 1 or 2,
the protective layer is formed on the entire 2 nd main surface.
9. The resin multilayer substrate according to claim 1 or 2,
the plurality of resin layers are made of thermoplastic resin.
10. The resin multilayer substrate according to claim 1 or 2,
the resin multilayer substrate further comprises an interlayer connection conductor formed on the resin base material,
the number of the conductor patterns is plural,
two of the plurality of conductor patterns are connected to each other via one of the interlayer connection conductors.
11. The resin multilayer substrate according to claim 1 or 2,
the number of the conductor patterns is plural,
the plurality of conductor patterns are disposed on the surface of the 1 st principal surface side among the surfaces of the plurality of resin layers.
12. An electronic device, characterized in that,
comprises a resin multilayer substrate and other members connected to the resin multilayer substrate,
the resin multilayer substrate includes:
a resin substrate having a 1 st main surface and a 2 nd main surface opposed to each other, the resin substrate being formed by laminating a plurality of resin layers including a plurality of 1 st resin layers;
a mounting electrode formed only on the 1 st main surface;
a protective layer formed on the 2 nd main surface and harder than the 1 st resin layer having the 2 nd main surface among the plurality of resin layers; and
a conductor pattern formed on the resin base material,
the conductor pattern is formed outside the interface between the 2 nd main surface and the protective layer and outside the protective layer,
the mounting electrode of the resin multilayer substrate is connected to the other member.
13. An electronic device, characterized in that,
comprises a resin multilayer substrate and other members connected to the resin multilayer substrate,
the resin multilayer substrate includes:
a resin substrate having a 1 st main surface and a 2 nd main surface opposed to each other, the resin substrate being formed by laminating a plurality of resin layers including a plurality of 1 st resin layers;
a mounting electrode formed only on the 1 st main surface;
a protective layer formed on the 2 nd main surface and containing a filler harder than a resin material of the 1 st resin layer having the 2 nd main surface among the plurality of resin layers; and
a conductor pattern formed on the resin base material,
the conductor pattern is formed outside the interface between the 2 nd main surface and the protective layer and outside the protective layer,
the mounting electrode of the resin multilayer substrate is connected to the other member.
14. The electronic device of claim 12 or 13,
at least two of the mounting electrodes are formed, and the conductor pattern is formed between the two mounting electrodes when viewed from the laminating direction.
15. The electronic device of claim 12 or 13,
the plurality of resin layers includes a 2 nd resin layer, the 2 nd resin layer being composed of a different resin material from the plurality of 1 st resin layers.
16. The electronic device of claim 15,
the 2 nd resin layer is formed in contact with the 1 st resin layer having the 2 nd main surface, and the conductor pattern is provided between the 1 st resin layer having the 2 nd main surface and the 2 nd resin layer.
17. The electronic device of claim 16,
the 1 st resin layer having the 2 nd main surface is harder than the resin material of the 2 nd resin layer.
18. The electronic device of claim 15,
at least one of the 2 nd resin layers is sandwiched by two 1 st resin layers among the plurality of 1 st resin layers.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018-221370 | 2018-11-27 | ||
| JP2018221370A JP2020088197A (en) | 2018-11-27 | 2018-11-27 | Resin multilayer substrate and electronic apparatus |
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| Publication Number | Publication Date |
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| CN211828497U true CN211828497U (en) | 2020-10-30 |
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| CN201922028979.4U Active CN211828497U (en) | 2018-11-27 | 2019-11-20 | Resin multilayer substrate and electronic device |
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| CN (1) | CN211828497U (en) |
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| WO2024080221A1 (en) * | 2022-10-13 | 2024-04-18 | 三井金属鉱業株式会社 | Circuit board manufacturing method |
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