CN210723023U - 一种bga封装结构 - Google Patents

一种bga封装结构 Download PDF

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Publication number
CN210723023U
CN210723023U CN201922114501.3U CN201922114501U CN210723023U CN 210723023 U CN210723023 U CN 210723023U CN 201922114501 U CN201922114501 U CN 201922114501U CN 210723023 U CN210723023 U CN 210723023U
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chip
flash memory
substrate
chips
memory chip
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韩磊磊
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Yuancheng Technology (Suzhou) Co.,Ltd.
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Powertech Technology Suzhou Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Abstract

本实用新型公开了一种BGA封装结构，其涉及BGA封装技术领域。旨在解决现有BGA封装结构中，芯片堆叠时若上层芯片悬空距离太大会导致结构不稳定的问题。其技术方案要点包括基板，所述基板上设置有闪存芯片，所述闪存芯片上分别设置有控制芯片以及若干堆叠的存储芯片；所述存储芯片一端凸出于所述闪存芯片，呈悬空状态，且所述基板上设置有与所述存储芯片悬空端底壁接触的垫片。本实用新型能够提高结构稳定性，同时在整体封装尺寸不变的情况下，可以封装更大尺寸以及更多数量的芯片，保证电性能并提高存储容量。

Description

一种BGA封装结构
技术领域
本实用新型涉及BGA封装技术领域，更具体地说，它涉及一种BGA封装结构。
背景技术
BGA(Ball Grid Array)是当前主流封装方式之一，具有更小体积，更好的散热性能和电性能等优点。
目前BGA封装产品，通常是芯片挨着芯片或者芯片堆叠芯片的结构。芯片堆叠芯片时，会存在上层芯片悬空距离太大的情况，导致芯片受力不平衡，则堆叠的结构就不稳定，若采用芯片side by side堆叠，会导致现有封装的连线边长，有限的封装尺寸无法塞进。
实用新型内容
针对现有技术存在的不足，本实用新型的目的在于提供一种BGA封装结构，其具有提高结构稳定性的优势。
为实现上述目的，本实用新型提供了如下技术方案：
一种BGA封装结构，包括基板，所述基板上设置有闪存芯片，所述闪存芯片上分别设置有控制芯片以及若干堆叠的存储芯片；所述存储芯片一端凸出于所述闪存芯片，呈悬空状态，且所述基板上设置有与所述存储芯片悬空端底壁接触的垫片。
进一步地，若干所述存储芯片，其长边与长边对齐，短边与短边对齐，且所述存储芯片的短边与所述垫片的长边对齐，所述垫片的短边与所述存储芯片的长边对齐。
进一步地，所述控制芯片与所述存储芯片分别位于所述闪存芯片两端。
综上所述，本实用新型具有以下有益效果：
1、采用垫片和闪存芯片配合，同时承载多层的存储芯片，能够提高结构稳定性；
2、在整体封装尺寸不变的情况下，在闪存芯片上分别设置控制芯片以及多层存储芯片，能够提高存储容量。
附图说明
图1为实施例中一种BGA封装结构的示意图一；
图2为实施例中一种BGA封装结构的示意图二。
图中：1、基板；2、闪存芯片；3、垫片；4、控制芯片；5、存储芯片；6、金线。
具体实施方式
以下结合附图对本实用新型作进一步详细说明。
本具体实施例仅仅是对本实用新型的解释，其并不是对本实用新型的限制，本领域技术人员在阅读完本说明书后可以根据需要对本实施例做出没有创造性贡献的修改，但只要在本实用新型的权利要求范围内都受到专利法的保护。
实施例：
一种BGA封装结构，参照图1和图2，其包括基板1，基板1上设置有闪存芯片2，闪存芯片2上分别设置有控制芯片4以及若干堆叠的存储芯片5，本实施例中控制芯片4与存储芯片5分别位于闪存芯片2两端；存储芯片5一端凸出于闪存芯片2，呈悬空状态，且基板1上设置有与存储芯片5悬空端底壁接触的垫片3；各元件之间通过金线6连接。
参照图1和图2，若干存储芯片5，其长边与长边对齐，短边与短边对齐，且存储芯片5的短边与垫片3的长边对齐，垫片3的短边与存储芯片5的长边对齐；垫片3与存储芯片5对齐设置，便于实现塑封树脂更好的填充，完成塑封。

Claims (3)

1.一种BGA封装结构，其特征在于：包括基板，所述基板上设置有闪存芯片，所述闪存芯片上分别设置有控制芯片以及若干堆叠的存储芯片；所述存储芯片一端凸出于所述闪存芯片，呈悬空状态，且所述基板上设置有与所述存储芯片悬空端底壁接触的垫片。
2.根据权利要求1所述的BGA封装结构，其特征在于：若干所述存储芯片，其长边与长边对齐，短边与短边对齐，且所述存储芯片的短边与所述垫片的长边对齐，所述垫片的短边与所述存储芯片的长边对齐。
3.根据权利要求1或2所述的BGA封装结构，其特征在于：所述控制芯片与所述存储芯片分别位于所述闪存芯片两端。
CN201922114501.3U 2019-11-29 2019-11-29 一种bga封装结构 Active CN210723023U (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114266335A (zh) * 2021-12-27 2022-04-01 至誉科技（武汉）有限公司 一种固态存储卡

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114266335A (zh) * 2021-12-27 2022-04-01 至誉科技（武汉）有限公司 一种固态存储卡

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Address after: 215000 33 Xinghai street, Suzhou Industrial Park, Suzhou City, Jiangsu Province

Patentee after: Yuancheng Technology (Suzhou) Co.,Ltd.

Address before: 215000 33 Xinghai street, Suzhou Industrial Park, Suzhou City, Jiangsu Province

Patentee before: Powertech Technology (Suzhou) Co.,Ltd.