CN209981205U - 一种高散热插件二极管 - Google Patents

一种高散热插件二极管 Download PDF

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CN209981205U
CN209981205U CN201920916021.6U CN201920916021U CN209981205U CN 209981205 U CN209981205 U CN 209981205U CN 201920916021 U CN201920916021 U CN 201920916021U CN 209981205 U CN209981205 U CN 209981205U
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copper wire
wire section
semiconductor chip
heat dissipation
product
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任志红
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Shandong Yuanjie Electronic Technology Co Ltd
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Shandong Yuanjie Electronic Technology Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331Disposition
    • H01L2224/3318Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181On opposite sides of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

本实用新型涉及一种高散热插件二极管,包括第一铜导线段、第二铜导线段、平行置于第一铜导线段与第二铜导线段之间的半导体芯片以及用以封装半导体芯片、第一铜导线段和第二铜导线段的绝缘塑封体,所述第一铜导线段的前端部通过铅锡焊料与半导体芯片的输入端端面扁平式连接,所述第二铜导线段的后端部通过铅锡焊料与半导体芯片的输出端端面扁平式连接;本实用新型的有益效果为:1、通过将芯片平行于导线组装,相同的外形尺寸内可以放入更大尺寸的芯片,提高产品的额定功率;2、增加产品内部的铜导线面积,扩大芯片的散热面积,可以有效的降低产品失效率。

Description

一种高散热插件二极管
技术领域
本实用新型涉及二极管技术领域,具体来说是涉及一种高散热插件二极管。
背景技术
目前,半导体二极管中芯片与导线之间多是采用引线式的连接方式,再通过封装体将芯片封装,芯片与铜导线之间侧立组装,且圆柱型的封装体的直径尺寸限制了大尺寸芯片的封装,无法实现更大功率尺寸芯片的封装,同时,铜材质导线因截面积太小,不利于芯片的散热,容易造成高温电芯失效。
发明内容
本实用新型的目的是为了解决上述所存在的缺陷,提供一种可矿大芯片的散热面积,且有效降低产品失效率的高散热插件二极管。
为实现上述目的,本实用新型的技术方案如下:
一种高散热插件二极管,其特征在于,包括第一铜导线段、第二铜导线段、平行置于第一铜导线段与第二铜导线段之间的半导体芯片以及用以封装半导体芯片、第一铜导线段和第二铜导线段的绝缘塑封体,所述第一铜导线段的前端部通过铅锡焊料与半导体芯片的输入端端面扁平式连接,所述第二铜导线段的后端部通过铅锡焊料与半导体芯片的输出端端面扁平式连接。
作为优选的技术方案,所述绝缘塑封体为环氧树脂塑封体。
本实用新型的有益效果为:1、通过将芯片平行于导线组装,相同的外形尺寸内可以放入更大尺寸的芯片,提高产品的额定功率;2、增加产品内部的铜导线面积,扩大芯片的散热面积,可以有效的降低产品失效率。
附图说明
图1为本实用新型一种高散热插件二极管的结构示意图。
图中:1-第一铜导线段、2-第二铜导线段、3-半导体芯片、4-绝缘塑封体。
具体实施方式
为使对本实用新型的结构特征及所达成的功效有更进一步的了解与认识,用以较佳的实施例及附图配合详细的说明,说明如下:
如图1所示,一种高散热插件二极管,包括第一铜导线段1、第二铜导线段2、平行置于第一铜导线段1与第二铜导线段2之间的半导体芯片3以及用以封装半导体芯片3、第一铜导线段1和第二铜导线段2的绝缘塑封体4,第一铜导线段1的前端部通过铅锡焊料与半导体芯片3的输入端端面扁平式连接,第二铜导线段2的后端部通过铅锡焊料与半导体芯片3的输出端端面扁平式连接。
在本实施例中,绝缘塑封体4为环氧树脂塑封体,可防止湿气,机械应力对半导体芯片产生损伤。
在本实施例中,半导体芯片3采用SIPOS工艺的玻璃钝化保护技术,高温工作下反向漏电更小,可靠性更高,相同的封装体积下,工作电流能力可以从目前的8A增加到最大15A的工作电流;同时,本产品可以使用在AC/DC电源前端整流,以及整流后的续流端(主要用于一般家电、信息化机器、通信机器、照明电源及音响机器中),替换目前的插件快恢复系列二极管;
上述高散热插件二极管,通过将半导体芯片3平行于铜导线组装,相同的外形尺寸内可以放入更大尺寸的半导体芯片3,提高产品的额定功率;同时,增加产品内部的铜导线面积,扩大半导体芯片3的散热面积,可以有效的降低产品失效率。
综上所述,仅为本实用新型的较佳实施例而已,并非用来限定本实用新型实施的范围,凡依本实用新型权利要求范围所述的形状、构造、特征及精神所为的均等变化与修饰,均应包括于本实用新型的权利要求范围内。

Claims (2)

1.一种高散热插件二极管,其特征在于,包括第一铜导线段、第二铜导线段、平行置于第一铜导线段与第二铜导线段之间的半导体芯片以及用以封装半导体芯片、第一铜导线段和第二铜导线段的绝缘塑封体,所述第一铜导线段的前端部通过铅锡焊料与半导体芯片的输入端端面扁平式连接,所述第二铜导线段的后端部通过铅锡焊料与半导体芯片的输出端端面扁平式连接。
2.根据权利要求1所述的一种高散热插件二极管,其特征在于:所述绝缘塑封体为环氧树脂塑封体。
CN201920916021.6U 2019-06-18 2019-06-18 一种高散热插件二极管 Active CN209981205U (zh)

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