CN209374431U - A kind of chip on chip packages structure - Google Patents

A kind of chip on chip packages structure Download PDF

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Publication number
CN209374431U
CN209374431U CN201920244430.6U CN201920244430U CN209374431U CN 209374431 U CN209374431 U CN 209374431U CN 201920244430 U CN201920244430 U CN 201920244430U CN 209374431 U CN209374431 U CN 209374431U
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CN
China
Prior art keywords
chip
substrate
groove
slot
capping
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201920244430.6U
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Chinese (zh)
Inventor
彭朝亮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huaxin Zhizao Microelectronics Chongqing Co ltd
Original Assignee
Huaxin Zhisheng Microelectronics (chongqing) Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huaxin Zhisheng Microelectronics (chongqing) Co Ltd filed Critical Huaxin Zhisheng Microelectronics (chongqing) Co Ltd
Priority to CN201920244430.6U priority Critical patent/CN209374431U/en
Application granted granted Critical
Publication of CN209374431U publication Critical patent/CN209374431U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model discloses a kind of chip on chip packages structures, including substrate, the article putting groove of opening upwards is equipped in the substrate, and chip body is equipped in article putting groove, the two sides side wall of the chip body is equipped with the pin being arranged, and the upside side wall of substrate is equipped with and is equipped with groove with pin, the upper end of the substrate is equipped with the capping being equipped with it, and the sealing mechanism being equipped with groove is equipped in capping, the downside side wall of the capping is fixedly connected with symmetrically arranged two groups of elastic pieces, and the upside side wall of substrate is equipped with the slot being equipped with elastic piece, the lower end of the elastic piece is fixedly connected with fixture block, and the side inner wall of slot is equipped with the card slot being equipped with fixture block, the opening of the slot is equipped with the arc guide groove being equipped with fixture block.The utility model is easy to operate, easy to use, and the chip body in device is easy for installation and quick, has saved the packaging time of chip, has improved work efficiency.

Description

A kind of chip on chip packages structure
Technical field
The utility model relates to encapsulating structure technical field more particularly to a kind of chip on chip packages structures.
Background technique
Chip, also known as microcircuit, microchip, integrated circuit.Refer to the silicon wafer for including integrated circuit, volume very little, usually It is computer or a part of other electronic equipments.To protect chip body not corroded by the substance in outside air, need It is packaged, existing encapsulation operation is more troublesome, and when being packaged to it, the consuming time is longer, to reduce Working efficiency.
Existing chip packaging operation is more troublesome, and the consuming time is longer, to reduce working efficiency;For this purpose, we A kind of chip on chip packages structure is proposed to solve the above problems.
Utility model content
Purpose of the utility model is to solve existing chip packaging operations existing in the prior art to be more troublesome, It is longer to expend the time, thus the problems such as reducing working efficiency, and a kind of chip on chip packages structure proposed.
To achieve the goals above, the utility model adopts the technical scheme that
A kind of chip on chip packages structure, including substrate are equipped with the article putting groove of opening upwards, and glove in the substrate Chip body is equipped in slot, the two sides side wall of the chip body is equipped with the pin being arranged, and the upside side wall of substrate Equipped with groove is equipped with pin, the upper end of the substrate is equipped with the capping being equipped with it, and be equipped in covering with it is recessed The sealing mechanism that slot is equipped with, the downside side wall of the capping are fixedly connected with symmetrically arranged two groups of elastic pieces, and substrate Upside side wall be equipped with the slot that is equipped with elastic piece, the lower end of the elastic piece is fixedly connected with fixture block, and slot Side inner wall is equipped with the card slot being equipped with fixture block, and the opening of the slot is equipped with the arcuate guide being equipped with fixture block Slot.
Preferably, the sealing mechanism mass sealing block is equipped with two rows of sliding slots that Open Side Down, and sliding slot in the capping Upper inside walls sealing block is connected with by the first spring, multiple sliding slots are arranged in a one-to-one correspondence with groove, the sealing block It offsets setting with pin.
Preferably, the downside inner wall of the article putting groove is equipped with the mounting groove of opening upwards, and the downside inner wall of mounting groove is logical It crosses second spring and is connected with follow block, the chip body and follow block offset setting.
Preferably, the inner wall of the groove is equipped with the first gasket.
Preferably, the capping and the junction of substrate are equipped with the second gasket.
Preferably, the substrate and capping are made of high-cooling property material.
The technical solution that the embodiments of the present invention provide can include the following benefits:
1, the utility model is easy to operate, easy to use, and the chip body in device is easy for installation and quick, as long as will envelope Lid alignment substrate is pressed downwards, cover board can be made to fix with substrate, saved the packaging time of chip, and work effect is improved Rate.
2, by the first gasket of setting and the second gasket, the potting of chip body is improved, is effectively prevent Outside air enters in article putting groove and corrodes chip body, and chip body when in use, can generate a large amount of heat, is dissipated by height The heat that substrate made of thermal conductive material and capping can effectively generate chip body radiates, and protects the safety of chip, Improve its service life.
Detailed description of the invention
Fig. 1 be the utility model proposes a kind of chip on chip packages structure schematic view of the front view;
Fig. 2 be the utility model proposes a kind of chip on chip packages structure side structure schematic view;
Fig. 3 is the structural schematic diagram in Fig. 1 at A;
Fig. 4 is the structural schematic diagram in Fig. 1 at B;
Fig. 5 is the structural schematic diagram in Fig. 2 at C.
In figure: 1 substrate, 2 article putting grooves, 3 chip bodies, 4 pins, 5 grooves, 6 cappings, 7 elastic pieces, 8 slots, 9 fixture blocks, 10 Card slot, 11 arc guide grooves, 12 sliding slots, 13 first springs, 14 sealing blocks, 15 mounting grooves, 16 second springs, 17 follow blocks.
Specific embodiment
The following will be combined with the drawings in the embodiments of the present invention, carries out the technical scheme in the embodiment of the utility model Clearly and completely describe, it is clear that the described embodiments are only a part of the embodiments of the utility model, rather than whole Embodiment.
Referring to Fig.1-5, a kind of chip on chip packages structure, including substrate 1 are equipped with the glove of opening upwards in substrate 1 Slot 2, and chip body 3 is equipped in article putting groove 2, the two sides side wall of chip body 3 is equipped with the pin 4 being arranged, and substrate 1 Upside side wall be equipped with and be equipped with groove 5 with pin 4, the upper end of substrate 1 is equipped with the capping 6 being equipped with it, and covers 6 In be equipped with the sealing mechanism that is equipped with groove 5, the downside side wall for covering 6 is fixedly connected with symmetrically arranged two groups of elastic pieces 7, and the upside side wall of substrate 1 is equipped with the slot 8 being equipped with elastic piece 7, the lower end of elastic piece 7 is fixedly connected with fixture block 9, And the side inner wall of slot 8 is equipped with the card slot 10 being equipped with fixture block 9, the opening of slot 8 is equipped with to be equipped with fixture block 9 Arc guide groove 11;
It should be noted that chip body 3 is directed at the article putting groove 2 on substrate 1 when being packaged to chip body 3 It puts into, 4 alignment indentation 5 of pin sticks into, and the elastic piece 7 in capping 6 is injected from slot 8, the fixture block 9 and arc on elastic piece 7 It is slided on guide groove 11, elastic piece 7 is squeezed, making elastic piece 7, deformation occurs, slides into slot 8 in fixture block 9 and is located at card slot 10 Position when, under the resilient force of elastic piece 7, fixture block 9 is sticked into card slot 10, is stuck in elastic piece 7 in slot 8, will be sealed Lid 6 is fixed with substrate 1, to be packaged to chip body 3, the chip body 3 in the present apparatus is easy for installation and quick, section The about packaging time of chip, improves work efficiency;
Wherein, sealing mechanism mass sealing block 14 covers and is equipped with two rows of sliding slots 12 that Open Side Down in 6, and sliding slot 12 Upper inside walls are connected with sealing block 14 by the first spring 13, and multiple sliding slots 12 are arranged in a one-to-one correspondence with groove 5, sealing block 14 and Pin 4 offsets setting;
It should be noted that the first spring 13 squeezes sealing block 14 to sticking into pin 4 after the completion of chip body 3 encapsulates Groove 5 carry out extruding sealing, prevent outside air from entering the inside of article putting groove 2 from groove 5 and corroding chip body 3, and make Chip body 3 damages;
Wherein, the downside inner wall of article putting groove 2 is equipped with the mounting groove 15 of opening upwards, and the downside inner wall of mounting groove 15 passes through Second spring 16 is connected with follow block 17, and chip body 3 and follow block 17 offset setting;
It should be noted that chip body 3 encapsulate after the completion of, second spring 16 drive follow block 17 to chip body 3 into Row squeezes, so that chip body 3 be made to be fixed in article putting groove 2, making the chip body being encapsulated in article putting groove 23 is not in shake It is dynamic, it ensure that the stability that chip body 3 is mounted in article putting groove 2;
Wherein, the inner wall of groove 5 is equipped with the first gasket;
It should be noted that improving the company of pin 4 Yu groove 5 by the way that the first gasket is arranged on the inner wall of groove 5 Leakproofness is connect, outside air is effectively prevent to enter in article putting groove 2 and corrode chip body 3;
Wherein, capping 6 and the junction of substrate 1 are equipped with the second gasket;
It should be noted that improving chip body 3 by the way that the second gasket is arranged in the junction of capping 6 and substrate 1 Potting, to ensure that the potting of chip body 3;
Wherein, substrate 1 and capping 6 are made of high-cooling property material;
It should be noted that chip body 3 is when in use, a large amount of heat can be generated, is made up of high-cooling property material Substrate 1 and capping 6 can effectively to chip body 3 generate heat radiate, protect the safety of chip, improving it makes With the service life, wherein high-cooling property material is the prior art, does not do excessively repeat thus.
The preferable specific embodiment of the above, only the utility model, but the protection scope of the utility model is not It is confined to this, anyone skilled in the art is within the technical scope disclosed by the utility model, practical according to this Novel technical solution and its utility model design are subject to equivalent substitution or change, should all cover the protection model in the utility model Within enclosing.

Claims (6)

1. a kind of chip on chip packages structure, including substrate (1), which is characterized in that be equipped with opening upwards in the substrate (1) Article putting groove (2), and be equipped with chip body (3) in article putting groove (2), the two sides side wall of the chip body (3) is equipped with arrangement The pin (4) of setting, and the upside side wall of substrate (1) be equipped be equipped with groove (5) with pin (4), the substrate (1) it is upper End is equipped with the capping (6) being equipped with it, and covers the sealing mechanism for being equipped in (6) and being equipped with groove (5), the envelope The downside side wall of lid (6) is fixedly connected with symmetrically arranged two groups of elastic pieces (7), and the upside side wall of substrate (1) is equipped with and bullet The slot (8) that property piece (7) is equipped with, the lower end of the elastic piece (7) is fixedly connected with fixture block (9), and the side of slot (8) Inner wall is equipped with the card slot (10) being equipped with fixture block (9), and the opening of the slot (8) is equipped with to be equipped with fixture block (9) Arc guide groove (11).
2. a kind of chip on chip packages structure according to claim 1, which is characterized in that the sealing mechanism mass is close It seals block (14), two rows of sliding slots (12) that Open Side Down is equipped in the capping (6), and the upper inside walls of sliding slot (12) pass through first Spring (13) is connected with sealing block (14), and multiple sliding slots (12) are arranged in a one-to-one correspondence with groove (5), the sealing block (14) It offsets setting with pin (4).
3. a kind of chip on chip packages structure according to claim 1, which is characterized in that under the article putting groove (2) Side inner wall be equipped with opening upwards mounting groove (15), and the downside inner wall of mounting groove (15) by second spring (16) be connected with to Plate (17), the chip body (3) and follow block (17) offset setting.
4. a kind of chip on chip packages structure according to claim 1, which is characterized in that the inner wall of the groove (5) It is equipped with the first gasket.
5. a kind of chip on chip packages structure according to claim 1, which is characterized in that capping (6) and the substrate (1) junction is equipped with the second gasket.
6. a kind of chip on chip packages structure according to claim 1, which is characterized in that the substrate (1) and capping (6) it is made of high-cooling property material.
CN201920244430.6U 2019-02-27 2019-02-27 A kind of chip on chip packages structure Expired - Fee Related CN209374431U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201920244430.6U CN209374431U (en) 2019-02-27 2019-02-27 A kind of chip on chip packages structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201920244430.6U CN209374431U (en) 2019-02-27 2019-02-27 A kind of chip on chip packages structure

Publications (1)

Publication Number Publication Date
CN209374431U true CN209374431U (en) 2019-09-10

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Family Applications (1)

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Country Status (1)

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CN (1) CN209374431U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111081686A (en) * 2020-02-01 2020-04-28 深圳市芯域联合半导体科技有限公司 Packaging structure for integrated packaging of depletion DMOS (double diffusion metal oxide semiconductor) and ASIC (application specific integrated circuit) chip
CN112002676A (en) * 2020-08-21 2020-11-27 上海申矽凌微电子科技有限公司 Substrate structure and chip thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111081686A (en) * 2020-02-01 2020-04-28 深圳市芯域联合半导体科技有限公司 Packaging structure for integrated packaging of depletion DMOS (double diffusion metal oxide semiconductor) and ASIC (application specific integrated circuit) chip
CN112002676A (en) * 2020-08-21 2020-11-27 上海申矽凌微电子科技有限公司 Substrate structure and chip thereof

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GR01 Patent grant
GR01 Patent grant
CP03 Change of name, title or address
CP03 Change of name, title or address

Address after: Building 5, No. 57, Jinfu Avenue, Gunan street, Qijiang District, Chongqing

Patentee after: Huaxin Zhizao Microelectronics (Chongqing) Co.,Ltd.

Address before: Building 5, No. 57, Jinfu Avenue, Guinan street, Qijiang County, Chongqing

Patentee before: Huaxin Zhisheng Microelectronics (Chongqing) Co.,Ltd.

CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20190910