CN101226905A - Semiconductor encapsulation constitution with radiation fin and carrier thereof - Google Patents

Semiconductor encapsulation constitution with radiation fin and carrier thereof Download PDF

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Publication number
CN101226905A
CN101226905A CN 200810074319 CN200810074319A CN101226905A CN 101226905 A CN101226905 A CN 101226905A CN 200810074319 CN200810074319 CN 200810074319 CN 200810074319 A CN200810074319 A CN 200810074319A CN 101226905 A CN101226905 A CN 101226905A
Authority
CN
China
Prior art keywords
chip bearing
carrier
chip
supporting part
fin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN 200810074319
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Chinese (zh)
Inventor
陈鸿胜
刘俊成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Semiconductor Engineering Inc
Original Assignee
Advanced Semiconductor Engineering Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Engineering Inc filed Critical Advanced Semiconductor Engineering Inc
Priority to CN 200810074319 priority Critical patent/CN101226905A/en
Publication of CN101226905A publication Critical patent/CN101226905A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic

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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The invention discloses a semi-conductor enclosing structure with thermal slug and a carrier thereof. The semi-conductor enclosing structure with thermal slug comprises the carrier, a chip, the thermal slug and sealing colloids, wherein the carrier comprises at least one chip holder, at least one connecting bar and at least one height-supporting portion. The chip holder is equipped with a lower surface, the height-supporting part is equipped with a supporting end, an altitude intercept is arranged between the supporting end and the lower surface, the chip is arranged on the chip holder of the carrier, the thermal slug is contacted with the supporting end of the height-supporting part, further, a space is arranged between the thermal slug and the chip holder, the sealing colloids are filled into the space and at least seal the chip holder, the connecting bar, the height-supporting part and the chip.

Description

The semiconductor packaging structure of tool fin and carrier thereof
Technical field
The present invention relates to a kind of semiconductor package, its carrier of particularly a kind of semiconductor packaging structure of tool fin.
Background technology
As shown in Figure 1, known semiconductor packaging structure 10 mainly comprises a lead frame 11, chip 12, fin 13 and adhesive body 14, this chip 12 is arranged at the chip bearing 111 of this lead frame 11, and this fin 13 directly is attached at the lower surface 111a of this chip bearing 111, extremely outside with the heat conduction that this chip 12 is produced, only, often there is the space between this known chip bearing 111 and this fin 13 because of the contact surface out-of-flatness, and because narrow and small this adhesive body 14 that also makes in space can't be filled in the space, when this semiconductor packaging structure 10 carries out the test of reliability associated temperature, this space can be caused interface delamination (Delamination) is taken place between this chip bearing 111 and this fin 13, as shown in Figure 2, and cause this semiconductor packaging structure 10 to damage.
Summary of the invention
Main purpose of the present invention is to provide a kind of semiconductor packaging structure of tool fin, this semiconductor packaging structure comprises carrier, chip, fin and adhesive body, this carrier has at least one chip bearing, at least one intercell connector and at least one height supporting part, this chip bearing has lower surface, this height supporting part has support end, has difference in height between this support end and this lower surface, this chip is arranged at this chip bearing of this carrier, this fin contacts this support end of this height supporting part, and has the space between this fin and this chip bearing, this adhesive body is filled in this space and seals this chip bearing at least, this intercell connector, this height supporting part and this chip, the present invention makes by this height supporting part and forms the space that can supply this adhesive body to flow and fill between this chip bearing and this fin, and, therefore can prevent from because of there being the space interface delamination (Delamination) to take place when the reliability associated temperature is tested between this chip bearing and this fin because this adhesive body can be filled in this space.
Semiconductor packaging structure according to a kind of tool fin of the present invention, it comprises carrier, chip, fin and adhesive body, this carrier has at least one chip bearing, at least one intercell connector and at least one height supporting part, this chip bearing has lower surface, this height supporting part has support end, has difference in height between this support end and this lower surface, this chip is arranged at this chip bearing of this carrier, this fin contacts this support end of this height supporting part of this carrier, and have the space between this fin and this chip bearing, this adhesive body is filled in this space and seals this chip bearing at least, this intercell connector, this height supporting part and this chip.
Carrier according to a kind of semiconductor packaging structure of the present invention, it comprises at least one chip bearing, at least one intercell connector and at least one height supporting part, this chip bearing has lower surface, this intercell connector connects this chip bearing, this height supporting part has support end, has difference in height between this lower surface of this support end and this chip bearing.
Description of drawings
Fig. 1 is the structural representation of known semiconductor packaging structure.
Fig. 2 is the interface results for delamination schematic diagram of known semiconductor packaging structure after the test of reliability associated temperature.
Fig. 3 is the structural representation according to the semiconductor packaging structure of a kind of tool fin of one embodiment of the present invention.
Fig. 4 is the structure vertical view of disliking carrier according to one embodiment of the present invention.
Fig. 5 is for disliking a kind of structural representation of semiconductor packaging structure of tool fin according to the present invention's one specific embodiment.
Fig. 6 is the structure vertical view according to the carrier of the present invention's one specific embodiment.
Description of reference numerals
20 semiconductor packaging structures, 21 carriers
211 chip bearing 211a corners
211b lower surface 212 intercell connectors
213 height supporting part 213a support ends
22 chips, 23 fin
24 adhesive bodies, 25 adhesive-layers
H difference in height S space
Embodiment
See also Fig. 3, it is a preferred embodiment of the present invention, a kind of semiconductor packaging structure 20 of tool fin comprises carrier 21, chip 22, fin 23 and adhesive body 24, see also Fig. 4, in the present embodiment, this carrier 21 is lead frame (Lead Frame), this carrier 21 has at least one chip bearing 211, at least one intercell connector 212 and at least one height supporting part 213, this chip bearing 211 has at least one corner 211a, this intercell connector 212 connects this corner 211a of this chip bearing 211, please consult Fig. 3 again, this chip bearing 211 has lower surface 211b, this height supporting part 213 has support end 213a, has height difference H between this support end 213a and this lower surface 211b, in the present embodiment, this chip bearing 211, this intercell connector 212 and this height supporting part 213 are formed in one, and this height supporting part 213 is positioned at this intercell connector 212, preferably, this height supporting part 213 forms with impact style, perhaps, sees also the 5th and 6 figure, in another embodiment, this height supporting part 213 can be positioned at this chip bearing 211, and preferably, this height supporting part 213 is positioned at this corner 211a of this chip bearing 211.Please consult Fig. 3 again, this chip 22 is arranged at this chip bearing 211 of this carrier 21, in the present embodiment, this chip 22 is engaged in this chip bearing 211 of this carrier 21 by an adhesive-layer 25, this support end 213a of this height supporting part 213 of these fin 23 these carriers 21 of contact, the heat conduction that this chip 22 was produced is reached the purpose of heat radiation to the outside, in addition, this height supporting part 213 makes between this fin 23 and this chip bearing 211 has space S, and this adhesive body 24 is filled in this space S and seal this chip bearing 211, this intercell connector 212, this height supporting part 213, this chip 22 and this fin 23, in the present embodiment, because of this adhesive body 24 can be filled in this space S, therefore can prevent from because of there being the space interface delamination (Delamination) to take place when the reliability associated temperature is tested between this chip bearing 211 and this fin 23.
Protection scope of the present invention is when looking being as the criterion that accompanying Claim defines, and any variation and modification that those skilled in the art are done without departing from the spirit and scope of the present invention all belong to protection scope of the present invention.

Claims (11)

1. the semiconductor packaging structure of a tool fin, it comprises:
Carrier, it has at least one chip bearing, at least one intercell connector and at least one height supporting part, and this chip bearing has lower surface, and this height supporting part has support end, has difference in height between this support end and this lower surface;
Chip, it is arranged at this chip bearing of this carrier;
Fin, it contacts this support end of this height supporting part of this carrier, and has the space between this fin and this chip bearing; And
Adhesive body, it is filled in this space and seals this chip bearing, this intercell connector, this height supporting part and this chip at least.
2. the semiconductor packaging structure of tool fin as claimed in claim 1, wherein this height supporting part is positioned at this intercell connector.
3. the semiconductor packaging structure of tool fin as claimed in claim 2, wherein this chip bearing has at least one corner, and this intercell connector connects this corner of this chip bearing.
4. the semiconductor packaging structure of tool fin as claimed in claim 1, wherein this height supporting part is formed at this chip bearing.
5. the semiconductor packaging structure of tool fin as claimed in claim 4, wherein this chip bearing has at least one corner, and this height supporting part is positioned at this corner of this chip bearing.
6. the semiconductor packaging structure of tool fin as claimed in claim 1, wherein this chip bearing, this intercell connector and this height supporting part are formed in one.
7. the semiconductor packaging structure of tool fin as claimed in claim 1, wherein this carrier is a lead frame.
8. the carrier of a semiconductor packaging structure, it comprises:
At least one chip bearing, it has lower surface;
At least one intercell connector, it connects this chip bearing; And
At least one height supporting part is positioned at this chip bearing, and it has support end, has difference in height between this lower surface of this support end and this chip bearing.
9. the carrier of semiconductor packaging structure as claimed in claim 8, wherein this chip bearing has at least one corner, and this height supporting part is positioned at this corner of this chip bearing.
10. the carrier of semiconductor packaging structure as claimed in claim 9, wherein this intercell connector connects this corner of this chip bearing.
11. the carrier of semiconductor packaging structure as claimed in claim 8, wherein this chip bearing, this intercell connector and this height supporting part are formed in one.
CN 200810074319 2008-02-15 2008-02-15 Semiconductor encapsulation constitution with radiation fin and carrier thereof Pending CN101226905A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200810074319 CN101226905A (en) 2008-02-15 2008-02-15 Semiconductor encapsulation constitution with radiation fin and carrier thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200810074319 CN101226905A (en) 2008-02-15 2008-02-15 Semiconductor encapsulation constitution with radiation fin and carrier thereof

Publications (1)

Publication Number Publication Date
CN101226905A true CN101226905A (en) 2008-07-23

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200810074319 Pending CN101226905A (en) 2008-02-15 2008-02-15 Semiconductor encapsulation constitution with radiation fin and carrier thereof

Country Status (1)

Country Link
CN (1) CN101226905A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101800208B (en) * 2009-02-11 2012-02-29 日月光半导体制造股份有限公司 Semiconductor packaging structure and heat radiating fin thereof
CN102944124A (en) * 2012-11-21 2013-02-27 杭州电子科技大学 Water-cooling heat-dissipating device of semiconductor temperature differential power generation system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101800208B (en) * 2009-02-11 2012-02-29 日月光半导体制造股份有限公司 Semiconductor packaging structure and heat radiating fin thereof
CN102944124A (en) * 2012-11-21 2013-02-27 杭州电子科技大学 Water-cooling heat-dissipating device of semiconductor temperature differential power generation system
CN102944124B (en) * 2012-11-21 2015-05-13 杭州电子科技大学 Water-cooling heat-dissipating device of semiconductor temperature differential power generation system

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Open date: 20080723