CN208806252U - A kind of novel SOP encapsulating lead - Google Patents
A kind of novel SOP encapsulating lead Download PDFInfo
- Publication number
- CN208806252U CN208806252U CN201821524268.5U CN201821524268U CN208806252U CN 208806252 U CN208806252 U CN 208806252U CN 201821524268 U CN201821524268 U CN 201821524268U CN 208806252 U CN208806252 U CN 208806252U
- Authority
- CN
- China
- Prior art keywords
- base island
- pin
- dao
- width
- cooling fin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The utility model discloses a kind of novel SOP encapsulating leads, the utility model includes connecting muscle for carrying the Ji Dao of MOSFET or chip, base island pin, other pins of chip and side, side connects muscle and other pins of chip support Ji Dao jointly, base island pin number is at least one, and the cooling fin to radiate to MOSFET or chip is additionally provided between base island pin and base island.The utility model reduces chip by heat dissipation by increasing cooling fin between base island pin and base island.
Description
Technical field
The utility model relates to field of semiconductor devices, more particularly to a kind of novel SOP encapsulating lead.
Background technique
(Small Outline Package, is a kind of advanced microelectronics assewbly and encapsulation technology, at present for SOP encapsulation
Through in mature developing stage) it is a kind of very universal small paster type packing forms.It is at present by semiconductor chip packaging
It is generallyd use, existing SOP7/SOP8 packaging technology is highly developed, has many advantages, such as that at low cost, PCB surface product is small, high-efficient.
As shown in Figure 1, existing SOP7/SOP8 encapsulating lead, the width dimensions and quantity of base island pin are 0.4mm*2.1mm*
2 or be 0.4mm*2.1mm*4, the conducting of base island pin will lead to impedance increase so that SOP7/SOP8 encapsulate chip in work
There are fever phenomenon, the chip and MOSFET (Metal-Oxide Semiconductor field effect transistor of especially some power-types in work
Pipe, abbreviation metal-oxide half field effect transistor, Metal-Oxide-Semiconductor Field-Effect Transistor,
MOSFET), if in order to reduce product fever if need to increase the area of chip or MOS or use instead DIP (DIP encapsulation, be dual
The abbreviation of inline-pin package, is also dual-inline package technology, it is double enter line encapsulation, a kind of component encapsulation of DRAM
Form) or the packing forms such as QFN (quad flat non-pin package, one of surface mount packages), it will lead to producing in this way
Occur the excessively high influence using effect of temperature and life of product either reduction product specification in the direct use process of product and uses to obtain feelings
Condition；And the design of change chip or increase MOS size and reduce conduction impedance (and RDSON)) cause the product design period to lengthen with
And cost increase, need a kind of applied widely, good heat dissipation effect, SOP7/SOP8 at low cost and favorable expandability in the industry at present
Encapsulating lead has realized the effect for reducing the heat dissipation effect of conduction impedance or increase product.
Utility model content
The technical problem to be solved by the present invention is in view of the above drawbacks of the prior art, provide a kind of novel
SOP encapsulating lead.
The technical scheme adopted by the utility model to solve the technical problem is as follows: including for carrying MOSFET or chip
Ji Dao, base island pin, other pins of chip and side connect muscle, side connects muscle and other pins of chip support Ji Dao, Ji Dao jointly
Pin number is at least one, and the cooling fin to radiate to MOSFET or chip is additionally provided between base island pin and base island.
Preferably, the quantity of Ji Dao is one, and base island pin number is one, the width of base island pin and the width of Ji Dao
Equal, the width of base island pin is equal with the width of cooling fin.
Preferably, the length and width size of base island pin is respectively 4.2mm, 2.1mm.
Preferably, the quantity of Ji Dao is two, and the island Liang Geji is set side by side, and base island pin number is two, each Ji Dao
Pin is located at the side on an island Ge Ji, and the width of base island pin is equal with the width of cooling fin.
Preferably, the length and width of each base island pin is having a size of respectively having a size of 1.6mm, 2.1mm.
Preferably, the quantity of Ji Dao is 1, and base island pin number is one, and the width of base island pin is less than the width of Ji Dao
The width of the half of degree, base island pin is equal with the width of cooling fin.
Preferably, the length and width size of base island pin is respectively 1.6mm, 2.1mm.
Preferably, cooling fin is aluminium alloy, sheet cooling fin made of brass or bronze.
Preferably, cooling fin is a part of base island pin.
Preferably, the top of cooling fin is provided with packaging plastic, and aluminium dioxide is provided in packaging plastic, and the top of cooling fin is stretched
It is out more than the cylindrical heat exchange protrusion of 2mm with the height of packaging plastic integrated setting.
The utility model reduces chip by heat dissipation by increasing cooling fin between base island pin and base island, while widening base
The conduction impedance of the island island pin size Shi Ji pin, which reduces, reduces the fever generated by base island pin conduction impedance；Simultaneously because of Ji Dao
The heat-conducting area increase that the size of pin widens the island Shi Ji pin makes outside chip interior heat derives to chip, to reduce chip
Fever.
Detailed description of the invention
It, below will be to required in embodiment description in order to illustrate more clearly of the technical solution of the utility model embodiment
The attached drawing used is briefly described, it is therefore apparent that and the drawings in the following description are merely some embodiments of the present invention,
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings
Other attached drawings, in attached drawing:
Fig. 1 is the lead packages schematic diagram of the SOP7/SOP8 of the prior art；
Fig. 2 is a kind of SOP8 lead packages signal of the embodiment one of novel SOP encapsulating lead of the utility model
Figure；
Fig. 3 is a kind of SOP8 lead packages signal of the embodiment two of novel SOP encapsulating lead of the utility model
Figure；
Fig. 4 is a kind of SOP7 lead packages signal of the embodiment three of novel SOP encapsulating lead of the utility model
Figure；
Appended drawing reference: 1: Ji Dao；2: base island pin；3: other pins of chip；4: side connects muscle；5: cooling fin
Specific embodiment
In order to make the purpose of the utility model, technical solutions and advantages more clearly understood, what be will be described below is various
Embodiment will refer to corresponding attached drawing, these attached drawings constitute a part of embodiment, and which describe realize that this is practical new
The various embodiments that type may use.It should be appreciated that other embodiments also can be used, or embodiment enumerated herein is carried out
Modification structurally and functionally, without departing from the scope of the utility model and essence.
The utility model provides the various embodiments of SOP encapsulating lead, and embodiment is only a special case, not table
Bright the utility model just only in this way several implementations.
Embodiment one:
As shown in Fig. 2, a kind of novel SOP encapsulating lead includes for carrying MOSFET or the base island 1 of chip, base
Other pins 3 of island pin 2, chip and side connect muscle 4, and the side connects muscle 4 and other pins 3 of the chip support base island 1 jointly,
The number of base island pin 2 is at least one, has a cooling fin 5 for base island 1 between the island Qie Ji pin 2 and base island 1
The MOSFET or chip of carrying radiate.
Specifically, a part of cooling fin 5 for base island pin 2, the width of cooling fin 5 and the equivalent width of base island pin,
The top of cooling fin 5 is provided with packaging plastic, and aluminium dioxide is provided in packaging plastic, and the top of cooling fin 5 is stretched out and packaging plastic one
The height of bodyization setting is more than the cylindrical heat exchange protrusion of 2mm.More specifically, cooling fin 5 is made of aluminium alloy, brass or bronze
Sheet cooling fin.
Specifically, the number of base island pin 2 is one at this time, Ji Dao when the SOP8 encapsulation that the quantity on base island 1 is one
The width of pin 2 is equal with the width on base island 1,2 size of base island pin by original standard length and width size and pin number
0.4mm*2.1mm*4 is changed to 4.2mm*2.1mm*1.The width ratio of base island pin 2 and original standard base island pin 2 is 4.2/ at this time
(0.4*4)=2.65, while the impedance of (not shown) also becomes the 1/2.6 of former impedance between base island 1 and pcb board, Ji Dao
The heat dissipation area of pin 2 is 2.6 times of former base island pin 2.
Embodiment two:
As shown in figure 3, in the present embodiment SOP encapsulating lead, when the SOP8 that the quantity on base island 1 is two is encapsulated
When, the island Liang Geji 1 is set side by side, and pin 2 numbers in base island are two, and each base island pin 2 is located at the side on 1 island Ge Ji 1, Ji Dao
2 size of pin is changed to 1.6mm*2.1mm*1 by the length and width size and pin number 0.4mm*2.1mm*2 of original standard.At this time
The width ratio of base island pin 2 and original standard base island pin 2 is 1.6/ (0.4*4)=2, while between base island 1 and pcb board (in figure
Be not shown) impedance also become the 1/2 of former impedance, while the heat dissipation area of base island pin 2 is 2 times of former base island pin 2.
Other concrete mechanisms and working principle and embodiment one are consistent, do not do repeated description herein, specifically can refer to reality
Apply example one.
Embodiment three:
As shown in figure 4, in the present embodiment SOP encapsulating lead, when the SOP7 encapsulation that the quantity on base island 1 is 1,
The number of base island pin 2 is one at this time, and the width of base island pin 2 is less than the half of the width on base island 1,2 size of base island pin
1.6mm*2.1mm*1 is changed to by the length and width size and pin number 0.4mm*2.1mm*2 of original standard.Base island pin at this time
2 and the width ratio of original standard base island pin 2 are 1.6/ (0.4*4)=2, while (not shown) between base island 1 and pcb board
Impedance also become the 1/2 of former impedance, while the heat dissipation area of base island pin 2 is 2 times of former base island pin 2.
Other concrete mechanisms and working principle and embodiment one are consistent, do not do repeated description herein, specifically can refer to reality
Apply example one.
The above is only the preferred embodiment of the utility model only, and those skilled in the art know, is not departing from this
In the case where the spirit and scope of utility model, various changes or equivalent replacement can be carried out to these features and embodiment.Separately
Outside, it under the introduction of the utility model, can modify to these features and embodiment to adapt to particular situation and material
Without departing from the spirit and scope of the utility model.Therefore, the utility model is not by specific embodiment disclosed herein
It limits, the embodiment within the scope of fallen with claims hereof belongs to the protection scope of the utility model.
Claims (10)
1. a kind of novel SOP encapsulating lead, which is characterized in that including for carrying MOSFET or chip Ji Dao (1),
Other pins (3) of base island pin (2), chip and side connect muscle (4), and the side connects muscle (4) and other pins (3) of the chip are common
It supports Ji Dao (1), the base island pin (2) number is at least one, between base island pin (2) and the Ji Dao (1)
It is additionally provided with the cooling fin (5) to radiate to MOSFET or chip.
2. SOP encapsulating lead according to claim 1, which is characterized in that the quantity of the Ji Dao (1) is one,
Base island pin (2) number is one, and the width of base island pin (2) is equal with the width of Ji Dao (1), and the Ji Dao draws
The width of foot (2) is equal with the width of the cooling fin (5).
3. SOP encapsulating lead according to claim 2, which is characterized in that the length and width ruler of base island pin (2)
Very little is respectively 4.2mm, 2.1mm.
4. SOP encapsulating lead according to claim 1, which is characterized in that the quantity of the Ji Dao (1) is two,
Two Ji Dao (1) are set side by side, and base island pin (2) number is two, and each base island pin (2) is located at described
The width of the side of Ji Dao (1), base island pin (2) is equal with the width of the cooling fin (5).
5. SOP encapsulating lead according to claim 4, which is characterized in that the length of each base island pin (2),
Wide size is respectively 1.6mm, 2.1mm.
6. SOP encapsulating lead according to claim 1, which is characterized in that the quantity of the Ji Dao (1) is 1, institute
The island Shu Ji pin (2) number is one, and the width of base island pin (2) is less than the half of the width of the Ji Dao (1), described
The width of base island pin (2) is equal with the width of the cooling fin (5).
7. SOP encapsulating lead according to claim 6, which is characterized in that the length and width ruler of base island pin (2)
Very little is respectively 1.6mm, 2.1mm.
8. -7 any SOP encapsulating lead according to claim 1, which is characterized in that the cooling fin (5) is aluminium conjunction
Sheet cooling fin made of gold, brass or bronze.
9. SOP encapsulating lead according to claim 1, which is characterized in that the cooling fin (5) is that the Ji Dao draws
A part of foot (2).
10. SOP encapsulating lead according to claim 1, which is characterized in that the top of the cooling fin (5) is arranged
There is packaging plastic, aluminium dioxide is provided in the packaging plastic, the top of the cooling fin (5) is stretched out integrated with the packaging plastic
The height of setting is more than the cylindrical heat exchange protrusion of 2mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821524268.5U CN208806252U (en) | 2018-09-17 | 2018-09-17 | A kind of novel SOP encapsulating lead |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821524268.5U CN208806252U (en) | 2018-09-17 | 2018-09-17 | A kind of novel SOP encapsulating lead |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN208806252U true CN208806252U (en) | 2019-04-30 |
Family
ID=66238163
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201821524268.5U Expired - Fee Related CN208806252U (en) | 2018-09-17 | 2018-09-17 | A kind of novel SOP encapsulating lead |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN208806252U (en) |
-
2018
- 2018-09-17 CN CN201821524268.5U patent/CN208806252U/en not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102714201B (en) | Semiconductor packages and method | |
| US7547583B2 (en) | Light emitting diode package with direct leadframe heat dissipation | |
| CN102983114B (en) | High performance power transistor with Ultrathin packaging | |
| JP2017506432A5 (en) | ||
| CN107148671A (en) | Triple stacked semiconductor packages | |
| CN110600450A (en) | Lead frame for arranging chip, packaging body and power supply module | |
| CN106098919B (en) | High-thermal-conductivity and high-insulation LED light engine packaging structure and preparation method | |
| CN208806252U (en) | A kind of novel SOP encapsulating lead | |
| CN203774286U (en) | POP (package on package) package having heat radiation device | |
| US20070246772A1 (en) | MOSFET power package | |
| CN209312757U (en) | A kind of plane combination novel I C encapsulating structure | |
| US10396019B2 (en) | Molded intelligent power module and method of making the same | |
| CN104766920A (en) | SOP8 package lead frame of high-power LED driving chip | |
| CN105070703A (en) | Rectifier bridge packaging structure with high heat radiating performance | |
| CN219303657U (en) | Double-base island packaging circuit | |
| CN205984972U (en) | Lead frame structure | |
| CN204424316U (en) | A kind of SOP8 encapsulating lead of great power LED driving chip | |
| CN204792772U (en) | U -shaped pin rectifier bridge packaging structure | |
| CN207587727U (en) | A kind of multichip carrier lead frame | |
| CN209515654U (en) | SOT dual chip lead frame structure and SOT dual chip lead frame assembly | |
| CN213815751U (en) | Inductance packaging body with improved heat dissipation performance | |
| CN212934607U (en) | Three-pin transistor packaging lead frame structure | |
| US20230025949A1 (en) | Semiconductor device and a method of manufacturing of a semiconductor device | |
| CN215988715U (en) | SOP packaging structure suitable for high-power MOS, PCB and complete machine | |
| TW503541B (en) | Packaging method of semiconductor power device and device of the same |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20190430 Termination date: 20190917 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |