CN219303657U

CN219303657U - Double-base island packaging circuit

Info

Publication number: CN219303657U
Application number: CN202223457455.5U
Authority: CN
Inventors: 汪良恩; 朱京江
Original assignee: Anhui Anmei Semiconductor Co ltd
Current assignee: Anhui Anmei Semiconductor Co ltd
Priority date: 2022-12-22
Filing date: 2022-12-22
Publication date: 2023-07-04
Anticipated expiration: 2032-12-22

Abstract

The utility model provides a double-base island packaging circuit, and relates to the technical field of semiconductor packaging. In the utility model, islands with the same size and mutually independent are designed, two MOS or IGBT chips with the same function are assembled respectively, and when the two chips are assembled, two adjacent chips of the same original chip can be assembled into the same double-island packaged product, thereby ensuring the consistency of electrical parameters such as switching time, overcurrent capacity, internal resistance, EAS capacity, junction capacitance and the like, and further ensuring the consistency of the products when the products are connected in parallel or in series. Meanwhile, when the specific wiring on the PCB is applied, the PCB can be connected in parallel or in series and used in a split mode; through different connections, more application scenes are adapted, and the application is more flexible.

Description

Double-base island packaging circuit

Technical Field

The utility model relates to the technical field of semiconductor packaging, in particular to a double-base island packaging circuit.

Background

The existing double-base island packaging circuit mainly comprises a main base island and a secondary base island, and different high-power chips and control chips are respectively assembled to form a certain circuit function. Such a double-island package is more biased towards integration and is smaller in volume. When high power demands are faced, higher power applications cannot be obtained by parallel or series connection.

Meanwhile, the existing single-base island packaging circuit can be connected in parallel or in series to meet the application of higher power, but the single-base island product is a single chip product, chips on different original chips are arranged randomly, when the single-base island product is connected in parallel or in series, the difference of switching delay, overcurrent capacity and EAS capacity of different products is large, and when the PCB is used in the whole machine, the single-base island product can be switched on and off by mistake, and the single-base island product is excessively loaded to lose efficacy.

In view of this, it is necessary to provide a high-power dual-island package circuit.

Disclosure of Invention

(one) solving the technical problems

Aiming at the defects of the prior art, the utility model provides a double-base island packaging circuit, which solves the technical problem that the existing double-base island or single-base island packaging circuit does not support high-power requirements.

Technical proposal

In order to achieve the above purpose, the utility model is realized by the following technical scheme:

a double-base island packaging circuit comprises a frame, two base islands with the same size, two chips with the same function and a packaging body;

the two base islands are positioned on the frame and are independent from each other;

the two chips are respectively positioned on the corresponding base islands, and the electrode of each chip is connected with the pin of the frame;

the package body is located above the frame and covers the base island and the chip.

Preferably, two of said islands are located on opposite sides of said frame, respectively.

Preferably, the edge of the base island is provided with a zigzag heat sink.

Preferably, the chips are from two adjacent chips of the same original sheet.

Preferably, the electrode of each chip is connected with the pin of the frame by means of pressure welding.

Preferably, both the chips are MOS chips, or both the chips are IGBT chips.

Preferably, the package body adopts a DFN body or a QFN body.

(III) beneficial effects

The utility model provides a double-base island packaging circuit. Compared with the prior art, the method has the following beneficial effects:

in the utility model, islands with the same size and mutually independent are designed, two MOS or IGBT chips with the same function are assembled respectively, and when the two chips are assembled, two adjacent chips of the same original chip can be assembled into the same double-island packaged product, thereby ensuring the consistency of electrical parameters such as switching time, overcurrent capacity, internal resistance, EAS capacity, junction capacitance and the like, and further ensuring the consistency of the products when the products are connected in parallel or in series.

Meanwhile, when the specific wiring on the PCB is applied, the PCB can be connected in parallel or in series and used in a split mode; through different connections, more application scenes are adapted, and the application is more flexible.

Drawings

In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the utility model, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic diagram of an internal structure of a dual-island package circuit (MOS chip) according to an embodiment of the present utility model;

fig. 2 is a schematic diagram of an internal structure of another dual-island package circuit (IGBT chip) according to an embodiment of the present utility model;

fig. 3 to 5 are circuit diagrams of typical applications of the dual-island package circuit according to the embodiment of the present utility model.

Detailed Description

For the purpose of making the objects, technical solutions and advantages of the embodiments of the present utility model more clear, the technical solutions in the embodiments of the present utility model are clearly and completely described, and it is obvious that the described embodiments are some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.

The embodiment of the application provides a double-base island packaging circuit, and the existing double-base island or single-base island packaging circuit does not support the technical problem of high power requirement.

The technical scheme in the embodiment of the application aims to solve the technical problems, and the overall thought is as follows:

in the embodiment of the utility model, the islands with the same size and mutually independent are designed, two MOS or IGBT chips with the same function are assembled respectively, and when the islands are assembled, two adjacent chips of the same original chip can be assembled into the same double-island packaged product, so that the consistency of the electrical parameters such as switching time, overcurrent capacity, internal resistance, EAS capacity, junction capacitance and the like is ensured, and the consistency of the products when the chips are connected in parallel or in series is ensured. Meanwhile, when the specific wiring on the PCB is applied, the PCB can be connected in parallel or in series and used in a split mode; through different connections, more application scenes are adapted, and the application is more flexible.

In order to better understand the above technical solutions, the following detailed description will refer to the accompanying drawings and specific embodiments.

Examples:

as shown in fig. 1-2, the embodiment of the utility model provides a double-base island packaging circuit, which comprises a frame 1, two base islands 2 with the same size, two chips 3 with the same function and a packaging body;

the two base islands 2 are positioned on the frame 1 and are independent from each other;

the two chips 3 are respectively positioned on the corresponding base islands 2, and the electrode of each chip 3 is connected with the pin of the frame 1;

the package body is located above the frame 1 (not shown in the drawings) and covers the islands 2 and the chips 3.

In an alternative embodiment, both the chips 3 are MOS chips, or are IGBT chips, which can be selected by those skilled in the art according to the actual situation.

In an alternative embodiment, the package body is a DFN body or a QFN body, which can be selected by those skilled in the art according to the actual situation.

In an alternative embodiment, two of the islands 2 are located on opposite sides of the frame 1, respectively, and do not interfere with each other in layout.

In an alternative embodiment, the edge of the base island 2 is provided with saw-tooth shaped heat sinks 21 for dissipating heat after the package is energized.

In an alternative embodiment, in order to further ensure consistency of electrical parameters such as switching time, overcurrent capability, internal resistance, EAS capability, junction capacitance, and the like, the chips 3 are from two adjacent chips of the same original chip, and in particular, two adjacent chips next to each other in blue film can be selected for material selection.

In an alternative embodiment, the electrodes of each chip 3 are connected to the pins of the frame 1 by means of pressure welding, specifically by using metal wires, such as gold wires, aluminum wires, etc., and using a hot-pressing or ultrasonic energy source to complete the connection of the electrodes 3 to the pins of the frame 1.

When the MOS chip is adopted, as shown in fig. 1, the frame 1 includes pins respectively connected with the G pole, the S pole, and the D pole; as shown in fig. 2, when an IGBT chip is used, the frame 1 includes pins connected to the G, C, and E poles, respectively.

The product prepared in this way has better consistency and synchronism when being used on a PCB board, and can drive larger loads, such as a power supply above 300W.

The printed circuit board can be used in parallel or series connection and split connection when the printed circuit board is particularly applied to specific wiring on the printed circuit board; through different connections, more application scenes are adapted, and the application is more flexible.

Next, a double-island package circuit using a MOS chip will be described as an example:

as shown in fig. 3, the two MOS chips are connected in parallel, and the two MOS chips independently control the operation of the following load through 2 different signal control.

As shown in fig. 4, two MOS chips are connected in series, and the two MOS chips cooperatively control the operation of the following load through 2 different signal control.

As shown in fig. 5, the two MOS chips are connected in parallel, and the two MOS chips cooperatively control the operation of the following load through 1-way signal control.

It is to be understood that the application process of the double-base island package circuit using the IGBT chip is the same as the principle of the application process of the double-base island package circuit using the MOS chip, and will not be described here again.

In summary, compared with the prior art, the method has the following beneficial effects:

1. in the utility model, the islands with the same size and mutually independent are designed, two MOS or IGBT chips with the same function are assembled respectively, and when the islands are assembled, two adjacent chips of the same original chip can be assembled into the same double-island packaged product, thereby ensuring the consistency of electrical parameters such as switching time, overcurrent capacity, internal resistance, EAS capacity, junction capacitance and the like, and further ensuring the consistency of the products when the chips are connected in parallel or in series.

2. Meanwhile, when the specific wiring on the PCB is applied, the PCB can be connected in parallel or in series and used in a split mode; through different connections, more application scenes are adapted, and the application is more flexible.

It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

The above embodiments are only for illustrating the technical solution of the present utility model, and are not limiting; although the utility model has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present utility model.

Claims

1. The double-base island packaging circuit is characterized by comprising a frame (1), two base islands (2) with the same size, two chips (3) with the same function and a packaging body;

the two base islands (2) are positioned on the frame (1) and are independent from each other;

the two chips (3) are respectively positioned on the corresponding base islands (2), and the electrode of each chip (3) is connected with the pin of the frame (1);

the packaging body is located above the frame (1) and covers the base island (2) and the chip (3).

2. Double-island packaging circuit according to claim 1, characterized in that two of the islands (2) are located on opposite sides of the frame (1), respectively.

3. Double-island packaging circuit according to claim 1, characterized in that the edge of the island (2) is provided with a saw-tooth shaped heat sink (21).

4. A dual-island package according to claim 1, characterized in that the chips (3) are from two adjacent chips of the same die.

5. A double-island package according to claim 1, wherein the electrodes of each of said chips (3) are connected to the leads of the frame (1) by means of pressure bonding.

6. A double-island package circuit according to any of claims 1-5, characterized in that both chips (3) are MOS chips or IGBT chips.

7. The dual-island package circuit of any of claims 1-5, wherein the package body is a DFN body or a QFN body.