CN203774286U - POP (package on package) package having heat radiation device - Google Patents

POP (package on package) package having heat radiation device Download PDF

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Publication number
CN203774286U
CN203774286U CN201420050600.4U CN201420050600U CN203774286U CN 203774286 U CN203774286 U CN 203774286U CN 201420050600 U CN201420050600 U CN 201420050600U CN 203774286 U CN203774286 U CN 203774286U
Authority
CN
China
Prior art keywords
package
heat abstractor
pop
chip
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN201420050600.4U
Other languages
Chinese (zh)
Inventor
潘计划
毛忠宇
袁正红
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Fastprint Circuit Tech Co Ltd
Yixing Silicon Valley Electronic Technology Co Ltd
Original Assignee
Shenzhen Fastprint Circuit Tech Co Ltd
Yixing Silicon Valley Electronic Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Fastprint Circuit Tech Co Ltd, Yixing Silicon Valley Electronic Technology Co Ltd filed Critical Shenzhen Fastprint Circuit Tech Co Ltd
Priority to CN201420050600.4U priority Critical patent/CN203774286U/en
Application granted granted Critical
Publication of CN203774286U publication Critical patent/CN203774286U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The utility model discloses a POP (package on package) package having a heat radiation device. The entire POP package is packaged by a plastic packaging material. The POP package comprises multi-layered substrates. The multi-layered substrates are stacked, and the substrates are connected together through solder balls or copper columns. One or more chips are mounted on each substrate. IO base pins are disposed on the lower surface of the lowermost substrate, and extend from the bottom surface or a side surface of the package. The heat radiation device is mounted above the chip(s). Heat consumption of chips of each package layer of the POP package is directly transmitted to the outside of the package, the heat transmission no longer passes the upper-layer package, and heat resistance is reduced. Therefore, the POP package can have substantially improved heat radiation effect, enables the performance of the chips to be better played, and have good economic and social benefits. Such a technical scheme can be widely applied to various POP packages.

Description

A kind of POP encapsulation with heat abstractor
Technical field
The utility model relates to integrated antenna package field, relates in particular to a kind of POP encapsulation.
Background technology
POP:Package On Package, laminate packaging, a kind of three-dimension packaging structure.
Along with electronic product develops rapidly to the direction of miniaturization, densification, high integration and multifunction, integrated antenna package develops to three-dimensional from two dimension, and the raising of integrated level has brought the problem of chip cooling, has limited the performance performance of chip.
As the superintegrated main packaged type of integrated antenna package, POP encapsulation has obtained increasing attention.At present, the POP encapsulated radiating structure of main flow as shown in Figure 1.What carry due to laminar substrate 12 under general POP encapsulating structure is processor chips 31 or baseband chip, and caloric value is large, and top substrate layer 11 is general, what carry is storage chip 32, generates heat little.But because common radiator 9 is to be all directly installed on POP upper strata package surface, the caloric requirement of lower floor's encapsulation just can be delivered to radiator through upper strata encapsulation, and thermal resistance is larger around here, and very difficult lower heat sheds, cause the chip temperature rise of lower floor's encapsulation too high, cannot normally work.This kind of heat sink conception, has limited the performance performance of lower floor's processor chips 31 or baseband chip, has also limited POP encapsulation and can only be applied in small-power chip field.
Utility model content
In order to solve the problems of the technologies described above, the purpose of this utility model is to provide a kind of POP encapsulation with heat abstractor of the radiating effect that can greatly improve POP encapsulation.
The technical scheme that the utility model adopts is:
A kind of POP encapsulation with heat abstractor, whole encapsulation is sealed by capsulation material, it comprises multilager base plate, described multilager base plate is stacking, between substrate and substrate, be connected by soldered ball or copper post, be provided with one or more chips on described substrate, the lower surface of bottom substrate is provided with IO pin, described IO pin is from encapsulation bottom surface or side fan-out, and described chip top is provided with heat abstractor.
Preferably, described heat abstractor extends and exposes or stretch out from package side surface.
Preferably, described heat abstractor is metal heat-conducting material.
Preferably, on described heat abstractor, be provided with one or more through-hole structures.
As the utility model the first preferred embodiment, described chip is connected with substrate by gold thread.
As the utility model the second preferred embodiment, described chip is connected with substrate by chip leg.
As the utility model the second preferred embodiment, described chip directly contacts with heat abstractor.
As the utility model the first preferred embodiment, between described chip and heat abstractor, be filled with Heat Conduction Material.
Preferably, described multilager base plate is top substrate layer and lower laminar substrate, in described top substrate layer, is provided with storage chip, on described lower laminar substrate, is provided with processor chips or baseband chip, and described heat abstractor is arranged on the top of processor chips or baseband chip.
The beneficial effects of the utility model are:
The utility model is by being directly transmitted to package outside the heat dissipation of each layer of packaged chip of POP encapsulation, heat transmission no longer encapsulates through upper strata, reduce thermal resistance, the radiating effect of POP encapsulation is greatly improved, and then the performance that makes chip is able to better performance, there is good economic and social benefit.
In addition, the utility model, by exposing from heat abstractor from side or stretching out, is conducive to heat and better distributes; Reach better heat-conducting effect by metal heat-conducting material; By being set on heat abstractor, through-hole structure strengthens radiating effect.
The utility model can be widely used in various POP encapsulation.
Brief description of the drawings
Below in conjunction with accompanying drawing, embodiment of the present utility model is described further:
Fig. 1 is the POP encapsulated radiating structure schematic diagram of main flow in prior art;
Fig. 2 is the structural representation of the utility model the first embodiment;
Fig. 3 is the structural representation of the utility model the second embodiment.
Embodiment
It should be noted that, in the situation that not conflicting, the feature in embodiment and embodiment in the application can combine mutually.
As shown in Figures 2 and 3, a kind of POP encapsulation with heat abstractor 6, whole encapsulation is sealed by capsulation material 4, it comprises multilager base plate 10, and described multilager base plate 10 is stacking, between substrate 10 and substrate 10, is connected by soldered ball 2 or copper post, on described substrate 10, be provided with one or more chips 30, the lower surface of bottom substrate 10 is provided with IO pin 5, and described IO pin 5 is from encapsulation bottom surface or side fan-out, and described chip 30 tops are provided with heat abstractor 6.Described heat abstractor 6 extends and exposes or stretch out from package side surface.Certainly, heat abstractor 6 can be selected from package side surface is stretched out up or down or the extension of other structure, to increase the surface area contacting with air, strengthens heat dispersion.Described heat abstractor 6 is metal heat-conducting material.Metal heat-conducting material can be copper sheet or aluminum alloy heat sink etc., can in conjunction with cost and radiating effect need to select metal heat-conducting material, to reach better heat-conducting effect.On described heat abstractor 6, be provided with one or more through-hole structures 61.In figure, just provided preferably through-hole structure 61 embodiment is set, through-hole structure 61 can arrange as required, can effectively strengthen radiating effect by through-hole structure 61 is set on heat abstractor 6.
Be encapsulated as example with the POP with two-layer substrate below, the POP encapsulating structure with heat abstractor is described in detail in detail.Obvious, the POP encapsulation with heat abstractor can be also to have multilager base plate, each laminar substrate can select to arrange or do not arrange heat abstractor as required.
As shown in Figure 2, as the utility model the first preferred embodiment, described chip 30 is connected with substrate 10 by gold thread 33, between described chip 30 and heat abstractor 6, is filled with Heat Conduction Material 7.Gold thread 33 is connected and can simplifies technique with substrate 10, saves cost.The Heat Conduction Material 7 of filling between chip 30 and heat abstractor 6 can buffer chip 30 with heat abstractor 6 between hard contact, protect chip 30 to be without prejudice.
As shown in Figure 3, as the utility model the second preferred embodiment, described chip 30 is connected with substrate 10 by chip leg 34.Described chip 30 directly contacts with heat abstractor 6.Chip 30 adopts chip leg 34 to be connected with substrate 10 and can avoid gold thread 33 to connect the data transmission delay producing, be suitable for high-speed chip 30.Chip 30 directly contacts and is connected the contact-making surface that can strengthen chip 30 and fin with heat abstractor 6, thereby strengthens radiating effect.
Preferably, described multilager base plate 10 is top substrate layer 11 and lower laminar substrate 12, in described top substrate layer 11, be provided with storage chip 32, on described lower laminar substrate 12, be provided with processor chips 31 or baseband chip, described heat abstractor 6 is arranged on the top of processor chips 31 or baseband chip.Owing to being positioned at, processor chips 31 or the baseband chip caloric value of lower laminar substrate 12 is large, and the storage chip 32 that is positioned at top substrate layer 11 generates heat little.By be arranged on heat abstractor 6 on processor chips 31 or baseband chip effectively transmitting processor chip 31 or baseband chip to package outside, make it effectively fall heat, improve service behaviour.
The utility model is by being directly transmitted to package outside the heat dissipation of each layer of packaged chip 30 of POP encapsulation, heat transmission no longer encapsulates through upper strata, reduce thermal resistance, the radiating effect of POP encapsulation is greatly improved, and then the performance that makes chip 30 is able to better performance, there is good economic and social benefit.
More than that better enforcement of the present utility model is illustrated, but the invention is not limited to described embodiment, those of ordinary skill in the art also can make all equivalent variations or replacement under the prerequisite without prejudice to the utility model spirit, and the distortion that these are equal to or replacement are all included in the application's claim limited range.

Claims (9)

1. the POP encapsulation with heat abstractor, it is characterized in that: whole encapsulation is sealed by capsulation material, it comprises multilager base plate, described multilager base plate is stacking, between substrate and substrate, be connected by soldered ball or copper post, be provided with one or more chips on described substrate, the lower surface of bottom substrate is provided with IO pin, described IO pin is from encapsulation bottom surface or side fan-out, and described chip top is provided with heat abstractor.
2. a kind of POP encapsulation with heat abstractor according to claim 1, is characterized in that: described heat abstractor extends and exposes or stretch out from package side surface.
3. a kind of POP encapsulation with heat abstractor according to claim 2, is characterized in that: described heat abstractor is metal heat-conducting material.
4. a kind of POP encapsulation with heat abstractor according to claim 3, is characterized in that: on described heat abstractor, be provided with one or more through-hole structures.
5. according to a kind of POP encapsulation with heat abstractor described in claim 1 to 4 any one, it is characterized in that: described chip is connected with substrate by gold thread.
6. according to a kind of POP encapsulation with heat abstractor described in claim 1 to 4 any one, it is characterized in that: described chip is connected with substrate by chip leg.
7. according to a kind of POP encapsulation with heat abstractor described in claim 1 to 4 any one, it is characterized in that: described chip directly contacts with heat abstractor.
8. according to a kind of POP encapsulation with heat abstractor described in claim 1 to 4 any one, it is characterized in that: between described chip and heat abstractor, be filled with Heat Conduction Material.
9. according to a kind of POP encapsulation with heat abstractor described in claim 1 to 4 any one, it is characterized in that: described multilager base plate is top substrate layer and lower laminar substrate, in described top substrate layer, be provided with storage chip, on described lower laminar substrate, be provided with processor chips or baseband chip, described heat abstractor is arranged on the top of processor chips or baseband chip.
CN201420050600.4U 2014-01-26 2014-01-26 POP (package on package) package having heat radiation device Expired - Lifetime CN203774286U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201420050600.4U CN203774286U (en) 2014-01-26 2014-01-26 POP (package on package) package having heat radiation device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201420050600.4U CN203774286U (en) 2014-01-26 2014-01-26 POP (package on package) package having heat radiation device

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107369662A (en) * 2017-06-19 2017-11-21 北京嘉楠捷思信息技术有限公司 Heat radiator
CN109411373A (en) * 2018-09-18 2019-03-01 中国工程物理研究院电子工程研究所 A method of realizing that multilager base plate is three-dimensional stacked using carrier supported
WO2019161641A1 (en) * 2018-02-24 2019-08-29 华为技术有限公司 Chip and packaging method
CN112885794A (en) * 2021-01-15 2021-06-01 浪潮电子信息产业股份有限公司 PCB (printed Circuit Board), POP (Point of Place) packaging heat dissipation structure and manufacturing method thereof

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107369662A (en) * 2017-06-19 2017-11-21 北京嘉楠捷思信息技术有限公司 Heat radiator
CN107369662B (en) * 2017-06-19 2020-11-24 北京嘉楠捷思信息技术有限公司 Heat radiator
WO2019161641A1 (en) * 2018-02-24 2019-08-29 华为技术有限公司 Chip and packaging method
US11276645B2 (en) 2018-02-24 2022-03-15 Huawei Technologies Co., Ltd. Encapsulation of a substrate electrically connected to a plurality of pin arrays
CN109411373A (en) * 2018-09-18 2019-03-01 中国工程物理研究院电子工程研究所 A method of realizing that multilager base plate is three-dimensional stacked using carrier supported
CN112885794A (en) * 2021-01-15 2021-06-01 浪潮电子信息产业股份有限公司 PCB (printed Circuit Board), POP (Point of Place) packaging heat dissipation structure and manufacturing method thereof
CN112885794B (en) * 2021-01-15 2023-04-07 浪潮电子信息产业股份有限公司 PCB (printed Circuit Board), POP (Point of Place) packaging heat dissipation structure and manufacturing method thereof

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GR01 Patent grant
CX01 Expiry of patent term

Granted publication date: 20140813

CX01 Expiry of patent term