CN203774286U - POP (package on package) package having heat radiation device - Google Patents

Abstract

The utility model discloses a POP package with a heat dissipation device. The whole package is encapsulated by a plastic sealing material, which includes a multi-layer substrate, the multi-layer substrate is stacked, and the substrates are connected by solder balls or copper columns. One or more chips are arranged on the substrate, IO pins are arranged on the lower surface of the bottom substrate, and the IO pins are fanned out from the bottom surface or the side of the package, and a cooling device is arranged above the chips. The utility model directly conducts the heat dissipation of each packaged chip in the POP package to the outside of the package, and the heat transfer no longer passes through the upper package, which reduces the thermal resistance, greatly improves the heat dissipation effect of the POP package, and further improves the performance of the chip. It can be played better and has good economic and social benefits. The utility model can be widely used in various POP packages.

Description

A POP package with cooling device

technical field

The utility model relates to the field of integrated circuit packaging, in particular to a POP packaging.

Background technique

POP: Package On Package, stacked package, a three-dimensional package structure.

With the rapid development of electronic products in the direction of miniaturization, high density, high integration and multi-function, integrated circuit packaging has developed from two-dimensional to three-dimensional, and the increase in integration has brought about the problem of chip heat dissipation, which limits the performance.

As the main packaging method for high-density integration of integrated circuit packaging, POP packaging has received more and more attention. At present, the heat dissipation structure of the mainstream POP package is shown in Figure 1. Since the lower substrate 12 of the general POP packaging structure is equipped with a processor chip 31 or a baseband chip, the heat is large, while the upper substrate 11 is generally equipped with a memory chip 32, which generates little heat. But because the common radiator 9 is all directly installed on the surface of the POP upper package, the heat of the lower package needs to pass through the upper package to be transferred to the radiator. Raised too high to function properly. This heat dissipation solution limits the performance of the lower processor chip 31 or the baseband chip, and also limits the application of the POP package in the field of low-power chips.

Utility model content

In order to solve the above-mentioned technical problems, the purpose of this utility model is to provide a POP package with a cooling device that can greatly improve the heat dissipation effect of the POP package.

The technical scheme adopted in the utility model is:

A POP package with a heat dissipation device, the entire package is encapsulated by a plastic packaging material, which includes a multi-layer substrate, the multi-layer substrates are stacked, the substrates are connected by solder balls or copper pillars, and a or a plurality of chips, IO pins are provided on the bottom surface of the bottom substrate, and the IO pins are fanned out from the bottom surface or side of the package, and a heat dissipation device is provided above the chips.

Preferably, the heat dissipation device extends and exposes or protrudes from the side of the package.

Preferably, the heat sink is made of metal heat conducting material.

Preferably, the heat dissipation device is provided with one or more through-hole structures.

As a first preferred embodiment of the present utility model, the chip is connected to the substrate through gold wires.

As a second preferred embodiment of the present invention, the chip is connected to the substrate through chip soldering feet.

As a second preferred implementation manner of the present utility model, the chip is directly in contact with the heat sink.

As a first preferred implementation manner of the present utility model, a thermal conductive material is filled between the chip and the heat sink.

Preferably, the multi-layer substrate is an upper substrate and a lower substrate, the upper substrate is provided with a memory chip, the lower substrate is provided with a processor chip or a baseband chip, and the heat dissipation device is arranged on the processor chip or the baseband above the chip.

The beneficial effects of the utility model are:

The utility model directly conducts the heat dissipation of each packaged chip in the POP package to the outside of the package, and the heat transfer no longer passes through the upper package, which reduces the thermal resistance, greatly improves the heat dissipation effect of the POP package, and further improves the performance of the chip. It can be played better and has good economic and social benefits.

In addition, the utility model is conducive to better heat dissipation by exposing or protruding from the side of the heat sink; the metal heat conduction material achieves better heat conduction effect; the heat dissipation effect is enhanced by setting a through hole structure on the heat sink.

The utility model can be widely used in various POP packages.

Description of drawings

The specific embodiment of the utility model will be further described below in conjunction with accompanying drawing:

FIG. 1 is a schematic diagram of a heat dissipation structure of a mainstream POP package in the prior art;

Fig. 2 is the structural representation of the first embodiment of the utility model;

Fig. 3 is a schematic structural view of the second embodiment of the utility model.

Detailed ways

It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other.

As shown in Figures 2 and 3, a POP package with a heat sink 6, the entire package is encapsulated by a plastic packaging material 4, which includes a multi-layer substrate 10, the multi-layer substrate 10 stacked, between the substrate 10 and the substrate 10 Connected by solder balls 2 or copper pillars, the substrate 10 is provided with one or more chips 30, and the lower surface of the bottom substrate 10 is provided with IO pins 5, and the IO pins 5 are fanned out from the bottom or side of the package , a heat dissipation device 6 is arranged above the chip 30 . The heat sink 6 extends and is exposed or protrudes from the side of the package. Of course, the heat dissipation device 6 can be selected to protrude from the side of the package and extend upwards or downwards or other structures, so as to increase the surface area in contact with the air and enhance the heat dissipation performance. The heat sink 6 is made of metal heat conducting material. The metal heat conduction material can be copper sheet or aluminum alloy heat sink, etc., and the metal heat conduction material can be selected according to the needs of cost and heat dissipation effect to achieve better heat conduction effect. One or more through-hole structures 61 are disposed on the heat dissipation device 6 . The figure only shows a preferred embodiment of the arrangement of the through-hole structure 61 , the through-hole structure 61 can be provided as required, and the heat dissipation effect can be effectively enhanced by arranging the through-hole structure 61 on the heat sink 6 .

Taking the POP package with two-layer substrate as an example, the structure of the POP package with heat dissipation device will be described in detail below. Apparently, the POP package with heat dissipation device may also have a multi-layer substrate, and each layer of substrate can be provided or not provided with a heat dissipation device as required.

As shown in FIG. 2 , as a first preferred embodiment of the present invention, the chip 30 is connected to the substrate 10 through a gold wire 33 , and a thermal conductive material 7 is filled between the chip 30 and the heat sink 6 . The connection of the gold wire 33 to the substrate 10 can simplify the process and save the cost. The thermally conductive material 7 filled between the chip 30 and the heat sink 6 can buffer the hard contact between the chip 30 and the heat sink 6 and protect the chip 30 from damage.

As shown in FIG. 3 , as a second preferred embodiment of the present invention, the chip 30 is connected to the substrate 10 through chip soldering pins 34 . The chip 30 is in direct contact with the heat sink 6 . The chip 30 and the substrate 10 are connected by chip solder pins 34 to avoid the data transmission delay caused by the connection of the gold wire 33 , which is suitable for high-speed chips 30 . The direct contact connection between the chip 30 and the heat sink 6 can strengthen the contact surface between the chip 30 and the heat sink, thereby enhancing the heat dissipation effect.

Preferably, the multilayer substrate 10 is an upper substrate 11 and a lower substrate 12, the upper substrate 11 is provided with a memory chip 32, the lower substrate 12 is provided with a processor chip 31 or a baseband chip, and the heat dissipation device 6 is arranged above the processor chip 31 or the baseband chip. Since the processor chip 31 or the baseband chip located on the lower substrate 12 generates a large amount of heat, while the memory chip 32 located on the upper substrate 11 generates less heat. The heat dissipation device 6 arranged on the processor chip 31 or the baseband chip can effectively transfer the temperature of the processor chip 31 or the baseband chip to the outside of the package, so as to effectively reduce heat and improve working performance.

The utility model directly conducts the heat dissipation of each packaged chip 30 of the POP package to the outside of the package, and the heat transfer no longer passes through the upper package, which reduces the thermal resistance, greatly improves the heat dissipation effect of the POP package, and further makes the chip 30 The performance can be better played, with good economic and social benefits.

The above is a specific description of the preferred implementation of the present utility model, but the invention is not limited to the described embodiments, those skilled in the art can also make various equivalent deformations without violating the spirit of the present utility model Or replacement, these equivalent modifications or replacements are all included within the scope defined by the claims of the present application.

Claims (9)

1. the POP encapsulation with heat abstractor, it is characterized in that: whole encapsulation is sealed by capsulation material, it comprises multilager base plate, described multilager base plate is stacking, between substrate and substrate, be connected by soldered ball or copper post, be provided with one or more chips on described substrate, the lower surface of bottom substrate is provided with IO pin, described IO pin is from encapsulation bottom surface or side fan-out, and described chip top is provided with heat abstractor.

2. a kind of POP encapsulation with heat abstractor according to claim 1, is characterized in that: described heat abstractor extends and exposes or stretch out from package side surface.

3. a kind of POP encapsulation with heat abstractor according to claim 2, is characterized in that: described heat abstractor is metal heat-conducting material.

4. a kind of POP encapsulation with heat abstractor according to claim 3, is characterized in that: on described heat abstractor, be provided with one or more through-hole structures.

5. according to a kind of POP encapsulation with heat abstractor described in claim 1 to 4 any one, it is characterized in that: described chip is connected with substrate by gold thread.

6. according to a kind of POP encapsulation with heat abstractor described in claim 1 to 4 any one, it is characterized in that: described chip is connected with substrate by chip leg.

7. according to a kind of POP encapsulation with heat abstractor described in claim 1 to 4 any one, it is characterized in that: described chip directly contacts with heat abstractor.

8. according to a kind of POP encapsulation with heat abstractor described in claim 1 to 4 any one, it is characterized in that: between described chip and heat abstractor, be filled with Heat Conduction Material.

9. according to a kind of POP encapsulation with heat abstractor described in claim 1 to 4 any one, it is characterized in that: described multilager base plate is top substrate layer and lower laminar substrate, in described top substrate layer, be provided with storage chip, on described lower laminar substrate, be provided with processor chips or baseband chip, described heat abstractor is arranged on the top of processor chips or baseband chip.