CN207690788U - A kind of GPP chip of surface layer alloy force enhancing - Google Patents

Abstract

The utility model discloses a kind of GPP chips of surface layer alloy force enhancing, it is related to GPP chip production technical field, it includes the nickel metal layer of silicon chip layer and plating knot in silicon chip layer surface to change GPP chip, the nickel metal layer is by the first sintering nickel metal layer, second sintering nickel metal layer and third nickel metal layer are constituted, under the situation for keeping whole nickel metal layer thickness constant, nickel metal layer is prepared into using chemical nickel plating three times and two-step sintering alloying, the coating of each nickel is thinned, the binding force of silicon and nickel enhances, by plating one layer of nickel more, when back segment process forms diode, the combination pulling force enhancing 20% of the surface layer nickel and copper lead of silicon chip, reduce the probability broken in silicon chip, improve the yields of crystal grain.

Description

A kind of GPP chip of surface layer alloy force enhancing

Technical field

The utility model belongs to GPP chip production technical field, is related to silicon chip surface metallization, and in particular to Yi Zhongbiao The GPP chip of layer alloy force enhancing.

Background technology

Chemical Ni-plating layer is strong by feat of itself corrosion resistance, welding service life is long, layer on surface of metal binding force increases, magnetic The advantages such as intelligent work and wear-resisting property are good, realize in industrial production etc. and are widely applied.In recent years, with chemical plating Nickel layer is popularized, and chemical plating nickel technology has obtained certain development, and is successfully applied to every aspect.Wherein, in electronics work Application effect in industry is the most notable.Chemical plating nickel technology meets electronic product and tends to thin volume, light weight and multi-functional Property developing direction, at present chemical plating nickel technology be realize microfine circuit manufacture important technology.

For silicon chip after the diffusion of phosphorus boron, positive and negative forms 5 valences and trivalent electronics level, is provided with rectification electrical characteristics.At this moment Chip surface layer be still silicon layer, no metal layer cannot be welded on electronic device.At this moment, it needs in silicon chip surface layer chemical plating Method plates one layer of nickel alloy, is convenient for two-sided welding pin, becomes diode.Traditional mode plates one layer using silicon chip surface Nickel carries out nickel sintering, then plates one layer of nickel, and being allowed to surface has solderability.This technique is referred to as " one burns two plating method ", by two poles Pipe industry generally uses." one burns two plating method " though generally using, there is the hidden danger of welding rate difference, especially later process exists When welding copper lead on crystal grain, stretching resistance is not strong, and example 50mm crystal grain stretching resistances are only 1.5kg, and slightly stronger pulling force will be in crystalline substance It is broken on layer, yields is caused to decline, cause client discontented, we analyze traditional " one burns two plating method " defect cause, are First time nickel plating surface layer is thicker, is easy nickel removal after nickel sintering, nickel layer in the pulling force of back segment process is caused to fall off.

Utility model content

According to the above-mentioned deficiencies of the prior art, the utility model is to propose a kind of GPP chip of surface layer alloy force enhancing, is Solution above-mentioned technical problem, the technical solution adopted in the utility model are：

The nickel metal in silicon chip layer surface is tied in a kind of GPP chip of surface layer alloy force enhancing, including silicon chip layer and plating Layer, the nickel metal layer are made of the first sintering nickel metal layer, the second sintering nickel metal layer and third nickel metal layer.

Preferably, the thickness of the nickel metal layer is 2-4 μm.

Preferably, the first sintrered nickel metal layer thickness is 0.5-1 μm, and the second sintrered nickel metal layer thickness is 0.8-1.3 μm, the third nickel metal layer thickness is 0.8-1.8 μm, and first layer nickel thickness is thin, is conducive to enhance silicon and nickel Binding force, by plating one layer of nickel, when back segment process forms diode, the surface layer nickel of silicon chip and the combination pulling force of copper lead enhance more 20%, the probability broken in silicon chip is reduced, the yields of crystal grain is improved.

The prior art is compared, the utility model has the beneficial effects that：

1. the utility model is ensureing the constant situation of nickel metal layer integral thickness using the structure of plating three layers of nickel layer of knot Under, the thickness of first layer nickel is thinned, is conducive to the binding force for enhancing silicon and nickel, by plating one layer of nickel, back segment process more When forming diode, the combination pulling force enhancing 20% of the surface layer nickel and copper lead of silicon chip reduces the probability broken in silicon chip, carries The high yields of crystal grain.

Nickel metal layer is prepared using the method that chemical plating and two-step sintering are combined three times 2. practical, improve silicon chip with The amalgamation of nickel, crystal grain stretching resistance enhancing, improves product yield.

Description of the drawings

In order to illustrate more clearly of specific embodiment of the present invention or technical solution in the prior art, it is described below In attached drawing be that some embodiments of the utility model are not paying creativeness for those of ordinary skill in the art Under the premise of labour, other drawings may also be obtained based on these drawings.

1. Fig. 1 is the utility model GPP chip structural schematic diagram in the prior art.

2. Fig. 2 is GPP chip structural schematic diagram in the utility model embodiment.

1, silicon chip layer, the 2, nickel metal layer, 21, first sintering nickel metal layer, the 22, second sintering nickel metal layer, 23, second Nickel metal layer, 24, third nickel metal layer.

Specific implementation mode

The technical solution of the utility model is clearly and completely described below in conjunction with attached drawing, it is clear that described Embodiment is the utility model a part of the embodiment, instead of all the embodiments.Based on the embodiments of the present invention, originally The every other embodiment that field those of ordinary skill is obtained without making creative work, belongs to this practicality Novel protected range.

The nickel metal in silicon chip layer surface is tied in a kind of GPP chip of surface layer alloy force enhancing, including silicon chip layer 1 and plating The integral thickness of layer 2, nickel metal layer 2 is 3 μm, and nickel metal layer 2 is by the sintering nickel metal layer and one layer of nickel of two layers of different-thickness Metal layer, that is, third nickel metal layer 24 is constituted, and it is 0.5 μm that first layer, which is sintered 21 thickness of nickel metal layer, and the second layer is sintered nickel metal layer 22 thickness are 1 μm, and 24 thickness of third layer nickel metal layer is 1.5 μm.

During preparation, by the silicon chip after the diffusion of phosphorus boron, the surface activation process of silicon chip 1 is first carried out, The formula of activating solution is：After chlorauride+pure water+hydrochloric acid+hydrofluoric acid matches according to a certain percentage, silicon chip 1 is put into activating solution In in 25 DEG C of temperature immersion 5s, the activating solution that cleaning removes surface then is carried out to the silicon chip 1 after activation, is then used special GPP chemical nickel-plating liquids under pH value is 8.2, carries out first time chemical deposition nickel plating 10s, then will plate in 82 DEG C of temperature Chip at nitrogen atmosphere, 500 DEG C of temperature, sintering 30min is sintered alloying, after alloying, with 20-25 DEG C of chemical liquids Lower processing 1min removes extra nickel or nickel oxide, then carries out secondary chemical nickel plating and sintered alloy, second of plating The time of nickel is 40s, is sintered 25min, carries out removing extra nickel or nickel oxide again after alloying, then carries out the change of third time Nickel plating is learned, one layer of metallochemistry nickel layer, that is, third nickel metal layer 24 is formed on two layers of nickel metal layer of sintered alloy, convenient for double Face welding pin becomes diode, and whole process, which is seen, is the increase in process and time, but does not increase nickel metal layer 2 actually Thickness, in the case where ensureing the constant situation of whole 2 thickness of nickel metal layer, the coating of each nickel is thinned, first sintering nickel metal 21 thickness of layer are most thin, and the binding force of enhancing silicon and nickel by plating one layer of nickel more, when back segment process forms diode, the table of silicon chip The combination pulling force enhancing 20% of layer nickel and copper lead, reduces the probability broken in silicon chip, improves the yields of crystal grain, depth by Client welcomes, the method that chemical plating and two-step sintering are combined three times, overcomes " two plating method of burning " and is prepared into burn for the first time It is thicker to tie first time nickel coating in nickel metal layer 21 and the second nickel metal layer 23, is easy nickel removal after nickel sintering, leads to back segment process Pulling force in the defect that falls off of nickel layer.

In actual application, nickel plating is identical as the secondary amount of nickel plating consumable nickel three times, and nickel plating three times increases the process time 25%, increase electric power water consumption 10%；Silicon chip 1 and the amalgamation of nickel enhance, crystal grain stretching resistance enhancing 20%, because nickel layer is broken Customer complaint rate be down to zero, the raising of product yield, punching has disappeared the raising of cost slightly, and overall economic benefit is to improve.

The utility model is exemplarily described above in conjunction with specific embodiment, it is clear that the utility model implements Be not subject to the restrictions described above, if use the utility model methodology and technical solution carry out it is various insubstantial The improvement of property, or it is not improved the design of the utility model and technical solution are directly applied into other occasions, in this reality Within novel protection domain.The scope of protection of the utility model should be with protection domain defined by claims It is accurate.

Claims (3)

1. the nickel metal in silicon chip layer surface is tied in a kind of GPP chip of surface layer alloy force enhancing, including silicon chip layer (1) and plating Layer (2), which is characterized in that the nickel metal layer (2) is by the first sintering nickel metal layer (21), the second sintering nickel metal layer (22) and third nickel metal layer (24) is constituted.

2. the GPP chip of alloy force enhancing in surface layer according to claim 1, it is characterised in that the nickel metal layer (2) Thickness is 2-4 μm.

3. the GPP chip of alloy force enhancing in surface layer according to claim 1, which is characterized in that the first sintrered nickel gold It is 0.5-1 μm to belong to layer (21) thickness, and described second sintering nickel metal layer (22) thickness is 0.8-1.3 μm, the third nickel metal Layer (24) thickness is 0.8-1.8 μm.