CN207651475U - A kind of chip encapsulation assembly - Google Patents
A kind of chip encapsulation assembly Download PDFInfo
- Publication number
- CN207651475U CN207651475U CN201721570885.4U CN201721570885U CN207651475U CN 207651475 U CN207651475 U CN 207651475U CN 201721570885 U CN201721570885 U CN 201721570885U CN 207651475 U CN207651475 U CN 207651475U
- Authority
- CN
- China
- Prior art keywords
- solder mask
- pad
- chip encapsulation
- groove
- raceway groove
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000005538 encapsulation Methods 0.000 title claims abstract description 19
- 229910000679 solder Inorganic materials 0.000 claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 238000003466 welding Methods 0.000 claims abstract description 8
- 230000000712 assembly Effects 0.000 claims abstract description 7
- 238000000429 assembly Methods 0.000 claims abstract description 7
- 239000003973 paint Substances 0.000 claims description 3
- 238000001746 injection moulding Methods 0.000 abstract description 9
- 238000004519 manufacturing process Methods 0.000 abstract description 6
- 238000005516 engineering process Methods 0.000 description 4
- 239000003292 glue Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 240000007594 Oryza sativa Species 0.000 description 1
- 235000007164 Oryza sativa Nutrition 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000004568 cement Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 235000009566 rice Nutrition 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 238000007493 shaping process Methods 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
The utility model discloses a kind of chip encapsulation assemblies, are used for welding component, including：Package substrate, two pads for being welded in component both ends and coated on the solder mask on package substrate；Solder mask is equipped with groove, and groove runs through setting along the thickness direction of solder mask；Two pad intervals are fixed in groove, and raceway groove is formed between two pads, and the outside of pad is reversely stretched out at the both ends of raceway groove respectively.Chip encapsulation assembly provided by the utility model removes the solder mask in the region between two pads to form raceway groove, and the outside of pad is reversely stretched out at the both ends of raceway groove respectively, so that retaining enough gaps between component and package substrate, to ensure hole of not leaving a blank in injection moulding process in the case where not increasing cost, and do not influence production efficiency.
Description
Technical field
The utility model is related to chip package field more particularly to a kind of chip encapsulation assemblies.
Background technology
With the development of integrated antenna package technology, High Density Integration encapsulation technology becomes more and more popular.Especially SiP is encapsulated
Due to integrated level height, the advantages such as design flexibility is big, and the R＆D cycle is short, and expense is low are widely used technology.SiP is needed more
Kind component one reinstates plastic-packaged, this brings great challenge to packaging technology.Especially resistance, capacitance, the inductance of small size
Equal elements, during plastic packaging injecting glue, glue can not be filled up completely component base, to form cavity, scolding tin when causing to weld
Short circuit is formed by cavity, product function is caused to fail；In addition, due to easy residue moisture in cavity, high temperature is encountered, will produce quick-fried
Popped rice effect, also results in package failure.
In order to solve the above problem, common method is to use vacuum plastic sealing mold, is exactly to carry out injection molding shaping to product
When, mould inside is vacuumized, such plastic cement can filled up completely with mould cavity, avoid component base from forming cavity.But this
The shortcomings that kind method, is also apparent from：Vacuum mold it is with high costs；Injection-moulding device needs to improve upgrading, increases cost；It vacuumizes
Working hour can be increased, reduce production efficiency.
Utility model content
For overcome the deficiencies in the prior art, the purpose of this utility model is to provide a kind of chip encapsulation assemblies, with solution
Certainly existing injection moulding process easily forms the problem in cavity, and does not influence production efficiency.
The purpose of this utility model adopts the following technical scheme that realization：
A kind of chip encapsulation assembly is used for welding component, including：Package substrate, be welded in component both ends two
Pad and coated on the solder mask on the package substrate；The solder mask is equipped with groove, and the groove is along the welding resistance
The thickness direction of layer is through setting；Two pad intervals are fixed in the groove, and are formed between two pads
The outside of the pad is reversely stretched out at raceway groove, the both ends of the raceway groove respectively.
Further, the distance of the both ends of the raceway groove to the component is 50 ± 5 microns.
Further, the distance between two described pads are 250 ± 20 microns.
Further, the thickness of the pad is 20 ± 5 microns.
Further, the thickness of the solder mask is 25 ± 10 microns.
Further, the solder mask is the green paint of welding resistance.
Further, the pad is bonded and fixed on the package substrate.
Compared with prior art, the beneficial effects of the utility model are：The solder mask in the region between two pads is gone
Fall to form raceway groove, and the outside of pad is reversely stretched out at the both ends of raceway groove respectively so that retain foot between component and package substrate
Enough gaps to ensure hole of not leaving a blank in injection moulding process in the case where not increasing cost, and do not influence production efficiency.
Description of the drawings
Fig. 1 is the schematic diagram for the chip encapsulation assembly that the utility model embodiment provides；
In figure：1, component；2, package substrate；3, pad；4, solder mask；41, groove；42, raceway groove.
Specific implementation mode
In the following, in conjunction with attached drawing and specific implementation mode, the utility model is described further, it should be noted that
Under the premise of not colliding, it can be formed in any combination between various embodiments described below or between each technical characteristic new
Embodiment.
As shown in Figure 1, the chip encapsulation assembly that the utility model embodiment provides, is used for welding component 1, including：Envelope
Dress substrate 2 is welded in two pads 3 at 1 both ends of component and coated on the solder mask 4 on package substrate 2；On solder mask 4
Equipped with groove 41, groove 41 runs through setting along the thickness direction of solder mask 4；Two intervals of pad 3 are fixed in groove 41, and two
Raceway groove 42 is formed between a pad 3, the outside of pad 3 is reversely stretched out at the both ends of raceway groove 42 respectively.It is processed in chip encapsulation assembly
In the process, after two pads 3 are fixed on package substrate 2, solder mask 4 is coated on entire package substrate 2, solder mask 4 is opened
When groove 41, the solder mask 4 in the region between two pads 3 is removed to form raceway groove 42 simultaneously, and the both ends difference of raceway groove 42
The reversed outside for stretching out pad 3 so that retain enough gaps between component 1 and package substrate 2, to not increase cost
In the case of ensure not leave a blank hole in injection moulding process, and do not influence production efficiency.
As preferred embodiment, the distance of both ends to the component 1 of raceway groove 42 is 50 ± 5 microns, ensures first device
1 both ends of part retain enough gaps, prevent from forming cavity in injection moulding process.
As preferred embodiment, pad 3 is bonded and fixed to by resin glue on package substrate 2, between two pads 3
Distance be 250 ± 20 microns, the thickness of pad 3 is 20 ± 5 microns.
As preferred embodiment, solder mask 4 is the green paint of welding resistance, and the thickness of solder mask 4 is 25 ± 10 microns, is being encapsulated
Substrate 2 shows to form protective layer and plays insulating effect.
Chip encapsulation assembly provided by the utility model removes the solder mask 4 of 1 lower section of component to form raceway groove 42, and ditch
The outside of pad 3 is reversely stretched out at the both ends in road 42 respectively so that retains enough gaps between component 1 and package substrate 2, no
Cavity will not be caused with vacuum mold injection molding, to ensure hole of not leaving a blank in injection moulding process in the case where not increasing cost,
And do not influence production efficiency.
The above embodiment is only preferred embodiments of the present invention, cannot be protected with this to limit the utility model
Range, the variation of any unsubstantiality that those skilled in the art is done on the basis of the utility model and replacing belongs to
In the utility model range claimed.
Claims (7)
1. a kind of chip encapsulation assembly is used for welding component, which is characterized in that including：Package substrate is welded in component two
End two pads and coated on the solder mask on the package substrate；The solder mask is equipped with groove, the groove edge
The thickness direction of the solder mask is through setting；Two pad intervals are fixed in the groove, and two pads
Between form raceway groove, the outside of the pad is reversely stretched out at the both ends of the raceway groove respectively.
2. chip encapsulation assembly according to claim 1, which is characterized in that the both ends of the raceway groove to the component
Distance is 50 ± 5 microns.
3. chip encapsulation assembly according to claim 2, which is characterized in that the distance between two described pads are 250
± 20 microns.
4. according to claim 1-3 any one of them chip encapsulation assemblies, which is characterized in that the thickness of the pad be 20 ±
5 microns.
5. according to claim 1-3 any one of them chip encapsulation assemblies, which is characterized in that the thickness of the solder mask is 25
± 10 microns.
6. according to claim 1-3 any one of them chip encapsulation assemblies, which is characterized in that the solder mask is that welding resistance is green
Paint.
7. according to claim 1-3 any one of them chip encapsulation assemblies, which is characterized in that the pad is bonded and fixed to institute
It states on package substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721570885.4U CN207651475U (en) | 2017-11-20 | 2017-11-20 | A kind of chip encapsulation assembly |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201721570885.4U CN207651475U (en) | 2017-11-20 | 2017-11-20 | A kind of chip encapsulation assembly |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207651475U true CN207651475U (en) | 2018-07-24 |
Family
ID=62890347
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201721570885.4U Expired - Fee Related CN207651475U (en) | 2017-11-20 | 2017-11-20 | A kind of chip encapsulation assembly |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207651475U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109411360A (en) * | 2018-08-29 | 2019-03-01 | 深圳市天毅科技有限公司 | A kind of chip generation method and chip |
-
2017
- 2017-11-20 CN CN201721570885.4U patent/CN207651475U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109411360A (en) * | 2018-08-29 | 2019-03-01 | 深圳市天毅科技有限公司 | A kind of chip generation method and chip |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105281706B (en) | A kind of SAW filter encapsulating structure and manufacturing method | |
| CN204857714U (en) | Novel lead frame | |
| CN205177839U (en) | System level packaging circuit of airtight type ceramic package | |
| CN207651475U (en) | A kind of chip encapsulation assembly | |
| CN106158783A (en) | There is the radiator fin device of adhesive-spill-preventing structure | |
| CN208336207U (en) | A kind of biradical island lead frame frame and its SOT33-5L packaging part | |
| CN106711098B (en) | IC plastic capsulation structure and preparation method thereof | |
| CN107275045B (en) | A kind of production method of inductance and its preparation method of capsulation material | |
| CN207682806U (en) | A kind of semiconductor packaging mold and packaging system | |
| CN107833960A (en) | A kind of LED support and its manufacture method with overflow ducts and overflow launder | |
| CN203491253U (en) | Plastic packaging structure for semiconductors | |
| CN109545759A (en) | A kind of power module architectures and its manufacturing method | |
| CN201229941Y (en) | Lead wire frame for transistor | |
| CN205319144U (en) | Encapsulation chip's structure | |
| CN209515637U (en) | A kind of power module architectures | |
| CN104810462A (en) | ESOP8 lead frame of medium-and high-power LED driving chip | |
| CN205845941U (en) | PIP encapsulating structure | |
| CN207909856U (en) | Conductor package substrate and its package structure | |
| CN107369656A (en) | A kind of window-type ball grid array package assembling | |
| CN206532769U (en) | A kind of chip injection molding packaging structure | |
| CN106026959A (en) | Method of 3D printing technology for surface acoustic filter chip packaging manufacturing | |
| CN206401303U (en) | A kind of chip-packaging structure for hindering glue | |
| CN202120882U (en) | Semiconductor packaging mold construction having no pins all around | |
| CN206116376U (en) | TO total incapsulation packaging structure | |
| CN205984976U (en) | Plastic type buries and holds metal crate structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20180724 |