CN207587730U - 具有天线组件的半导体封装结构 - Google Patents

具有天线组件的半导体封装结构 Download PDF

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CN207587730U
CN207587730U CN201721686204.0U CN201721686204U CN207587730U CN 207587730 U CN207587730 U CN 207587730U CN 201721686204 U CN201721686204 U CN 201721686204U CN 207587730 U CN207587730 U CN 207587730U
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layer
substrate
antenna module
antenna
semiconductor package
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陈彦亨
林正忠
吴政达
林章申
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SJ Semiconductor Jiangyin Corp
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Abstract

本实用新型提供一种具有天线组件的半导体封装结构，包括：基板，具有第一表面及第二表面；重新布线层，位于第一表面上；金属凸块，电连接于重新布线层远离基板的一侧；半导体芯片，电连接于重新布线层远离基板一侧；底部填充层，填充满半导体芯片与重新布线层之间的间隙；聚合物层，包围金属凸块及半导体芯片；天线组件，位于第二表面上，通过上述方案，本实用新型的半导体结构将天线组件与重新布线层设置于基板的两个相对的表面，有利于进行合理的封装布局设计，选择石英玻璃等作为基板，热传导性良好，解决了热效应的问题，由于石英片无翘曲问题，保证在后续工艺中芯片不易翘曲以及断裂等，解决了各部件结合强度差易受外界水汽影响等问题。

Description

具有天线组件的半导体封装结构
技术领域
本实用新型属于半导体封装技术领域，特别是涉及一种具有天线组件的半导体封装结构。
背景技术
随着集成电路的功能越来越强、性能和集成度越来越高，以及新型的集成电路出现，封装技术在集成电路产品中扮演着越来越重要的角色，在整个电子系统的价值中所占的比例越来越大。同时，随着集成电路特征尺寸达到纳米级，晶体管向更高密度、更高的时钟频率发展，封装也向更高密度的方向发展
由于扇出晶圆级封装(fowlp)技术由于具有小型化、低成本和高集成度等优点，以及具有更好的性能和更高的能源效率，扇出晶圆级封装(fowlp)技术已成为高要求的移动/无线网络等电子设备的重要的封装方法，是目前最具发展前景的封装技术之一。另外，出于通信效果的考虑，射频芯片在使用时都会设置天线。但是，现有射频天线都是开发者在对射频功能模块进行layout设计时，直接在PCB板上layout天线或留出外接天线的接口，现有射频天线大多直接在PCB板上layout天线，而此种方法要保证天线增益，就必须以牺牲PCB面积为代价。并且采用塑封等工艺的扇出型晶圆级封装在翘曲等方面控制困难，翘曲现象难以得到缓解，并且封装过程中材料的涨缩等可能引起滑移以及错位等问题，也难以得到控制，热传导性差，引起热效应的问题等，另外，由于各部件的制备工艺及选择，也很容易造成相互之间的结合强度往往不能达到预期，且容易受外界水汽等影响。
因此，如何提供一种具有天线的低成本的半导体封装结构以解决现有技术中容易发生翘曲、热传导差导致的热效应差以及封装结构结合强度差易受外界影响等问题实属必要。
实用新型内容
鉴于以上所述现有技术的缺点，本实用新型的目的在于提供一种具有天线组件的半导体封装结构，用于解决现有技术中易发生翘曲、结合强度差、易受外界水汽影响以及热传导差导致的热效应问题的问题。
为实现上述目的及其他相关目的，本实用新型提供一种具有天线组件的半导体封装结构，其特征在于，包括：
基板，所述基板具有相对的第一表面及第二表面；
重新布线层，位于所述基板的第一表面上；
金属凸块，位于所述重新布线层远离所述基板的一侧并与所述重新布线层电连接；
半导体芯片，位于所述重新布线层远离所述基板一侧的表面，并与所述重新布线层电连接，且所述半导体芯片与所述金属凸块之间具有间距；
底部填充层，填充满所述半导体芯片与所述重新布线层之间的间隙；
聚合物层，位于所述重新布线层远离所述基板一侧的表面，且包围所述金属凸块、所述底部填充层及所述半导体芯片，并显露部分所述金属凸块及部分所述半导体芯片；以及
天线组件，位于所述基板的第二表面上。
作为本实用新型的一种优选方案，所述聚合物层包括聚酰亚胺层、硅胶层以及环氧树脂层中的任意一种。
作为本实用新型的一种优选方案，所述基板包括石英玻璃基板或蓝宝石基板。
作为本实用新型的一种优选方案，所述重新布线层的结构具体包括：
介质层，接合于所述基板的第一表面上；
至少一层金属线层，所述金属线层位于所述介质层的内部；
凸块下金属层，位于所述介质层远离所述基板一侧的表面，并延伸至所述介质层的内部与所述金属线层电连接，其中，所述金属凸块设置于所述凸块下金属层上。
作为本实用新型的一种优选方案，所述金属凸块的具体结构包括：铜柱、位于所述铜柱上表面的镍层以及位于所述镍层上的焊料凸点。
作为本实用新型的一种优选方案，所述天线组件包括若干个天线单元，且每个所述天线单元具有相同的外轮廓。
作为本实用新型的一种优选方案，各所述天线单元于所述基板的第二表面上且呈阵列排布、环形排布或无规则间隔排布。
作为本实用新型的一种优选方案，各所述天线单元于所述基板的第二表面上呈六边形蜂窝状排布，且各所述天线单元之间具有间隙。
作为本实用新型的一种优选方案，所述天线单元沿所述基板表面方向的截面形状包括正六边形。
作为本实用新型的一种优选方案，所述天线组件包括至少两层天线组件单元层，每一层所述天线组件单元层至少包括一个所述天线单元。
如上所述，本实用新型的具有天线组件的半导体封装结构，具有以下有益效果：
本实用新型提供的半导体封装结构合理的设计了聚合物层，并与底部填充层等结构配合，增加了金属凸块与重新布线层以及半导体芯片与底部填充层之间的结合强度，还防止水汽等的影响，有效的提高的封装结构的稳定性以及产品的良率；本实用新型的具有天线组件的半导体结构通过将天线组件与重新布线层设置于基板的两个相对的表面，从而可以有利于进行合理的封装布局设计；本实用新型选择石英玻璃等作为基板，其热传导性良好，比封装材料好了近十到百倍，解决了热效应的问题；同时，由于石英片无翘曲问题，也进一步保证在后续工艺中芯片不易翘曲以及断裂等，且容易制造，良率提高；本实用新型的结构简便，成本低，适于批量生产。
附图说明
图1显示为本实用新型的半导体封装结构制备中提供基板的结构示意图。
图2显示为本实用新型的半导体封装结构制备中形成重新布线后的结构示意图。
图3显示为本实用新型的半导体封装结构制备中形成金属凸块的结构示意图。
图4显示为本实用新型的半导体封装结构制备中形成半导体芯片的结构示意图。
图5显示为本实用新型的半导体封装结构制备中形成底部填充层的结构示意图。
图6显示为本实用新型的半导体封装结构制备中形成聚合物层的结构示意图。
图7显示为本实用新型的半导体封装结构制备中形成天线组件的结构示意图。
图8显示为本实用新型的半导体封装结构沿天线组件一面的俯视示意图。
元件标号说明
11 基板
111 第一表面
112 第二表面
21 重新布线层
211 凸块下金属层
212 介质层
213 金属线层
31 金属凸块
41 半导体芯片
51 底部填充层
61 聚合物层
71 天线组件
711 天线单元
具体实施方式
以下由特定的具体实施例说明本实用新型的实施方式，熟悉此技术的人士可由本说明书所揭露的内容轻易地了解本实用新型的其他优点及功效。
请参阅图1至图8。须知，本说明书所附图式所绘示的结构、比例、大小等，均仅用以配合说明书所揭示的内容，以供熟悉此技术的人士了解与阅读，并非用以限定本实用新型可实施的限定条件，故不具技术上的实质意义，任何结构的修饰、比例关系的改变或大小的调整，在不影响本实用新型所能产生的功效及所能达成的目的下，均应仍落在本实用新型所揭示的技术内容得能涵盖的范围内。同时，本说明书中所引用的如“上”、“下”、“左”、“右”、“中间”及“一”等的用语，亦仅为便于叙述的明了，而非用以限定本实用新型可实施的范围，其相对关系的改变或调整，在无实质变更技术内容下，当亦视为本实用新型可实施的范畴。
如图所示1～8所示，本实用新型提供一种具有天线组件的半导体封装结构，包括：
基板11，所述基板11具有相对的第一表面111及第二表面112；
重新布线层21，位于所述基板11的第一表面111上；
金属凸块31，位于所述重新布线层21远离所述基板11的一侧并与所述重新布线层21电连接；
半导体芯片41，位于所述重新布线层21远离所述基板11一侧的表面，并与所述重新布线层21电连接，且所述半导体芯片41与所述金属凸块31之间具有间距；以及
底部填充层51，填充满所述半导体芯片41与所述重新布线层21之间的间隙；
聚合物层61，位于所述重新布线层21远离所述基板11一侧的表面，且包围所述金属凸块31、所述底部填充层51及所述半导体芯片41，并显露部分所述金属凸块31及部分所述半导体芯片41；以及
天线组件71，位于所述基板11的第二表面112上。
作为示例，所述基板11包括石英玻璃基板或蓝宝石基板。
具体的，本实用新型提供一种半导体封装结构，其中，所述基板11优选为石英基板或者蓝宝石基板，一方面，由于石英片无翘曲的问题，从而可以防止后续制备过程中半导体芯片发生破裂、翘曲以及断裂等问题；另一方面，石英的热传导比MC好了近十到百倍，具有良好的热传导性，从而解决了封装过程的热效应问题。另外，在其他示例中，所述基板还可以选择为其他的玻璃基板，在此并不做具体限制。
另外，所述基板11的形状可以根据实际需要进行设定，所述基板11的形状可以为矩形、圆形、六边形、三角形或梯形等等，此处不做限定。
具体的，所述半导体芯片41可以为任意一种半导体功能芯片，且所述半导体芯片41的正面还形成有将其内部功能器件电引出的连接焊盘，所述连接焊盘裸露于所述半导体芯片的正面，优选地，所述连接焊盘的上表面与所述半导体芯片的上表面相平齐。所述半导体芯片41与所述金属凸块31之间具有间距是指，在所述金属布线层远离所述基板一侧的表面，凸出于所述金属布线层的位置，所述半导体芯片与所述金属凸块之间是具有间距的，即裸露的外部是不导通的。
另外，本实用新型将所述天线组件与所述重新布线层、所述金属凸块以及所述半导体芯片等结构设置在所述基板的两个相对的侧面上，从而可以合理的进行天线结构的设计，并且有利于减小整个半导体封装结构的体积。
作为示例，所述半导体封装结构还包括底部填充层51，所述底部填充层51填充满所述半导体芯片41与所述重新布线层21之间的间隙。
具体的，所述底部填充层51填充在所述半导体芯片41与与其相邻的所述重新布线层21之间，并完全覆盖所述半导体芯片41靠近所述重新布线层21一侧的表面，优选地，所述底部填充层51超出所述半导体芯片的表面并延伸至所述半导体芯片两侧的所述金属凸块周围，所述填充层51的材料包括填充胶，所述填充层51可以保护半导体芯片在工艺过程中的粘附力以及稳定性，还可以缓解半导体芯片的边缘以及顶角出的应力集中问题，避免半导体芯片破裂等，从而提高了封装可靠性。
作为示例，所述聚合物层61包括聚酰亚胺层、硅胶层以及环氧树脂层中的任意一种。
具体的，本实用新型提供的半导体封装结构中还包括聚合物层61，其中，所述聚合物层61填充在所述半导体芯片41、所述底部填充层51以及所述金属凸块31之间，其中，所述半导体芯片41底部表面完全与所述底部填充层51相接触，且所述底部填充层51与所述半导体芯片41相接触的一侧表面大于所述半导体芯片的该表面，周围填充着所述聚合物层61，即所述半导体芯片以及所述底部填充层的侧壁覆盖着所述聚合物层，所述聚合物层61环绕所述金属凸块31，可以对金属凸块以及半导体芯片起到保护的作用，可以增加金属凸块与所述重新布线层21之间的结合强度，也同时增加了半导体芯片与底部填充层之间的结合强度，防止其晃动或者掉落，另一方面还可以防止氧化及水汽等对金属凸块及下方的重新布线层等的影响，另外，所述聚合物层还可以缓解所述半导体芯片顶角出的应力。其中，所述聚合物层可以采用压缩成型、传递模塑成型、液封成型、真空层压及旋涂中的一种制作。
作为示例，所述重新布线层21的结构具体包括：
介质层212，接合于所述基板的第一表面111上；
至少一层金属线层213，所述金属线层213位于所述介质层212的内部；
凸块下金属层211，位于所述介质层212远离所述基板11一侧的表面，并延伸至所述介质层212的内部与所述金属线层213电连接，其中，所述金属凸块31设置于所述凸块下金属层211上。
具体的，在一示例中，所述重新布线层21包括一层金属线层213、一层介质层212以及一层凸块下金属层211，在一示例中其制作过程包括：先于所述基板一表面形成一层所述金属线层，再于该表面形成一层介质层，所述介质层将所述金属线层包覆，另外，也可以是先形成一层介质层，再进行刻蚀填充等工艺；然后，再于介质层中形成开口，从而可以制备所述凸块下金属层。当然，所述重新布线层可以为任意本领域常用的重新布线层结构，也可采用其他工艺制备任意可以实现电连接引出功能的重新布线层。
另外，在其他示例中，也可以为两层或更多层的所述介质层以及两层或更多层金属线层，如：于所述基板的表面形成第一层所述绝缘层；于第一层所述绝缘层远离所述基板的表面形成所述金属线层；于第一层所述绝缘层的上表面形成第二层所述绝缘层，第二层所述绝缘层完全覆盖所述金属线层；于第二层所述绝缘层内形成开口，所述开口暴露出所述金属线层；于所述开口内形成所述凸块下金属层。
具体的，所述金属线层213的材料可以为但不仅限于铜、铝、镍、仅、银或钛中的一种材料或两种以上材料的叠层材料层。所述介质层212的材料可以为低k介电材料，具体的，可以包括环氧树脂、硅胶、PI、PBO、BCB、氧化硅、磷硅玻璃及含氟玻璃中的任意一种。
作为示例，所述金属凸块31的具体结构包括：铜柱、位于所述铜柱上表面的镍层以及位于所述镍层上的焊料凸点。
具体的，所述金属凸块31可以为金属柱、焊料球、或者铜柱与焊料金属的组合等。在本实施例中，提供一种金属凸块31，制备包括：于所述重新布线层上制作凸块下金属层；于所述凸块下金属层表面形成铜柱；于所述铜柱表面形成金属阻挡层；于所述金属阻挡层表面形成焊料金属，并采用高温回流工艺于所述金属阻挡层表面形成焊料凸点。
其中，所述金属阻挡层包括镍层，所述焊料凸点的材料包括铅、锡及银中的一种或包含上述任意一种焊料金属的合金。
作为示例，所述天线组件71包括若干个天线单元711，且每个所述天线单元711具有相同的外轮廓。
具体的，所述天线组件71至少包括一个天线单元711，所述天线单元的形状可以为块状或螺旋状，当然，所述天线单元711的数量也可以是多个，如10～100个，依实际需求而定。当所述天线单元的数量大于两个时，不同的天线单元711的形状可以相同也可以不同。另外，所述天线单元711为块状天线时，所述块状天线可以为金属块；所述天线单元711为螺旋状天线时，所述螺旋状天线可以为金属线绕制成螺旋状而形成。优选地，各所述天线单元的外轮廓相同，从而可以实现均匀控制，便于按实际需求进行合理布局。
另外，所述天线单元的材料包括但不限于铜、铝、镍、金、银、锡以及钛中的任意一种，或者两种及以上的上述材料层构成的叠层材料层，可以通过物理气相沉积工艺(PVD)、化学气相沉积工艺(CVD)、溅射、电镀以及化学镀中的任意一种制备得到。
作为示例，各所述天线单元711于所述基板11的第二表面112上且呈阵列排布、环形排布或无规则间隔排布。
作为示例，各所述天线单元711于所述基板11的第二表面112上呈六边形蜂窝状排布，且各所述天线单元711之间具有间隙。
作为示例，所述天线单元711沿所述基板11表面方向的截面形状包括正六边形。
具体的，本示例中给出一种各所述天线单元711的布局方式，如图7所示，各所述天线单元均匀排布，且呈六边形蜂窝状排布，各所述天线单元711之间具有间隙，这种设计方式工艺简单，相同外轮廓的所述天线单元无需进行其他额外工艺，适于批量生产，且天线讯号均匀，损耗较小。另外，相邻所述天线单元之间的间隙以实际情况设定，如在所述基板的表面所在的平面内，沿纵向或与其相垂直的横向上，相邻天线单元的中心之间的距离可以随意设置，各天线单元的尺寸也可任意选择。
当然，各所述天线单元的排列方式可以以及需求任意设置，可以在需要的位置设置密度较大的天线单元，可以不规则排布，在此不做具体限制。
作为示例，所述天线组件71包括至少两层天线组件单元层，每一层所述天线组件单元层至少包括一个所述天线单元711。
具体的，所述天线组件71可以是有若干个天线单元711在所述基板11的第二表面112单层排布形成的，当然，也可以是多层排布，其包括两层或两层以上的天线单元层，然后，每一个所述天线单元层上再进行合理数量和形状的天线单元的设计，其中，相邻两层所述天线单元层之间经由介质层隔开，并由形成于介质层内的导电栓塞实现不同层之间的电连接，从而可以进行以及具体的需求进行灵活的天线布局设计。
综上所述，本实用新型提供一种具有天线组件的半导体封装结构，包括：基板，所述基板具有相对的第一表面及第二表面；重新布线层，位于所述基板的第一表面上；金属凸块，位于所述重新布线层远离所述基板的一侧并与所述重新布线层电连接；半导体芯片，位于所述重新布线层远离所述基板一侧的表面，并与所述重新布线层电连接，且所述半导体芯片与所述金属凸块之间具有间距；底部填充层，填充满所述半导体芯片与所述重新布线层之间的间隙；聚合物层，位于所述重新布线层远离所述基板一侧的表面，且包围所述金属凸块、所述底部填充层及所述半导体芯片，并显露部分所述金属凸块及部分所述半导体芯片；以及天线组件，位于所述基板的第二表面上，通过上述方案，本实用新型提供的半导体封装结构合理的设计了聚合物层，并与底部填充层等结构配合，增加了金属凸块与重新布线层以及半导体芯片与底部填充层之间的结合强度，还防止水汽等的影响，有效的提高的封装结构的稳定性以及产品的良率；本实用新型的具有天线组件的半导体结构通过将天线组件与重新布线层设置于基板的两个相对的表面，从而可以有利于进行合理的封装布局设计；本实用新型选择石英玻璃等作为基板，其热传导性良好，比封装材料好了近十到百倍，解决了热效应的问题；同时，由于石英片无翘曲问题，也进一步保证在后续工艺中芯片不易翘曲以及断裂等，且容易制造，良率提高；本实用新型的结构简便，成本低，适于批量生产。所以，本实用新型有效克服了现有技术中的种种缺点而具高度产业利用价值。
上述实施例仅例示性说明本实用新型的原理及其功效，而非用于限制本实用新型。任何熟悉此技术的人士皆可在不违背本实用新型的精神及范畴下，对上述实施例进行修饰或改变。因此，举凡所属技术领域中具有通常知识者在未脱离本实用新型所揭示的精神与技术思想下所完成的一切等效修饰或改变，仍应由本实用新型的权利要求所涵盖。

Claims (10)

1.一种具有天线组件的半导体封装结构，其特征在于，包括：
基板，所述基板具有相对的第一表面及第二表面；
重新布线层，位于所述基板的第一表面上；
金属凸块，位于所述重新布线层远离所述基板的一侧并与所述重新布线层电连接；
半导体芯片，位于所述重新布线层远离所述基板一侧的表面，并与所述重新布线层电连接，且所述半导体芯片与所述金属凸块之间具有间距；
底部填充层，填充满所述半导体芯片与所述重新布线层之间的间隙；
聚合物层，位于所述重新布线层远离所述基板一侧的表面，且包围所述金属凸块、所述底部填充层及所述半导体芯片，并显露部分所述金属凸块及部分所述半导体芯片；以及
天线组件，位于所述基板的第二表面上。
2.根据权利要求1所述的具有天线组件的半导体封装结构，其特征在于，所述聚合物层包括聚酰亚胺层、硅胶层以及环氧树脂层中的任意一种。
3.根据权利要求1所述的具有天线组件的半导体封装结构，其特征在于，所述基板包括石英玻璃基板或蓝宝石基板。
4.根据权利要求1所述的具有天线组件的半导体封装结构，其特征在于，所述重新布线层的结构具体包括：
介质层，接合于所述基板的第一表面上；
至少一层金属线层，所述金属线层位于所述介质层的内部；
凸块下金属层，位于所述介质层远离所述基板一侧的表面，并延伸至所述介质层的内部与所述金属线层电连接，其中，所述金属凸块设置于所述凸块下金属层上。
5.根据权利要求1所述的具有天线组件的半导体封装结构，其特征在于，所述金属凸块的具体结构包括：铜柱、位于所述铜柱上表面的镍层以及位于所述镍层上的焊料凸点。
6.根据权利要求1～5中任意一项所述的具有天线组件的半导体封装结构，其特征在于，所述天线组件包括若干个天线单元，且每个所述天线单元具有相同的外轮廓。
7.根据权利要求6所述的具有天线组件的半导体封装结构，其特征在于，各所述天线单元于所述基板的第二表面上且呈阵列排布、环形排布或无规则间隔排布。
8.根据权利要求6所述的具有天线组件的半导体封装结构，其特征在于，各所述天线单元于所述基板的第二表面上呈六边形蜂窝状排布，且各所述天线单元之间具有间隙。
9.根据权利要求8所述的具有天线组件的半导体封装结构，其特征在于，所述天线单元沿所述基板表面方向的截面形状包括正六边形。
10.根据权利要求6所述的具有天线组件的半导体封装结构，其特征在于，所述天线组件包括至少两层天线组件单元层，每一层所述天线组件单元层至少包括一个所述天线单元。
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