CN206878035U - A kind of LED wafer structure - Google Patents
A kind of LED wafer structure Download PDFInfo
- Publication number
- CN206878035U CN206878035U CN201720602054.4U CN201720602054U CN206878035U CN 206878035 U CN206878035 U CN 206878035U CN 201720602054 U CN201720602054 U CN 201720602054U CN 206878035 U CN206878035 U CN 206878035U
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- Prior art keywords
- poles
- metal layer
- pin
- conductive metal
- crystalline substrate
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Abstract
The utility model provides a kind of LED wafer structure, belong to LED field, including the P poles conductive metal layer by stacking gradually, P poles crystalline substrate, the body that N poles crystalline substrate and N poles conductive metal layer are formed, N poles conductive metal layer is connected with N poles pin, at least one P poles pin is connected with below the conductive metal layer of the P poles, it is provided with the body and runs through N poles crystalline substrate, the passage of P poles crystalline substrate and P poles conductive metal layer, vias inner walls are additionally provided with insulating barrier, conductive pole is provided with passage, the both ends of conductive pole be connected to N poles conductive metal layer and with N poles pin.Compared with prior art, the LED wafer structure is provided with passage in the body, the wire column being connected with N poles metal level and N poles pin is provided with passage, P poles conductive metal layer is directly connected to P poles pin, it thus is avoided that and is connected N poles metal level and P poles metal level with N poles pin and P poles pin respectively using gold thread, manufacturing process is reduced, reduces manufacturing cost.
Description
Technical field
LED field is the utility model is related to, particularly a kind of LED wafer structure.
Background technology
Existing LED wafer structure generally comprises the P poles conductive metal layer 01 stacked gradually, P poles crystalline substrate 02, N poles
Crystalline substrate 03 and N poles conductive metal layer 04, P poles conductive metal layer 01 have been directly connected to P poles pin 05, N poles conductive metal layer
04 is connected with N poles pin 06 by gold thread 07, needs to be connected by pad 08 between gold thread 07 and N poles conductive metal layer 04
Connect, it is especially small yet with chip architecture, set pad 08 very troublesome on N poles conductive metal layer 04, cause whole LED brilliant
Piece manufacturing process is cumbersome, and gold thread is superfine, and manufacture is difficult, causes manufacturing cost to increase.
Utility model content
In view of the above-mentioned problems, the utility model provides a kind of LED wafer structure, without using gold thread by N poles metal level
It is connected respectively with N poles pin and P poles pin with P poles metal level, solves the problems, such as gold thread welding difficulty in existing LED wafer, subtract
Few manufacturing process, reduces manufacturing cost.
The technical solution adopted in the utility model is:
A kind of LED wafer structure, including P poles conductive metal layer, P poles crystalline substrate, N poles crystalline substrate by stacking gradually
The body formed with N poles conductive metal layer, N poles conductive metal layer are connected with N poles pin, connected below the conductive metal layer of the P poles
At least one P poles pin is connected to, is provided with the body and runs through N poles crystalline substrate, P poles crystalline substrate and P poles conductive metal layer
Passage, vias inner walls are additionally provided with insulating barrier, are provided with conductive pole in passage, the both ends of conductive pole are connected to N poles conductive gold
Belong to layer and with N poles pin.
Preferably, insulating barrier is extended to outside passage and between N poles pin and P poles conductive metal layer.
Preferably, N poles pin is concordant with the bottom surface holding of P poles pin.
Compared with prior art, the beneficial effects of the utility model are:The utility model provides a kind of LED wafer knot
Structure, in the body provided with passage, passage is interior to be provided with the wire column being connected with N poles metal level and N poles pin, P poles conductive metal layer
Be directly connected to P poles pin, thus be avoided that using gold thread by N poles metal level and P poles metal level respectively with N poles pin and P poles pin
Connection, solve the problems, such as gold thread welding difficulty in existing LED wafer, reduce manufacturing process, reduce manufacturing cost.
Brief description of the drawings
Fig. 1 is the sectional view of LED wafer structure of the prior art;
Fig. 2 is a kind of sectional view of LED wafer structure provided by the utility model.
Embodiment
Preferred embodiment provided by the utility model is illustrated with reference to the accompanying drawings.
Fig. 2, it is a kind of preferred embodiment of LED wafer structure provided by the utility model.As shown in Fig. 2 the LED is brilliant
Chip architecture includes extremely conductive by the P poles conductive metal layer 101, P poles crystalline substrate 102, N poles crystalline substrate 103 and the N that stack gradually
The body 10 that metal level 104 is formed, N poles conductive metal layer 104 are connected with N poles pin 20, and P poles conductive metal layer 101 connects
It is connected at least one P poles pin 30.It is worth noting that, P poles conductive metal layer 101, P poles crystalline substrate 102, N poles crystallization base
Plate 103 and N poles conductive metal layer 104 are stacked according to supreme order under successively.
It is provided with the body 10 through N poles crystalline substrate 103, P poles crystalline substrate 102 and P poles conductive metal layer 101
Passage 11, the inwall of passage 11 are additionally provided with insulating barrier 12, are provided with conductive pole 13 in passage 11, the both ends of conductive pole 13 are connected to
N poles conductive metal layer 104 and with N poles pin 30, avoid using gold thread by N poles metal level 103 and P poles metal level 101 respectively with N
Pole pin 20 and P poles pin 30 connect, and solve the problems, such as gold thread welding difficulty in existing LED wafer, reduce manufacturing process, reduce
Manufacturing cost.As a kind of preferred embodiment, the bottom margin position of P poles conductive metal layer 101 is connected with two P poles pins
30, N pole pins 20 so increase electric conductivity below P poles conductive metal layer 101, and between two P poles pins 30.
Insulating barrier 12 is extended to outside passage and between N poles pin 20 and P poles conductive metal layer 101, so prevents P poles
Occurs short circuit between pin 30 and N poles pin 20.Meanwhile N poles pin 20 is concordant with the bottom surface holding of P poles pin 30, so just
In be pasted onto in LED.
In summary, the technical solution of the utility model can realize above-mentioned purpose of utility model, and this with sufficiently effective
The structure and the principle of work and power of utility model have all sufficiently been verified in embodiment, can reach the effect of expected and mesh
, on the premise of without departing substantially from principle of the present utility model and essence, numerous variations can be made to the embodiment of utility model
Or modification.Therefore, the utility model include all be previously mentioned in patent claim in the range of all replacement contents, it is any
The equivalence changes made in present utility model application the scope of the claims, all within the scope of the claims of category this case application.
Claims (3)
1. a kind of LED wafer structure, including the P poles conductive metal layer by stacking gradually, P poles crystalline substrate, N poles crystalline substrate and
The body that N poles conductive metal layer is formed, N poles conductive metal layer are connected with N poles pin, connected below the conductive metal layer of the P poles
There is at least one P poles pin, it is characterised in that be provided with the body and led through N poles crystalline substrate, P poles crystalline substrate and P poles
The passage of metal layer, vias inner walls are additionally provided with insulating barrier, are provided with conductive pole in passage, the both ends of conductive pole are connected to N
Pole conductive metal layer and with N poles pin.
2. LED wafer structure according to claim 1, it is characterised in that:Insulating barrier is extended to outside passage and drawn in N poles
Between pin and P poles conductive metal layer.
3. LED wafer structure according to claim 1, it is characterised in that:The bottom surface of N poles pin and P poles pin keeps flat
Together.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201720602054.4U CN206878035U (en) | 2017-05-26 | 2017-05-26 | A kind of LED wafer structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201720602054.4U CN206878035U (en) | 2017-05-26 | 2017-05-26 | A kind of LED wafer structure |
Publications (1)
Publication Number | Publication Date |
---|---|
CN206878035U true CN206878035U (en) | 2018-01-12 |
Family
ID=61337342
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201720602054.4U Expired - Fee Related CN206878035U (en) | 2017-05-26 | 2017-05-26 | A kind of LED wafer structure |
Country Status (1)
Country | Link |
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CN (1) | CN206878035U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106972095A (en) * | 2017-05-26 | 2017-07-21 | 厦门市东太耀光电子有限公司 | A kind of LED wafer structure |
-
2017
- 2017-05-26 CN CN201720602054.4U patent/CN206878035U/en not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106972095A (en) * | 2017-05-26 | 2017-07-21 | 厦门市东太耀光电子有限公司 | A kind of LED wafer structure |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20180112 Termination date: 20210526 |
|
CF01 | Termination of patent right due to non-payment of annual fee |