CN206259914U - A kind of matrix power amplifier based on transistor stack structure - Google Patents
A kind of matrix power amplifier based on transistor stack structure Download PDFInfo
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- CN206259914U CN206259914U CN201621163741.2U CN201621163741U CN206259914U CN 206259914 U CN206259914 U CN 206259914U CN 201621163741 U CN201621163741 U CN 201621163741U CN 206259914 U CN206259914 U CN 206259914U
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Abstract
The utility model discloses a kind of matrix power amplifier based on transistor stack structure, including the input matching network, power distributing network, stacking matrix amplification network, power synthesis network and the output matching network that are sequentially connected, and the first biasing circuit and the second biasing circuit being symmetrically connected with the stacking matrix amplification network respectively.The power amplifier chip circuit that the utility model is realized, with wide, power output it is high, power gain is high, area is small.
Description
Technical field
The utility model is related to field-effect transistor radio-frequency power amplifier and integrated circuit fields, especially for ultra-wide
A kind of matrix power amplifier based on transistor stack structure of the transmitter module application with transceiver end.
Background technology
With the fast development of the wireless communications markets such as ultra-wideband communications, software radio, WLAN (WLAN), penetrate
Frequency front-end transceiver is also required that and developed to highly integrated, low-power consumption, compact conformation, cheap direction therewith.
Radio frequency and microwave power amplifier as emitter important module, be most electricity that consume energy in whole emitter
Road, its demanded power output is higher, realizes radio frequency with microwave power amplifier chip electricity when being designed using integrated circuit technology
Lu Shi, its performance and cost receive certain restriction, are mainly reflected in following several respects：
(1) high-power high-efficiency amplifying power is limited：As the development of semiconductor technology and transistor size equal proportion contract
Small trend, the grid of transistor are long shorter and shorter, the reduction of breakdown voltage and the rising of knee-point voltage result in, so as to limit
Transistor drain output voltage swing, and then limit the power capacity of one-transistor.At present, typical solution be by
Multiple transistors (8 to 32) are arranged in parallel to carry out power combing, to improve power margin, but, this solution but because
This increased gate-source capacitance, reduce input impedance, increase the design difficulty of the impedance matching of input circuit, meanwhile, use
The optimal output load impedance of the crystal amplifier of this structure is very small, it is necessary to be entered by extra output impedance matching networks
The designing impedance matching of line output circuit, therefore, the designing impedance matching difficulty of output circuit is also increased, meanwhile, using many
Individual transistor composite structure arranged in parallel will take very big chip area, so as to considerably increase chip production cost.
(2) ultra-wideband high power amplifying power is limited：In the design process of radio-frequency power amplifier, by transistor gain
The influence of bandwidth product, designer will always be compromised between power amplifier bandwidth and power gain the two indexs.Meanwhile, integrated electricity
Multiple transistors (8 to the 32) structure for carrying out power combing arranged in parallel used in road, realized in frequency band very wide 8 to
32 power combings of the filter with low insertion loss of amplification branch road, and the optimum load impedance of each branch Broadband Matching, its design is difficult
Degree is very big.
At present, the circuit structure of common ultra-wideband high power amplifier has a lot, such as multichannel combining amplifier, and balance is put
Big device and distributed amplifier etc., want while the requirement for meeting parameters is very difficult, generally, its impedance matching
Realization is, to reduce the linearity, or to increase power consumption or chip area etc. for cost to obtain.
It can thus be seen that the ultra-wide band radio-frequency Designing power amplifier difficult point based on integrated circuit technology is：(1) ultra-wide
Under band high-power output difficulty is larger；(2) the high power gain difficulty under the conditions of ultra wide band is larger；(3) tradition under ultra wide band
The chip area of method is larger.
Utility model content
Technical problem to be solved in the utility model is to provide a kind of Matrix Power based on transistor stack technology and puts
Big device, with high-power output ability, high power gain, good input and output matching properties, chip area be small and low cost
The advantages of.
The technical scheme that the utility model solves above-mentioned technical problem is as follows：A kind of matrix based on transistor stack structure
Power amplifier, including input matching network, power distributing network, stacking matrix amplification network, the power combing being sequentially connected
Network and output matching network, and the first biasing circuit and second being symmetrically connected with the stacking matrix amplification network respectively
Biasing circuit.
The beneficial effects of the utility model are：Network is amplified using transistor stack matrix, the area of chip is saved, together
When realize good broadband power fan-out capability and power gain ability, it is to avoid the low breakdown voltage of integrated circuit technology is special
Property, improve the Stability and dependability of circuit.
On the basis of above-mentioned technical proposal, the utility model can also do following improvement.
Further, the stacking matrix amplifies network includes at least parallel stacked structure of two-way, and the stacked structure is extremely
It is few to be made up of according to the connected stacking of source drain two transistors；
The grid of the transistor of the bottom per road stacked structure is each individually connected to institute after connecting two parallel resistances
State the grid bypass electric capacity of the first biasing circuit and the grid bypass electric capacity of second biasing circuit, the bottom transistor
Source ground, and the grid of the bottom transistor is connected to the input pair net by the power distributing network
Network；
It is inclined that the grid of the transistor of the remainder layer per road stacked structure is each individually connected to described first by resistance
The grid divider resistance of circuits and the grid divider resistance of the second biasing circuit, and the transistor of the remainder layer grid point
Not Lian Jie two route grids compensation resistance be connected with grid compensating electric capacity be grounded constitute compensation circuit；
The drain electrode of the transistor of the superiors per road stacked structure is connected respectively to by the power synthesis network
The output matching network feeds inductance with the drain electrode of first biasing circuit and second biasing circuit.
It is to ensure that power amplifier obtains the power output of maximum, Ke Yi great using the beneficial effect of above-mentioned further scheme
The big area for saving chip.
Further, it is described to pass through gate isolation resistance string per compensation circuit of the road stacked structure on adjacent gate node
Connect.
Beneficial effect using above-mentioned further scheme is：Make matrix power amplifier stabilizing effect more preferable.
Further, the stacking matrix amplifies the bias voltage of the transistor stacked in every layer of network not decile, most bottom
The bias voltage of layer transistor is minimum, the bias voltage highest of the superiors' transistor, and the bias voltage of remaining transistor is between two
Between person.
Further, first biasing circuit and second biasing circuit are by grid bypass electric capacity, grid partial pressure electricity
Resistance, drain electrode feed inductance and drain electrode shunt capacitance are constituted.
Beneficial effect using above-mentioned further scheme is：For realize the power amplifier grid and drain electrode feed and
The bypass functionality of spurious signal.
Further, the stacking matrix amplifies network includes the parallel stacked structure in four tunnels, and the stacked structure is by three
Transistor is connected to stack according to source drain and constitutes.
Further, low pressure bias supply is connected respectively to the grid of first biasing circuit and second biasing circuit
In shunt capacitance；HVB high voltage bias power supply is connected respectively to the drain electrode feed of first biasing circuit and second biasing circuit
On inductance and drain electrode shunt capacitance.
Further, the input matching network is with output matching network is by capacitance, matching capacitance and matches inductance
Constitute.
Beneficial effect using above-mentioned further scheme is：Input impedance for realizing the matrix power amplifier
Matching and blocking function and output impedance matching and blocking function.
Further, the power distributing network is constituted with power synthesis network by six sections of microstrip line constructions.
Beneficial effect using above-mentioned further scheme is：Distribution function for realizing input signal respectively is believed with output
Number complex functionality.
Further, it is active amplification network, the input matching network, power distributing network that the stacking matrix amplifies network
Network, power synthesis network and output matching network are passive network.
Brief description of the drawings
Fig. 1 is the utility model matrix power amplifier theory diagram；
Fig. 2 is the utility model matrix power amplifier circuit diagram.
Specific embodiment
Principle of the present utility model and feature are described below in conjunction with accompanying drawing, example is served only for explaining this practicality
It is new, it is not intended to limit scope of the present utility model.
As shown in Figure 1 and Figure 2, a kind of matrix power amplifier based on transistor stack structure that the utility model is provided,
It is a kind of ultra-wide band radio-frequency power amplifier of use transistor stack matrix amplification network structure, is entered using integrated circuit technology
Row design, including input matching network, power distributing network, stacking matrix amplification network, the power synthesis network being sequentially connected
And output matching network, and amplify symmetrical the first biasing circuit being connected of network and the second biased electrical with stacking matrix respectively
Road, wherein, it is active amplification network, input matching network, power distributing network, power combing net that stacking matrix amplifies network
Network, output matching network, the first biasing circuit and the second biasing circuit are passive network.
Wherein, stacking matrix amplifies network includes at least parallel stacked structure of two-way, and stacked structure is at least by two crystalline substances
Body pipe is connected to stack according to source drain and constitutes；The grid of the transistor per the bottom of road stacked structure connects two parallel resistances
The grid bypass electric capacity of the first biasing circuit and the grid bypass electric capacity of the second biasing circuit are each individually connected to afterwards, and the bottom is brilliant
The source ground of body pipe, and the grid of bottom transistor is connected to input matching network by power distributing network；
The first biasing circuit is each individually connected to by resistance per the grid of the transistor of the remainder layer of road stacked structure
The grid divider resistance of grid divider resistance and the second biasing circuit, and the grid of the transistor of remainder layer connects two routes respectively
Grid compensation resistance is connected the compensation circuit of ground connection composition with grid compensating electric capacity, and compensation circuit passes through gate isolation resistance string
Connect；
The drain electrode of the transistor per the superiors of road stacked structure is connected respectively to described by the power synthesis network
Output matching network feeds inductance with the drain electrode of first biasing circuit and second biasing circuit.
Input matching network and output matching network are by capacitance, matching capacitance and match inductance and constitute, for reality
The input impedance of the existing matrix power amplifier is matched and blocking function with output impedance.
Power distributing network is constituted with power synthesis network by six sections of microstrip line constructions, for realizing input signal respectively
With the distribution function and complex functionality of output signal.
First biasing circuit and the second biasing circuit are by grid bypass electric capacity, three grid divider resistances, drain electrode feeds
Inductance and drain electrode shunt capacitance are constituted, the bypass work(for realizing the power amplifier grid and drain electrode feed and spurious signal
Energy.
Low pressure bias supply is connected respectively on the grid bypass electric capacity of the first biasing circuit and the second biasing circuit；It is high
Pressure bias supply is connected respectively to the drain electrode feed inductance and drain electrode bypass electricity of the first biasing circuit and second biasing circuit
Rong Shang, stacking matrix amplifies the bias voltage of the transistor stacked in every layer of network not decile, most goes up the inclined of bottom transistor
Put that voltage is minimum, most descend the bias voltage highest of upper strata transistor, the bias voltage of remaining transistor falls between.
To ensure that power amplifier obtains the power output of maximum, it is necessary to the bigger voltage output amplitude of oscillation, so the matrix
Power amplifier core amplifies network for stacking matrix, by the way of 4 tunnels of 3 transistor stacks are amplified parallel, forms 3 × 4
Transistor stack matrix amplify network, DC feedback is carried out by multilevel resistance partial pressure type structure.With dividing using transformer
Cloth ultra wide band power amplifier structure is compared, and 3 × 4 transistor stack matrix amplifies network can greatly save the area of chip.
Wherein, in stacking matrix amplifies network, the method for solving of its key circuit parameters is as follows：
(1) the grid compensating electric capacity C of stacked structure9~C16=Cgg：
(2) the grid compensating electric capacity C of stacked structure17~C24=Cggg：
In above-mentioned formula, ZoptIt is transistor optimum load true impedance, unit is Ω；CgsIt is transistor gate-source capacitance,
CgdFor transistor gate-drain parasitic capacitances are Miller capacitance, unit is pF；gmIt is transistor transconductance, unit is mS.
(3) the grid compensation resistance R of stacked structure13、R14、R16、R17、R19、R20、R22、R23Value is 3~5 Ω；
(4) the grid compensation resistance R of stacked structure28、R29、R31、R32、R34、R35、R37、R38Value is 5~10 Ω；
The gate isolation resistance R of (5) the 4 parallel structure for amplifying in tunnel15、R18、R21、R30、R33、R36Value is 50~100 Ω；
Based on above-mentioned formula, and by structure adjusting transistor M1~M12Size, biasing and feedback resistance R1~
R42Resistance value size, compensation and matching capacitance C1~C24Size, biasing and matching inductance L1~L4Size, power combing
With distribution network TL1~TL12Size, can make whole amplifier circuit of the present utility model realized in ultra wide band input and
Good impedance matching, high power gain, the good power gain flatness of output, and whole power amplifier area very little, into
This is low.
The course of work of the present utility model is：Radio-frequency input signals enters circuit by input IN, by being input into blocking
Coupled capacitor C1, into matching capacitance C2With matching inductance L1The input matching network of the L minor matters of composition, subsequently into microstrip line
TL1~TL6The power distributing network of composition, subsequently into the bottom crystal of 3 parallel transistor stack power amplifiers of 4 tunnels
Pipe M1~M4Grid, then from M1~M4Drain electrode parallel output, then and be advanced into the second level of 3 transistor stack amplifiers
Transistor M5~M8Source electrode, then from M5~M8Drain electrode parallel output, then and be advanced into the of 3 transistor stack amplifiers
Three-level transistor M9~M12Source electrode, then from M9~M12Drain electrode parallel output, into microstrip line TL7~TL12The work(of composition
Rate synthesizes network, subsequently into matching inductance L2With matching capacitance C3The output matching network of the L minor matters of composition, into output every
Straight coupled capacitor C4, output end is reached finally by output end OUT, complete power amplification.
In the whole matrix power amplifier circuit based on transistor stack technology, the size of transistor and other direct currents
Feed resistance, the size of compensating electric capacity be after the indices such as gain, bandwidth and power output for considering whole circuit certainly
Fixed, by the layout design and rational deployment in later stage, required indices can be better achieved, realize in ultra wide band
Under the conditions of high-power output ability, high power gain, good input and output matching properties, chip area be small and low cost.
Preferred embodiment of the present utility model is the foregoing is only, is not used to limit the utility model, it is all in this practicality
Within new spirit and principle, any modification, equivalent substitution and improvements made etc. should be included in guarantor of the present utility model
Within the scope of shield.
Claims (10)
1. a kind of matrix power amplifier based on transistor stack structure, it is characterised in that including the input being sequentially connected
Distribution network, power distributing network, stacking matrix amplify network, power synthesis network and output matching network, and respectively with institute
State stacking matrix and amplify the first biasing circuit and the second biasing circuit that network is symmetrically connected.
2. the matrix power amplifier based on transistor stack structure according to claim 1, it is characterised in that the heap
Folded matrix amplifies network includes at least parallel stacked structure of two-way, and the stacked structure is at least by two transistors according to source electrode
Drain electrode is connected to stack and constitutes；
The grid of the transistor of the bottom per road stacked structure is connected and be each individually connected to after two parallel resistances described the
The grid bypass electric capacity of the grid bypass electric capacity of one biasing circuit and second biasing circuit, the source of the bottom transistor
Pole is grounded, and the grid of the bottom transistor is connected to the input matching network by the power distributing network；
The grid of the transistor of the remainder layer per road stacked structure is each individually connected to first biased electrical by resistance
The grid divider resistance on road and the grid divider resistance of the second biasing circuit, and the grid of the transistor of the remainder layer connects respectively
Connect the compensation circuit that two route grids compensation resistance is connected ground connection composition with grid compensating electric capacity；
The drain electrode of the transistor of the superiors per road stacked structure is connected respectively to described by the power synthesis network
Output matching network feeds inductance with the drain electrode of first biasing circuit and second biasing circuit.
3. the matrix power amplifier based on transistor stack structure according to claim 2, it is characterised in that described every
Compensation circuit of the road stacked structure on adjacent gate node is concatenated by gate isolation resistance.
4. the matrix power amplifier based on transistor stack structure according to claim 2, it is characterised in that the heap
Folded matrix amplifies the bias voltage of the transistor stacked in every layer of network not decile, and the bias voltage of bottom transistor is most
Low, the bias voltage highest of the superiors' transistor, the bias voltage of remaining transistor falls between.
5. the matrix power amplifier based on transistor stack structure according to claim 2, it is characterised in that described
One biasing circuit and second biasing circuit are by grid bypass electric capacity, grid divider resistance, drain electrode feed inductance and drain electrode
Shunt capacitance is constituted.
6. the matrix power amplifier based on transistor stack structure according to claim 2, it is characterised in that the heap
Folded matrix amplifies network includes the parallel stacked structure in four tunnels, and the stacked structure is connected by three transistors according to source drain
Stacking is constituted.
7. the matrix power amplifier based on transistor stack structure according to claim 5, it is characterised in that low pressure is inclined
Power supply is put to be connected respectively on the grid bypass electric capacity of first biasing circuit and second biasing circuit；HVB high voltage bias electricity
Source is connected respectively on the drain electrode feed inductance and drain electrode shunt capacitance of first biasing circuit and second biasing circuit.
8. the matrix power amplifier based on transistor stack structure according to claim 1, it is characterised in that described defeated
Enter matching network and output matching network by capacitance, matching capacitance and match inductance and constitute.
9. the matrix power amplifier based on transistor stack structure according to claim 1, it is characterised in that the work(
Rate is distributed network and is constituted by six sections of microstrip line constructions with power synthesis network.
10. the matrix power amplifier based on transistor stack structure according to any one of claim 1 to 9, its feature
It is that it is active amplification network that the stacking matrix amplifies network, and the input matching network, power distributing network, power are closed
Passive network is into network and output matching network.
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| CN201621163741.2U CN206259914U (en) | 2016-10-24 | 2016-10-24 | A kind of matrix power amplifier based on transistor stack structure |
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106487342A (en) * | 2016-10-24 | 2017-03-08 | 成都嘉纳海威科技有限责任公司 | A kind of matrix power amplifier based on transistor stack structure |
| CN107733381A (en) * | 2017-09-30 | 2018-02-23 | 成都嘉纳海威科技有限责任公司 | A kind of High-efficiency high-gain Doherty stacks power amplifier |
| CN107994875A (en) * | 2017-12-11 | 2018-05-04 | 成都嘉纳海威科技有限责任公司 | Ultra wide band based on compound reactance LC filter networks stacks power amplifier |
| CN108768323A (en) * | 2018-08-14 | 2018-11-06 | 成都嘉纳海威科技有限责任公司 | A kind of high-power high-efficiency high-gain stacks power amplifier against F classes |
-
2016
- 2016-10-24 CN CN201621163741.2U patent/CN206259914U/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106487342A (en) * | 2016-10-24 | 2017-03-08 | 成都嘉纳海威科技有限责任公司 | A kind of matrix power amplifier based on transistor stack structure |
| CN107733381A (en) * | 2017-09-30 | 2018-02-23 | 成都嘉纳海威科技有限责任公司 | A kind of High-efficiency high-gain Doherty stacks power amplifier |
| CN107733381B (en) * | 2017-09-30 | 2023-10-27 | 成都嘉纳海威科技有限责任公司 | High-efficiency high-gain Doherty stacked power amplifier |
| CN107994875A (en) * | 2017-12-11 | 2018-05-04 | 成都嘉纳海威科技有限责任公司 | Ultra wide band based on compound reactance LC filter networks stacks power amplifier |
| CN107994875B (en) * | 2017-12-11 | 2023-12-26 | 成都嘉纳海威科技有限责任公司 | Ultra-wideband stacked power amplifier based on composite reactance type LC filter network |
| CN108768323A (en) * | 2018-08-14 | 2018-11-06 | 成都嘉纳海威科技有限责任公司 | A kind of high-power high-efficiency high-gain stacks power amplifier against F classes |
| CN108768323B (en) * | 2018-08-14 | 2023-09-01 | 成都嘉纳海威科技有限责任公司 | High-power high-efficiency high-gain reverse F-class stacked power amplifier |
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