CN206022330U - Semiconductor product processes carrier - Google Patents
Semiconductor product processes carrier Download PDFInfo
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- CN206022330U CN206022330U CN201620859252.4U CN201620859252U CN206022330U CN 206022330 U CN206022330 U CN 206022330U CN 201620859252 U CN201620859252 U CN 201620859252U CN 206022330 U CN206022330 U CN 206022330U
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- semiconductor product
- support plate
- cover plate
- processes carrier
- magnet
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Abstract
The utility model is to process carrier with regard to semiconductor product.According to an embodiment of the present utility model, semiconductor Product processing carrier includes support plate, cover plate and some magnet for being embedded in the support plate.The support plate has the upper surface lower surface relative with upper surface, and some vacuum holes through the upper surface to the lower surface.Upper shed of some vacuum holes in the upper surface is less than its under shed in the lower surface, and the upper shed is configured to the size less than semiconductor product article unit to be processed.There is cover plate window region and the positioning area around the window region, the window region to be configured to expose the semiconductor product article unit to be processed.Magnet is configured so that semiconductor product band closed type to be pressed on the cover plate upper surface of the support plate.The utility model is substantially improved can semiconductor product yield, significantly improve production efficiency, while the demand of semiconductor product increasingly thinning can be met.
Description
Technical field
The utility model is related to technical field of semiconductors, and the more particularly to semiconductor product in technical field of semiconductors adds
Work carrier.
Background technology
With the small of semiconductor product, the base plate for packaging or lead frame used by encapsulation is also increasingly thinning.This
Mean that base plate for packaging or the risk of lead frame warpage increase, and this warpage will certainly increase the difficulty of semiconductor packing process
Degree.
By taking base plate for packaging as an example, the ultra-thin packed substrate of current below 0.20mm usually pastes die bonding in chip)
Or wire bonding wire bonding) during cause folding material because of base plate for packaging warpage, the problems such as board vacuum suction is bad,
And then there is the phenomenons such as chip flies out, solder skip, solder joint do not glue, affect operation and the qualification rate of semiconductor product.
Thus, to need badly in the industry and effective technical scheme is proposed for ultra-thin base plate for packaging or leadframe package, solve
Easy warpage in its application process and caused series of problems.
Utility model content
One of the purpose of this utility model is to provide a kind of semiconductor product processing carrier, and which can not change encapsulation base
In the case of plate/lead frame design and plastic package die, effectively solving ultra-thin packed substrate/lead frame is in encapsulation procedure
Warpage issues.
According to an embodiment of the present utility model, semiconductor Product processing carrier includes support plate, cover plate and some embedded
Magnet in the support plate.The support plate has the upper surface lower surface relative with upper surface, and through the upper surface to the lower surface
Some vacuum holes.Wherein some vacuum holes the upper surface upper shed less than some vacuum holes under the lower surface
Opening, and the upper shed is configured to the size less than semiconductor product article unit to be processed.Cover plate has window region and surrounds
The positioning area of the window region, the window region are configured to expose the semiconductor product article unit to be processed.Magnet be configured so that
Semiconductor product band closed type is pressed on the cover plate upper surface of the support plate, and the semiconductor product band is to be processed comprising this
Semiconductor product article unit.
In another embodiment of the present utility model, the support plate is aluminium, and the magnet is samarium cobalt magnet.On the support plate further
Alignment pin is provided with, the standard through-hole that the alignment pin is taken with the semiconductor product bar is corresponding, and the cover plate is provided with and the alignment pin
Corresponding location hole.Some up/down material through hole can be also provided with the support plate and the cover plate.In an embodiment of the present utility model
In, design of the support plate in thick middle thin edge.Two width sides of the support plate are provided with and are configured to load manually or dismantle
The breach of the semiconductor product band.Blue steel piece of the cover plate for blackening process, and the cover plate is provided with and anti-puts back mark.On this
A diameter of 0.2mm+/- 0.05mm, a diameter of 1.0mm+/- 0.05mm of the under shed of opening.
What the utility model embodiment was provided can be used for ultra thin substrate or the carrier of lead frame can make semiconductor product good
Rate is substantially improved, and significantly improves production efficiency, while the demand of semiconductor product increasingly thinning can be met.
Description of the drawings
It is to process vertical view of the carrier in application according to the semiconductor product of an embodiment of the present utility model to show shown in Fig. 1
It is intended to
It is the close-up schematic view of Fig. 1 shown in Fig. 2
It is the vertical view signal of the support plate for processing carrier according to the semiconductor product of an embodiment of the present utility model shown in Fig. 3
Figure
It is the elevational schematic view of support plate in Fig. 3 shown in Fig. 4
It is the vertical view signal of the cover plate for processing carrier according to the semiconductor product of an embodiment of the present utility model shown in Fig. 5
Figure
Specific embodiment
For being better understood from spirit of the present utility model, which is made below in conjunction with part preferred embodiment of the present utility model
Further illustrate.
It is that vertical view of the carrier 10 in application is processed according to the semiconductor product of an embodiment of the present utility model shown in Fig. 1
Schematic diagram.It is the close-up schematic view of Fig. 1 shown in Fig. 2.
As shown in Figure 1, 2, the semiconductor product processing carrier 10 is comprising a support plate 20 and a cover plate 30.In use, carrying
20 both sides of plate are carried on the track of encapsulation board (not shown), and semiconductor product band 40 is carried on the support plate 20, and by
The pressing of 30 closed type of cover plate is fixed, and then can carry out the PROCESS FOR TREATMENTs such as chip stickup or wire bonding and non-warpage.Such as this area
Technical staff is to understand, and the semiconductor product band 40 can be substrate strip or lead frame bar, which is provided with product zone
Domain 42 and the frame 44 around the product area 42, are provided with, in the product area 42, some semiconductor packages lists being arranged in array
First (because size is little and intensive, in figure, failing clear identification).
It is the vertical view of the support plate 20 for processing carrier 10 according to the semiconductor product of an embodiment of the present utility model shown in Fig. 3
Schematic diagram, is the elevational schematic view of support plate 20 in Fig. 3 shown in Fig. 4.
Specifically, in conjunction with Fig. 1,2,3,4, support plate 20 is put down in the rectangle similar with the semiconductor product band 40 for being carried
Tabular, with a upper surface 200 and the lower surface 202 relative with the upper surface 200, and the upper surface 200 can with lower surface 202
Make anode to process so that the surface of support plate 20 smooths, and prevents support plate 20 from aoxidizing.The selection of support plate 20 can be light weight and uniform temperature
The metal or alloy material of preferably (temperature difference is within +/- 10 DEG C), for example, can be aluminium.The planar dimension of support plate 20 is compared with carried half
Conductor product band 40 is bigger, for example, can be 78x255mm or 76.3x240mm etc..The thickness of support plate 20 should meet effectively holding
Flatness, the requirement for preventing warpage, in the present embodiment, it is contemplated that to the track opening fitness with encapsulation board, such as guarantee synthesis
Support plate 20 is designed as thick middle, the thinning structure in edge (can refer to Fig. 2) by scrappage and stepping smooth degree.In track opening
For 0.1mm to 1.1mm scopes when, in the present embodiment the interior thickness of support plate 20 can be 1.5mm, then thinning for 0.5mm+ to edge
0.05mm.Obviously, those skilled in the art can make different thickness based on above-mentioned teaching for different track openings and select, and
It is not limited to examples detailed above.Product area 42 and frame 44 corresponding to semiconductor product band 40, can draw corresponding for support plate 20
It is divided into a vacuum area 22 and the installation region 24 around vacuum area 22, the wherein corresponding semiconductor product band of vacuum area 22
Product area 42 on 40, and installation region 24 is corresponding to the frame 44 on semiconductor product band 40.
Similar to the arrangement of semiconductor packages unit, be arranged in array in the vacuum area 22 some vacuum holes 220.Respectively
, through the upper surface 200 of support plate 20 to lower surface 202, each of which vacuum hole 220 is in the upper surface of support plate 20 for vacuum hole 220
Upper shed 222 on 200 is less than under shed 224 of the vacuum hole 220 on the lower surface 202 of support plate 20, and upper shed 222 is passed through
Configure with the size less than semiconductor packages unit to be processed.When semiconductor product band 40 is carried on support plate 20, per
Semiconductor encapsulation unit is can be located on the vacuum hole 220 that at least one pair of is answered, so as to be existed by vacuum suction in process
Will not fly out on support plate 20.For example for substrate welds the semiconductor packages unit of crystalline region (die pad) for more than 7mmx7mm, its
5 vacuum holes 220 can be designed below, and 220 aperture of vacuum hole can be below 0.8mm；And for substrate weldering crystalline region be 6mmx6mm with
Under semiconductor packages unit, 1 vacuum hole 220 can be designed below, 220 aperture of vacuum hole can be below 0.5mm.Concrete
During application, the aperture of such as upper shed 222 is excessive, then can cause semiconductor packages unit vacantly and then produce to weld viscous asking
Topic.Relative, under shed 224 is then preferably larger, can so ensure vacuum effectiveness good, low cost, and be easy to clean.This area
Technical staff can design size and the arrangement of multiple upper sheds 222 and under shed 224 based on mentioned above principle, herein not example one by one
Lift.In the present embodiment, the diameter 0.2mm+/- 0.05mm of upper shed 222, a diameter of 1.0mm+/- 0.05mm of under shed 224,
This design can be universally used in packaging part of the size more than 0.3mm*0.3mm.
Some magnet 240 and support plate up/down material through hole 242, this enforcement are all embedded with each side of installation region 24
In example, magnet 240 and support plate up/down material through hole 242 are arranged in pairs on each side, provide 16 pairs in the present embodiment altogether.The magnetic
The magnetic of iron 240 need sufficiently strong to adsorb cover plate 30 can closed type be pressed on support plate 20, the magnetic of the magnet 240 in addition
Also need to bear chip stickup or the high temperature in wire bonding process.In the present embodiment, magnet 240 can preferably withstand up to
The samarium cobalt magnet of 400 DEG C of high temperature, and cannot consolidate so as to avoid magnetic invalidation in processing procedure from causing cover plate 30 to depart from from support plate 20
Hold carried semiconductor product band 40.Support plate up/down material through hole 242 is designed for automatic charging ＆ discharging machine (not shown), can
It is easy to automatic charging ＆ discharging machine to execute the up/down material operation of semiconductor product band 40.
Additionally, be additionally provided with two length sides of installation region 24 alignment pin 244 (with reference to shown in Fig. 1,2, wherein Fig. 1
In only illustrate expose to 30 outer portion of cover plate).Standard through-hole in the setting of alignment pin 244 and semiconductor product band 40 is (not
Diagram, as it is well known to the skilled in the art, the standard through-hole is reserved according to design rule) corresponding, so as to may pass through standard
Through hole is accurately positioned in semiconductor product band 40 on support plate 20, plays positioning and foolproof function.In the present embodiment, alignment pin
244 have 3, are distributed in isosceles triangle.Semicircular indentations 246 can be provided with two width sides of installation region 24,
Can facilitate.
It is the vertical view of the cover plate 30 for processing carrier 10 according to the semiconductor product of an embodiment of the present utility model shown in Fig. 5
Schematic diagram, its can be used cooperatively with the support plate 20 in Fig. 3,4.
As shown in Fig. 1,2,5, similar, cover plate 30 is in the rectangle similar with the semiconductor product band 40 for being carried,
Which has hollow window region 32 and the positioning area 34 around the window region 32.When cover plate 30 is loaded on support plate 20, the window
Mouth region 32 is configured to the vacuum area 22 for exposing support plate 20 to the open air.Thus, as shown in figure 1, the window region 32 can be exposed to the open air in application
The product area 42 of the semiconductor product band 40 for being carried.30 thickness of cover plate can be thin a lot of relative to support plate 20, for example optional
Use 0.15mm.Cover plate 30 can be the blue steel piece of blackening process, so can ensure that the flexibility of cover plate 30 and not oxidizable and deformation.
Support plate up/down material through hole 242 on the installation region 24 of the corresponding support plate 20 of the positioning area 34 of cover plate 30 is correspondingly provided with cover plate up/down
Material through hole 342 and location hole 344, the automatic charging ＆ discharging machine that be conducive to so as to cooperated automatically are operated.The positioning area 34 of cover plate 30
Alignment pin 244 on the installation region 24 of corresponding support plate 20 is correspondingly provided with location hole 344, so as to be available for alignment pin 244 through half
Location hole 344 is further passed through after standard through-hole on conductor product band 40 and positioning cover plate 30, can also play foolproof function.
The positioning area 34 of cover plate 30 can also be provided with counnter attack mark, such as, in the present embodiment, can arrange counnter attack at the one of positioning area 34 jiao
Hole 346 and expose the part frame 44 of semiconductor product band 40 to the open air.
The carrier 10 that the utility model embodiment is provided passes through by 20 bearing semiconductor product band 40 of support plate, semiconductor product
The mode of cover plate 30 is pressed on product band 40, by the magnetic absorption between cover plate 30 and support plate 20 by semiconductor product band 40
44 flat fixation of frame and avoid warpage.By the help of carrier 10, that is, the requirement of automatic job is achieved, folding is effectively prevent
Material, improves product yield again and meets the demand of substrate strip or lead frame bar cost savings, realize the target of product thinning.
Technology contents of the present utility model and technical characterstic have revealed that as above, but those of ordinary skill in the art still may be used
A variety of replacements and modification without departing substantially from the utility model spirit can be made based on teaching of the present utility model and announcement.Therefore, originally
The protection domain of utility model should be not limited to the content disclosed in embodiment, and should replace without departing substantially from of the present utility model including various
Change and modify, and covered by present patent application claims.
Claims (10)
1. a kind of semiconductor product processes carrier, it is characterised in which includes：
Support plate, has：
Upper surface；
The lower surface relative with the upper surface；And
Some vacuum holes, through the upper surface to the lower surface, wherein described some vacuum holes are in the upper of the upper surface
Opening is less than under shed of some vacuum holes in the lower surface, and the upper shed is configured to less than to be processed half
The size of conductor product unit；
Cover plate, the positioning area with window region and around the window region, the window region are configured to expose described to be processed
Semiconductor product article unit；And
Some magnet, are embedded in the support plate；The magnet is configured so that the cover plate is by semiconductor product band closed type
The upper surface of the support plate is pressed on, the semiconductor product band includes the semiconductor product article unit to be processed.
2. semiconductor product as claimed in claim 1 processes carrier, and wherein described support plate is aluminium.
3. semiconductor product as claimed in claim 1 processes carrier, and wherein described magnet is samarium cobalt magnet.
4. semiconductor product as claimed in claim 1 processes carrier, is further provided with alignment pin on wherein described support plate, described
The standard through-hole that alignment pin is taken with the semiconductor product bar is corresponding, and the cover plate is provided with corresponding with the alignment pin fixed
Position hole.
5. semiconductor product as claimed in claim 1 processes carrier, is further provided with wherein described support plate and the cover plate
Some up/down material through hole.
6. semiconductor product as claimed in claim 1 processes carrier, design of the wherein described support plate in thick middle thin edge.
7. semiconductor product as claimed in claim 1 processes carrier, and two width sides of wherein described support plate are provided with through matching somebody with somebody
Put to load or dismantle the breach of the semiconductor product band manually.
8. semiconductor product as claimed in claim 1 processes carrier, blue steel piece of the wherein described cover plate for blackening process.
9. semiconductor product as claimed in claim 1 processes carrier, and wherein described cover plate is provided with to be prevented putting back mark.
10. semiconductor product as claimed in claim 1 processes carrier, and a diameter of 0.2mm+ of wherein described upper shed/-
0.05mm, a diameter of 1.0mm+/- 0.05mm of the under shed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620859252.4U CN206022330U (en) | 2016-08-10 | 2016-08-10 | Semiconductor product processes carrier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620859252.4U CN206022330U (en) | 2016-08-10 | 2016-08-10 | Semiconductor product processes carrier |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN206022330U true CN206022330U (en) | 2017-03-15 |
Family
ID=58247202
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201620859252.4U Active CN206022330U (en) | 2016-08-10 | 2016-08-10 | Semiconductor product processes carrier |
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| Country | Link |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108470703A (en) * | 2018-04-02 | 2018-08-31 | 华进半导体封装先导技术研发中心有限公司 | The carrier of silicon wafer warpage after a kind of improvement reflow ovens |
| CN108598027A (en) * | 2018-07-05 | 2018-09-28 | 上海世禹精密机械有限公司 | Semiconductor substrate flattening device and levelling method |
| CN109205009A (en) * | 2018-07-19 | 2019-01-15 | 广东长盈精密技术有限公司 | electronic product carrier |
| CN110265312A (en) * | 2019-07-19 | 2019-09-20 | 苏州日月新半导体有限公司 | Wire bonding apparatus and method of operation |
| CN111439580A (en) * | 2019-01-17 | 2020-07-24 | 日月光半导体制造股份有限公司 | Panel processing equipment and method thereof and multi-stage adsorption device |
-
2016
- 2016-08-10 CN CN201620859252.4U patent/CN206022330U/en active Active
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108470703A (en) * | 2018-04-02 | 2018-08-31 | 华进半导体封装先导技术研发中心有限公司 | The carrier of silicon wafer warpage after a kind of improvement reflow ovens |
| CN108598027A (en) * | 2018-07-05 | 2018-09-28 | 上海世禹精密机械有限公司 | Semiconductor substrate flattening device and levelling method |
| CN109205009A (en) * | 2018-07-19 | 2019-01-15 | 广东长盈精密技术有限公司 | electronic product carrier |
| CN111439580A (en) * | 2019-01-17 | 2020-07-24 | 日月光半导体制造股份有限公司 | Panel processing equipment and method thereof and multi-stage adsorption device |
| CN110265312A (en) * | 2019-07-19 | 2019-09-20 | 苏州日月新半导体有限公司 | Wire bonding apparatus and method of operation |
| CN110265312B (en) * | 2019-07-19 | 2024-03-01 | 日月新半导体(苏州)有限公司 | Wire bonding apparatus and method of operation |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address | ||
| CP03 | Change of name, title or address |
Address after: No. 188, Suhong West Road, Suzhou Industrial Park, Suzhou, Jiangsu Province Patentee after: Riyuexin semiconductor (Suzhou) Co.,Ltd. Address before: 215026 No.188 Suhong West Road, Suzhou Industrial Park, Suzhou City, Jiangsu Province Patentee before: SUZHOU ASEN SEMICONDUCTORS Co.,Ltd. |