CN108598027A - Semiconductor substrate flattening device and levelling method - Google Patents
Semiconductor substrate flattening device and levelling method Download PDFInfo
- Publication number
- CN108598027A CN108598027A CN201810728849.9A CN201810728849A CN108598027A CN 108598027 A CN108598027 A CN 108598027A CN 201810728849 A CN201810728849 A CN 201810728849A CN 108598027 A CN108598027 A CN 108598027A
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- China
- Prior art keywords
- substrate
- cover board
- bottom plate
- semiconductor substrate
- positioning region
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- 239000000758 substrate Substances 0.000 title claims abstract description 65
- 238000000034 method Methods 0.000 title claims abstract description 39
- 239000004065 semiconductor Substances 0.000 title claims abstract description 20
- 239000000696 magnetic material Substances 0.000 claims description 5
- 238000011144 upstream manufacturing Methods 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
A kind of semiconductor substrate flattening device, include bottom plate for being horizontally arranged substrate and can with the bottom plate is fixed up and down intermediate keeps smooth cover board so that the substrate to be sandwiched in, there is the first positioning region on the bottom plate, there is the second positioning region coordinated with first positioning region on the cover board, and there are the hollow-out parts of the process island for exposed substrate on the cover board.Substrate is sandwiched in centre by the present invention by bottom plate and cover board, to keep smooth, each process equipment is made to become simple, flattening mechanism need not in addition be installed additional, it is versatile, so that upstream and downstream technique is become more smooth, to make processing technology become simple, while also saving cost.
Description
Technical field
The present invention relates to technical field of semiconductors more particularly to a kind of semiconductor substrate flattening devices and levelling method.
Background technology
In semiconductor rear section packaging technology, when carrying out the techniques processing such as Flip chip, heating cleaning, substrate is put down
Whole degree has strict requirements and limitation, and because of the characteristic of substrate warpage itself, extraneous mechanism must be accommodated to help base by determining
Plate is smooth to realize.
Traditional solution is that all have substrate flattening mechanism to each process equipment, smooth and for different process
Mechanism is inconsistent, to increase the difficulty of each process equipment, is also unfavorable for the fluency of upstream and downstream technique.
Invention content
Based on this, in view of the above technical problems, a kind of semiconductor substrate flattening device and levelling method are provided.
In order to solve the above technical problems, the present invention adopts the following technical scheme that：
A kind of semiconductor substrate flattening device includes bottom plate for being horizontally arranged substrate and can be solid up and down with the bottom plate
Determine, the substrate is sandwiched in the smooth cover board of intermediate holding, to there is the first positioning region on the bottom plate, on the cover board have
The second positioning region coordinated with first positioning region, and there are the hollow-out parts of the process island for exposed substrate on the cover board.
The upper surface of the bottom plate forms the saddle for holding up the substrate, and the both sides of the saddle have for disassembling pawl
Stretch to the notch on the downside of substrate.
The bottom plate can upper and lower magnetic attracting with cover board.
The surrounding of the plate upper surface is uniformly provided with multiple magnet, and the cover board is magnetic material cover board.
First positioning region is the pilot pin for the first positioning hole that may pass upwardly through the substrate edges, the pilot pin
Positioned at the edge of the plate upper surface, second positioning region is the second location hole penetrated for the pilot pin.
The hollow-out parts include for the rectangular aperture of exposed Core Feature process island and for exposed identification function work
The rectangular notch in skill area and strip aperture.
This programme further relates to a kind of semiconductor substrate levelling method, including：
Bottom plate is kept flat；
Substrate level is positioned on the bottom plate；
Cover board is placed on the substrate, and fixed up and down with bottom plate, so that substrate is sandwiched in intermediate holding smooth；
There is the first positioning region on the bottom plate, there is the second positioning coordinated with first positioning region on the cover board
Portion, and there are the hollow-out parts of the process island for exposed substrate on the cover board.
The upper surface of the bottom plate forms the saddle for holding up the substrate, and the both sides of the saddle have for disassembling pawl
Stretch to the notch on the downside of substrate.
The bottom plate can upper and lower magnetic attracting with cover board.
The surrounding of the plate upper surface is uniformly provided with multiple magnet, and the cover board is magnetic material cover board.
Substrate is sandwiched in centre by the present invention by bottom plate and cover board, to keep smooth, each process equipment is made to become letter
It is single, it need not in addition install flattening mechanism additional, it is versatile, so that upstream and downstream technique is become more smooth, to make processing technology become
It obtains simply, while also saving cost.
Description of the drawings
The following describes the present invention in detail with reference to the accompanying drawings and specific embodiments：
Fig. 1 is the structural diagram of the present invention；
Fig. 2 is the decomposition texture schematic diagram of the present invention；
Fig. 3 is the A-A sectional views of Fig. 1；
Fig. 4 is the B-B sectional views of Fig. 1.
Specific implementation mode
As shown in Figs 1-4, a kind of semiconductor substrate flattening device, include bottom plate 110 for being horizontally arranged substrate and
It can be fixed substrate 20 is sandwiched in the smooth cover board 120 of intermediate holding with about 110 bottom plate.
In the present embodiment, bottom plate 110 can upper and lower magnetic attracting with cover board 120.
Specifically, the surrounding of 110 upper surface of bottom plate is uniformly provided with multiple magnet, and cover board 120 is magnetic material cover board.
There is the first positioning region 111 on bottom plate 110.
In order to which, convenient for dismantling carrier, the upper surface of bottom plate 110 forms the saddle for holding up substrate 20 after the completion of technique
112, saddle 112 has the notch 112a that 20 downside of substrate is stretched to for dismantling pawl in the both sides of 110 length direction of bottom plate.
In the present embodiment, notch 112a is arc-shaped, totally six, and six notch 112a are arranged symmetrically.
There is the second positioning region 121 coordinated with the first positioning region 111 on cover board 120, and have on the cover board 120 and use
Hollow-out parts in the process island of exposed substrate 20.
In the present embodiment, the first positioning region 111 is the positioning for the first positioning hole 21 that may pass upwardly through 20 edge of substrate
Needle, pilot pin are located at the edge of 110 upper surface of bottom plate, and the second positioning region 121 is the second location hole penetrated for pilot pin.
Hollow-out parts include for the rectangular aperture 122 of exposed Core Feature process island and for exposed identification function technique
The rectangular notch 123 in area and strip aperture 124.
Core Feature process island is that substrate 20 needs to carry out the position of technique processing, and identification function process island needs for substrate 20
Carry out the position of the functions such as reading code and visual identity.
In the present embodiment, rectangular aperture 122 is four, and four rectangular apertures 122 arrange along its length, rectangular notch
123 be one, is located at the one side edge of 120 width direction of cover board, and strip aperture 124 is two, is respectively symmetrically located at lid
The both sides of 120 width direction of plate.
The formation process of the present invention is as follows：
1, bottom plate 110 is kept flat.
2, substrate 20 is placed horizontally on bottom plate 110, by the first positioning hole 21 and bottom plate 110 on substrate 20
Pilot pin positioned, after placing, pilot pin is higher than the upper surface of substrate 20.
3, cover board 120 is placed on substrate, is positioned, is put by second location hole on cover board 120 and pilot pin
After setting, pilot pin is less than the upper surface of cover board 120, and cover board 120 is fixed with about 110 bottom plate, and substrate 20 is made to be sandwiched in intermediate guarantor
Maintain an equal level whole, at being integral, the technique that may be used for each process equipment in this way adds for substrate 20, bottom plate 110 and cover board 120
Work.
Substrate 20 is sandwiched in centre by the present invention by bottom plate 110 and cover board 120, to keep smooth, each technique is made to set
It is standby to become simple, it need not in addition install flattening mechanism additional, it is versatile, so that upstream and downstream technique is become more smooth, to make to add
Work technique becomes simple, while also saving cost.
But those of ordinary skill in the art it should be appreciated that more than embodiment be intended merely to illustrate this
Invention, and be not used as limitation of the invention, as long as in the spirit of the present invention, to embodiment described above
Variation, modification will all fall within the scope of claims of the present invention.
Claims (10)
1. a kind of semiconductor substrate flattening device, which is characterized in that include bottom plate for being horizontally arranged substrate and can be with this
Bottom plate is fixed up and down to have the first positioning region so that the substrate is sandwiched in intermediate holding smooth cover board on the bottom plate, described
There is the second positioning region coordinated with first positioning region on cover board, and there is the process island for exposed substrate on the cover board
Hollow-out parts.
2. a kind of semiconductor substrate flattening device according to claim 1, which is characterized in that the upper surface shape of the bottom plate
At the saddle for holding up the substrate, the both sides of the saddle have stretches to the notch on the downside of substrate for dismantling pawl.
3. a kind of semiconductor substrate flattening device according to claim 2, which is characterized in that the bottom plate and cover board can on
Magnetic is attracted.
4. a kind of semiconductor substrate flattening device according to claim 3, which is characterized in that the four of the plate upper surface
It is uniformly provided with multiple magnet week, the cover board is magnetic material cover board.
5. a kind of semiconductor substrate flattening device according to claim 2 or 4, which is characterized in that first positioning region
For may pass upwardly through the substrate edges first positioning hole pilot pin, the pilot pin is located at the side of the plate upper surface
Edge, second positioning region are the second location hole penetrated for the pilot pin.
6. a kind of semiconductor substrate flattening device according to claim 5, which is characterized in that the hollow-out parts include being used for
The rectangular aperture of exposed Core Feature process island and the rectangular notch for exposed identification function process island and strip aperture.
7. a kind of semiconductor substrate levelling method, which is characterized in that including：
Bottom plate is kept flat；
Substrate level is positioned on the bottom plate；
Cover board is placed on the substrate, and fixed up and down with bottom plate, so that substrate is sandwiched in intermediate holding smooth；
There is the first positioning region on the bottom plate, there is the second positioning region coordinated with first positioning region on the cover board,
And there are the hollow-out parts of the process island for exposed substrate on the cover board.
8. a kind of semiconductor substrate levelling method according to claim 7, which is characterized in that the upper surface shape of the bottom plate
At the saddle for holding up the substrate, the both sides of the saddle have stretches to the notch on the downside of substrate for dismantling pawl.
9. a kind of semiconductor substrate levelling method according to claim 8, which is characterized in that the bottom plate and cover board can on
Magnetic is attracted.
10. a kind of semiconductor substrate levelling method according to claim 9, which is characterized in that the plate upper surface
Surrounding is uniformly provided with multiple magnet, and the cover board is magnetic material cover board.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810728849.9A CN108598027A (en) | 2018-07-05 | 2018-07-05 | Semiconductor substrate flattening device and levelling method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810728849.9A CN108598027A (en) | 2018-07-05 | 2018-07-05 | Semiconductor substrate flattening device and levelling method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108598027A true CN108598027A (en) | 2018-09-28 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810728849.9A Pending CN108598027A (en) | 2018-07-05 | 2018-07-05 | Semiconductor substrate flattening device and levelling method |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN200944704Y (en) * | 2006-09-15 | 2007-09-05 | 深圳市宝安区西乡华兴新精密电子厂 | Clamp for flexible circuit substrate installation |
| CN203399420U (en) * | 2013-09-10 | 2014-01-15 | 惠州市金百泽电路科技有限公司 | Auxiliary clamp improving laminating flatness of multilayer thick copper foil circuit board |
| US20140055969A1 (en) * | 2012-08-21 | 2014-02-27 | Apple Inc. | Board assemblies with minimized warpage and systems and methods for making the same |
| CN206022330U (en) * | 2016-08-10 | 2017-03-15 | 苏州日月新半导体有限公司 | Semiconductor product processes carrier |
| CN207399652U (en) * | 2017-08-24 | 2018-05-22 | 凯普金业电子科技（昆山）有限公司 | A kind of SMT carriers of automatic absorbing |
-
2018
- 2018-07-05 CN CN201810728849.9A patent/CN108598027A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN200944704Y (en) * | 2006-09-15 | 2007-09-05 | 深圳市宝安区西乡华兴新精密电子厂 | Clamp for flexible circuit substrate installation |
| US20140055969A1 (en) * | 2012-08-21 | 2014-02-27 | Apple Inc. | Board assemblies with minimized warpage and systems and methods for making the same |
| CN203399420U (en) * | 2013-09-10 | 2014-01-15 | 惠州市金百泽电路科技有限公司 | Auxiliary clamp improving laminating flatness of multilayer thick copper foil circuit board |
| CN206022330U (en) * | 2016-08-10 | 2017-03-15 | 苏州日月新半导体有限公司 | Semiconductor product processes carrier |
| CN207399652U (en) * | 2017-08-24 | 2018-05-22 | 凯普金业电子科技（昆山）有限公司 | A kind of SMT carriers of automatic absorbing |
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| SE01 | Entry into force of request for substantive examination | ||
| CB03 | Change of inventor or designer information |
Inventor after: Zhao Kai Inventor after: Su Haojie Inventor after: Lin Haitao Inventor after: Shao Jiayu Inventor after: Huang Junpeng Inventor after: Liang Meng Inventor before: Zhao Kai Inventor before: Su Haojie Inventor before: Shao Jiayu Inventor before: Huang Junpeng |
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| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180928 |
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| RJ01 | Rejection of invention patent application after publication |