CN110246824B - Double-base-island IC lead bracket with obliquely-arranged base islands and packaged IC - Google Patents
Double-base-island IC lead bracket with obliquely-arranged base islands and packaged IC Download PDFInfo
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- CN110246824B CN110246824B CN201910562713.XA CN201910562713A CN110246824B CN 110246824 B CN110246824 B CN 110246824B CN 201910562713 A CN201910562713 A CN 201910562713A CN 110246824 B CN110246824 B CN 110246824B
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- island
- base
- packaging unit
- packaging
- pins
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- 238000004806 packaging method and process Methods 0.000 claims abstract description 74
- 230000017525 heat dissipation Effects 0.000 claims description 22
- 230000009977 dual effect Effects 0.000 claims 3
- 238000004519 manufacturing process Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000012536 packaging technology Methods 0.000 description 4
- 239000002699 waste material Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000003014 reinforcing effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000010008 shearing Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
The invention discloses a double-base-island IC lead bracket with a base island obliquely arranged and a packaged IC, comprising: a plurality of packaging units arranged along a straight line, wherein each packaging unit is provided with a plurality of pins and a pair of base islands arranged side by side, and the shapes of the base islands are polygonal; at least two adjacent side lines between the pair of base islands are parallel to each other and form an included angle with the arrangement direction of the packaging units, and the included angle is smaller than 90 degrees and larger than 0 degrees. The invention has the advantages of compact structure, high production efficiency and small volume of the produced packaged IC.
Description
Technical Field
The invention relates to the technical field of IC packaging, in particular to a double-base-island IC lead bracket with obliquely arranged base islands and a packaged IC.
Background
Packaging technology is a technology of packaging semiconductor integrated circuit chips with insulating plastic or ceramic materials, and packaging technology is also essential for the chips. Because the chip must be isolated from the outside to prevent the corrosion of impurities in the air to the chip from causing the electrical performance to be reduced, on the other hand, the packaged chip is more convenient to install and transport. The lead frame is used as the most important carrier in the packaging technology, and the design structure directly influences the quality and efficiency of the packaging technology.
Along with the continuous development of integrated circuit technology, lead frames with double base islands, such as the patent of the invention of bulletin No. CN207705186U, have appeared in the prior art, wherein the base islands are rectangular, two opposite sides of the base islands are horizontally arranged, and the other two opposite sides of the base islands are vertically arranged, pins are uniformly distributed on two sides of the base islands, the number of pins is large, pins are wasted when a novel IC circuit structure is packaged, the area of the base islands is large, the space of packaging units cannot be fully utilized, the density of the packaging units arranged on a lead bracket is low, the packaged IC finished product is large in size, not only is the bracket material wasted, but also the development requirement of a miniature IC cannot be met.
Therefore, how to design a dual-island IC lead frame with reduced material waste is a technical problem to be solved in the industry.
Disclosure of Invention
In order to solve the defects of structural redundancy and material waste in the prior art, the invention provides a double-base-island IC lead bracket with a base island obliquely arranged and a packaged IC.
The technical scheme adopted by the invention is that a double-base-island IC lead bracket with a base island obliquely arranged is designed, and the double-base-island IC lead bracket comprises: a plurality of packaging units arranged along a straight line, wherein each packaging unit is provided with a plurality of pins and a pair of base islands arranged side by side, and the shapes of the base islands are polygonal; at least two adjacent side lines between the pair of base islands are parallel to each other and form an included angle with the arrangement direction of the packaging units, and the included angle is smaller than 90 degrees and larger than 0 degrees.
Preferably, a gap is left between two adjacent side lines parallel to each other between the pair of base islands.
Preferably, each pin in the packaging unit is composed of a root part and an extension part, the extension part is connected to one end of the root part, which is close to the base island, and a turning angle is arranged at the connection part of the root part and the extension part.
Preferably, the packaging unit is provided with heat dissipation pins with extension parts connected to the base islands, the packaging unit is also provided with working pins with gaps between the extension parts and the base islands, and each base island is provided with heat dissipation pins and working pins.
Preferably, at least two adjacent side lines between the base island and the corresponding working pins are parallel to each other and form an included angle with the arrangement direction of the packaging unit, and the included angle is smaller than 90 degrees and larger than 0 degrees.
Preferably, the heat dissipation pins have a width greater than the working pins.
Preferably, the gap ranges from 0.1mm to 0.3mm.
Preferably, the plurality of packaging units are arranged in a straight line along the vertical direction to form a packaging column, four pins are arranged in the packaging units, the root parts of the pins are arranged vertically, a heat dissipation pin is arranged on the upper side of one base island of the packaging unit, a working pin is arranged on the lower side of the base island of the packaging unit, a working pin is arranged on the upper side of the other base island of the packaging unit, and a heat dissipation pin is arranged on the lower side of the other base island of the packaging unit.
The invention also provides a packaged IC comprising the packaging unit in the IC lead bracket.
Preferably, the packaged IC further includes: two chips arranged on the packaging unit and a plastic package body coating the packaging unit, wherein each base island in the packaging unit is provided with a chip, and one end of each pin far away from the base island in the packaging unit extends out of the plastic package body.
Compared with the prior art, the island is obliquely arranged to fully utilize the space of the packaging unit, the packaging unit is compact in structure and small in area, the packaging unit arranged on the lead bracket is high in density, the waste of bracket materials is reduced, and the production efficiency is higher.
Drawings
The invention is described in detail below with reference to examples and figures, wherein:
FIG. 1 is a schematic diagram of an IC lead frame according to the present invention;
FIG. 2 is a schematic diagram of a package unit according to the present invention;
FIG. 3 is a schematic diagram of the wiring of the packaging unit of the present invention;
FIG. 4 is a schematic diagram of the structure of a packaged IC according to the present invention;
fig. 5 is a schematic side view of a packaged IC in accordance with the present invention.
Detailed Description
As shown in fig. 1 and 2, the dual-island IC lead frame according to the present invention includes: the packaging units 1 are arranged in a straight line along the vertical direction to form a packaging column, two packaging columns which are arranged side by side left and right form a packaging group 2, a transverse side rib 3 is arranged between two adjacent packaging units in the packaging group 2, a vertical side rib 4 is arranged between two adjacent packaging groups 2, the left end and the right end of the transverse side rib 3 are respectively connected to the vertical side rib 4 on the corresponding side of the transverse side rib, the upper ends of all the packaging groups 2 and the vertical side rib 4 are connected to the upper side rib 5, the lower ends of all the packaging groups 2 and the vertical side rib 4 are connected to the lower side rib 6, and the structure of the IC lead bracket is quite stable through the connection of the transverse side rib 3, the vertical side rib 4, the upper side rib 5 and the lower side rib 6, and positioning holes are further formed in the upper side rib 5 and the lower side rib 6 so as to facilitate the positioning of the IC lead bracket for packaging.
The following describes the structure of the packaging units in detail, each packaging unit 1 includes a pair of base islands and a plurality of pins, the base islands are arranged side by side left and right, the shapes of the base islands are polygonal, which can be quadrangular, pentagonal, etc., at least two adjacent side lines between the base islands are parallel to each other and form an included angle with the vertical direction, the included angle is smaller than 90 degrees and larger than 0 degree, and a gap is reserved between the two adjacent side lines parallel to each other between the base islands. As shown in fig. 2 and 3, in the preferred embodiment, the two islands are a first island 11 and a second island 12, the edge of the first island 11 opposite to the second island 12 is called a first edge 111, the edge of the second island 12 opposite to the first island 11 is called a second edge 121, the first edge 111 and the second edge 121 are parallel to each other, the angle between the two edges and the vertical direction is preferably 20 ° to 80 °, the angle between the two edges and the vertical direction is 73 ° in fig. 2, and a gap is left between the first edge 111 and the second edge 121, and the gap is in the range of 0.1mm to 0.3mm.
Each pin in the packaging unit 1 is composed of a root part and an extension part, the extension part is connected to one end, close to the base island, of the root part of the pin, a turning angle is arranged at the connection part of the root part of the pin and the extension part of the pin, the turning angle is an obtuse angle or a right angle, the design of the turning angle and the extension part has the advantages of reinforcing the positioning relation between the pin and the plastic package body, embedding the extension part in the plastic package body 7 when the pin is pulled by external force, preventing the pin from falling out of the plastic package body, and packaging the IC stably and reliably.
The pins are divided into working pins 13 and heat dissipation pins 14, the extending parts 131 of the working pins 13 are kept with gaps with the base islands, the gap ranges from 0.1mm to 0.3mm, the root widths of all the working pins 13 in the packaging unit 1 are the same, and the width ranges from 0.3mm to 0.5mm. The extension part of the heat dissipation pin 14 is connected to the base island, and the edge line connected with the heat dissipation pin 14 on the base island is parallel to the horizontal direction, so that when the heat dissipation pin is pulled by external force, the shearing force at the connection part can be optimized, and the heat dissipation pin 14 is prevented from being torn from the base island, so that the heat dissipation efficiency of the base island is prevented from being influenced. The width of the heat dissipation pins 14 is larger than that of the working pins 13, and is preferably twice as large as that of the working pins 13, so that the heat dissipation efficiency is higher, the chip can be prevented from being damaged by instantaneous voltage, and the electrical performance of the packaged IC is better.
Each island in the packaging unit is provided with a heat dissipation pin 14 and a working pin 13. In the preferred embodiment, four pins are provided in the packaging unit 1, the root parts of the pins are vertically arranged, a heat dissipation pin 14 is provided on the upper side of a base island of the packaging unit, a working pin 13 is provided on the lower side of the base island, a heat dissipation pin 14 is provided on the upper side of another base island of the packaging unit 1, the two heat dissipation pins 14 are located on different sides, the two working pins 13 are also located on different sides, integrated circuit chips with different polarities can be mounted, a space is provided between the working pins 13 and the heat dissipation pins 14 on the same side, the space is 1.1+/-0.05 mm, the root parts of the pins on the upper sides of the two base islands are connected on the transverse ribs 3 adjacently arranged above the base islands, and the root parts of the pins on the lower sides of the two base islands are connected on the transverse ribs 3 adjacently arranged below the base islands. The IC lead frame is a metal frame, the thickness of the IC lead frame is only 0.15+/-0.05 mm, and the surface of the IC lead frame is provided with a plating surface.
After the base island is obliquely placed, a large available space is left between the base island and the corresponding working pins 13, at least two adjacent side lines are parallel to each other and form an included angle with the vertical direction, the included angle is smaller than 90 degrees and larger than 0 degree, that is, the side line, close to the base island, on the extending part 131 of the working pins 13 is arranged according to the outline of the side of the base island, so that a proper interval between the extending part 131 and the base island can be ensured, the area of the extending part 131 can be increased, namely the contact area between the extending part 131 and the plastic package body is increased, and the extending part 131 is more stably fixed in the plastic package body 7. In the preferred embodiment, as shown in fig. 2 and 3, taking the second base island 12 as an example, the edge of the working pin 13 on the upper side of the second base island 12, which is opposite to the second base island 12, is called a second pin edge 132, the edge of the second base island 12, which is opposite to the working pin 13 on the upper side thereof, is called a second working edge 122, the second pin edge 132 and the second working edge 122 are parallel to each other, the included angle between the two edges and the vertical direction is preferably 20 ° to 80 °, the included angle between the two edges and the vertical direction is 74 ° in fig. 2, a gap is reserved between the first pin edge 131 and the second working edge 122, and the gap range is 0.1mm to 0.3mm.
As shown in fig. 4 and 5, the present invention further provides a packaged IC using the above packaging unit, where the packaged IC further includes: two chips 8 arranged on the packaging unit and a plastic package body 7 wrapping the packaging unit, wherein each base island in the packaging unit 1 is provided with one chip 8, one end, far away from the base island, of each pin in the packaging unit 1 extends out of the plastic package body 7, and a packaging IC processed by the packaging unit 1 in a preferred embodiment is cuboid, has a length of 3+/-0.05 mm and 1.7+/-0.05 mm, is very small in size and has a wider application range.
The foregoing description of the preferred embodiments of the invention is not intended to be limiting, but rather is intended to cover all modifications, equivalents, and alternatives falling within the spirit and principles of the invention.
Claims (7)
1. A dual island IC lead frame comprising: a plurality of packaging units arranged along a straight line, wherein each packaging unit is provided with a plurality of pins and a pair of base islands, and the shapes of the base islands are polygonal; the packaging structure is characterized in that at least two adjacent side lines are parallel to each other between the pair of base islands and form an included angle with the arrangement direction of the packaging unit, the included angle is smaller than 90 degrees and larger than 0 degrees, and a gap is reserved between the two adjacent side lines parallel to each other between the pair of base islands;
The packaging unit is internally provided with a heat dissipation pin with an extension part connected to the base island, and is also internally provided with a working pin with a gap between the extension part and the base island;
The packaging units are arranged in a straight line along the vertical direction to form a packaging column, four pins are arranged in the packaging units, the root parts of the pins are arranged vertically, a heat dissipation pin is arranged on the upper side of one base island of the packaging unit, a working pin is arranged on the lower side of the base island of the packaging unit, a working pin is arranged on the upper side of the other base island of the packaging unit, and a heat dissipation pin is arranged on the lower side of the base island of the packaging unit.
2. The dual-island IC lead frame of claim 1, wherein each of the leads in the package unit is formed of a root portion and an extension portion, the extension portion being connected to an end of the root portion adjacent to the island, and a turning angle being provided at a connection portion of the root portion and the extension portion.
3. The dual-island IC lead frame of claim 1, wherein at least two adjacent edges between the island and its corresponding active lead are parallel to each other and form an angle with the direction of arrangement of the package units, the angle being less than 90 ° and greater than 0 °.
4. The dual island IC leadframe of claim 1, wherein the heat dissipation pins have a width greater than the working pins.
5. The dual island IC leadframe of claim 1, wherein the gap ranges from 0.1mm to 0.3mm.
6. A packaged IC comprising a packaging unit in an IC lead frame according to any one of claims 1 to 5.
7. The packaged IC of claim 6, further comprising: the packaging unit comprises two chips and a plastic package body, wherein the two chips are arranged on the packaging unit, the plastic package body is coated on the packaging unit, each base island in the packaging unit is provided with one chip, and one end, far away from the base island, of each pin in the packaging unit extends out of the plastic package body.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910562713.XA CN110246824B (en) | 2019-06-26 | 2019-06-26 | Double-base-island IC lead bracket with obliquely-arranged base islands and packaged IC |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910562713.XA CN110246824B (en) | 2019-06-26 | 2019-06-26 | Double-base-island IC lead bracket with obliquely-arranged base islands and packaged IC |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110246824A CN110246824A (en) | 2019-09-17 |
| CN110246824B true CN110246824B (en) | 2024-06-18 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910562713.XA Active CN110246824B (en) | 2019-06-26 | 2019-06-26 | Double-base-island IC lead bracket with obliquely-arranged base islands and packaged IC |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110246824B (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5126823A (en) * | 1990-03-06 | 1992-06-30 | Kabushiki Kaisha Toshiba | Lead frame having at least two islands and resin molded semiconductor device using it |
| CN210429795U (en) * | 2019-06-26 | 2020-04-28 | 深圳市富满电子集团股份有限公司 | Double-base-island IC lead wire support with inclined base islands and packaged IC |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2990645B2 (en) * | 1995-01-19 | 1999-12-13 | 株式会社村田製作所 | Lead frame for semiconductor integrated circuit and semiconductor integrated circuit |
| CN104167403B (en) * | 2014-08-19 | 2017-02-15 | 无锡中微爱芯电子有限公司 | Lead frame for multi-pin encapsulation |
-
2019
- 2019-06-26 CN CN201910562713.XA patent/CN110246824B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5126823A (en) * | 1990-03-06 | 1992-06-30 | Kabushiki Kaisha Toshiba | Lead frame having at least two islands and resin molded semiconductor device using it |
| CN210429795U (en) * | 2019-06-26 | 2020-04-28 | 深圳市富满电子集团股份有限公司 | Double-base-island IC lead wire support with inclined base islands and packaged IC |
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| Publication number | Publication date |
|---|---|
| CN110246824A (en) | 2019-09-17 |
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Address after: 518000 18 / F, west area, times science and technology building, nongyuan Road, Xiangmihu street, Futian District, Shenzhen City, Guangdong Province Applicant after: Fuman microelectronics Group Co.,Ltd. Applicant after: SHENZHEN SHANGMING PRECISION MOULD CO.,LTD. Address before: 518000 18 / F, west area, times science and technology building, nongyuan Road, Xiangmihu street, Futian District, Shenzhen City, Guangdong Province Applicant before: FINE MADE MICROELECTRONICS GROUP CO.,LTD. Applicant before: SHENZHEN SHANGMING PRECISION MOULD Co.,Ltd. |
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Effective date of registration: 20220630 Address after: 518000 1701, building 1, Shenzhen new generation industrial park, 136 Zhongkang Road, Meidu community, Meilin street, Futian District, Shenzhen City, Guangdong Province Applicant after: Fuman microelectronics Group Co.,Ltd. Address before: 518000 18 / F, west area, times science and technology building, nongyuan Road, Xiangmihu street, Futian District, Shenzhen City, Guangdong Province Applicant before: Fuman microelectronics Group Co.,Ltd. Applicant before: SHENZHEN SHANGMING PRECISION MOULD CO.,LTD. |
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