CN205944064U - Fingerprint identification chip package structure - Google Patents
Fingerprint identification chip package structure Download PDFInfo
- Publication number
- CN205944064U CN205944064U CN201620712843.9U CN201620712843U CN205944064U CN 205944064 U CN205944064 U CN 205944064U CN 201620712843 U CN201620712843 U CN 201620712843U CN 205944064 U CN205944064 U CN 205944064U
- Authority
- CN
- China
- Prior art keywords
- chip
- material layer
- fingerprint
- adhesive material
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000463 material Substances 0.000 claims abstract description 52
- 239000000853 adhesive Substances 0.000 claims abstract description 27
- 230000001070 adhesive effect Effects 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims description 15
- 238000004806 packaging method and process Methods 0.000 claims description 9
- 239000003822 epoxy resin Substances 0.000 claims description 5
- 229920000647 polyepoxide Polymers 0.000 claims description 5
- 229920005989 resin Polymers 0.000 claims description 5
- 239000011347 resin Substances 0.000 claims description 5
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 238000012797 qualification Methods 0.000 abstract description 3
- 239000012528 membrane Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 241000218202 Coptis Species 0.000 description 1
- 235000002991 Coptis groenlandica Nutrition 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- QCWXUUIWCKQGHC-UHFFFAOYSA-N Zirconium Chemical compound [Zr] QCWXUUIWCKQGHC-UHFFFAOYSA-N 0.000 description 1
- 239000010426 asphalt Substances 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000009969 flowable effect Effects 0.000 description 1
- 238000013467 fragmentation Methods 0.000 description 1
- 238000006062 fragmentation reaction Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
- 229910052726 zirconium Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
Abstract
The utility model discloses a fingerprint identification chip package structure, it is including the closing cap on upper strata, middle fingerprint identification chip, the base plate of bottom, the bottom surface of closing cap and fingerprint chip's upper surface are fixed through the bonding of first chip adhesive material layer, be second chip adhesive material layer between fingerprint chip's lower surface and the base plate upper surface, be fixed with the ASIC chip in the second chip adhesive material layer, the ASIC chip passes through bonding line and base plate hookup. The utility model discloses at least, have the high yield of the mechanized production of great improvement product, guaranteed upper surface with the height error's of fingerprint chip upper surface of closing cap controllability, improved the qualification rate of product, reduced the volume advantage of product.
Description
Technical field
This utility model belongs to logic circuit BGA package field and in particular to a kind of fingerprint recognition chip-packaging structure.
Background technology
If the materials such as glass, sapphire, crystallite zirconium are used as cover plate in current fingerprint chip PKG surface, it is all mostly
By epoxy resin, the lower surface of the upper surface of fingerprint chip and capping is bonded.The product of this kind of chip package is often big
And thick, product integrated level is low, and the high elastic modulus of its own, it is easy to be subject to environmental influence, cause internal stress to discharge, plus
Chip product more and more thinner now it is easy to lead to the fragmentation of chip or Texturized and product inefficacy.Furthermore, due to
Bonded using machine automatization, the thickness of epoxy resin is difficult to precise control, add the levelness of substrate not, lead to product to cover
The upper surface of upper surface and fingerprint chip there is certain level height error, about in ± 15 μm of scope, so, in order to control
The error of level height processed, all using tool manual working on market.Take time and effort, the inefficiency of output, conforming product rate
Low.
Utility model content
The purpose of this utility model is to provide a kind of fingerprint recognition chip-packaging structure, and it at least has and greatly improves product
Mechanization production high yield it is ensured that the controllability of the height error of upper surface and the fingerprint chip upper surface of capping, carry
The high qualification rate of product, reduce product volume the advantages of.
For realizing above-mentioned utility model purpose, this utility model employs following technical scheme:
A kind of fingerprint recognition chip-packaging structure, it includes the capping on upper strata, middle fingerprint recognition chip, the base of bottom
Plate, the upper surface of the bottom surface of described capping and fingerprint chip is adhesively fixed by the first chip adhesive material layer, described fingerprint core
It is the second chip adhesive material layer between the lower surface of piece and upper surface of base plate, be fixed with described second chip adhesive material layer
Asic chip, described asic chip is coupled with substrate by bonding line, and described first chip adhesive material layer can be DAF material
Layer, FOW material layer or FOD material layer, described second chip adhesive material layer can be DAF material layer, FOW material layer, FOD material
The bed of material or conductive /non-conductive epoxy resin layer.
Further, fingerprint chip, the second chip adhesive material are removed between described first chip adhesive material layer and substrate
Space beyond layer, carries out encapsulating filling with resin.
Further, described fingerprint chip is coupled with substrate by bonding line.
Beneficial effect:
This utility model takes new chip adhesive material layer to replace original resin bed, so that capping is entered with fingerprint chip
Row bonding, is simultaneously used for coupling of fixing asic chip and substrate, has played novel chip bonding material layer height inherently
Hardness, high cohesive force, it is more suitable for thermal coefficient of expansion it is ensured that the flatness of adhesive surface and hardness are it is ensured that chip quality;Can
High yield is quantified with machinery, substantially reduces packaging time, improve productivity ratio, in the quality not affecting whole chip package product
Under the premise of, reduce overall volume.Therefore this utility model at least has the high yield of the mechanization production greatly improving product,
Ensure that the controllability of the upper surface of capping and the height error of fingerprint chip upper surface, improve the qualification rate of product, reduce
The advantages of small product size.
Brief description
Fig. 1 is the overall structure diagram of this utility model one preferred embodiment.
Wherein, 1, capping;2nd, fingerprint recognition chip;3rd, substrate;4th, the first chip adhesive material layer;5th, the second chip adhesive
Material layer 5;6th, asic chip;7th, bonding line;8th, resin.
Specific embodiment
Below in conjunction with accompanying drawing and preferred embodiment, the technical solution of the utility model is further described.
Embodiment:
As illustrated, a kind of fingerprint recognition chip-packaging structure, it includes the capping 1 on upper strata, middle fingerprint recognition core
Piece 2, the substrate 3 of bottom, the described bottom surface of capping 1 and the upper surface of fingerprint chip 2 are bonded by the first chip adhesive material layer 4
Fixing, it is the second chip adhesive material layer 5 between the lower surface of described fingerprint chip 2 and substrate 3 upper surface, described second chip
It is fixed with asic chip 6, described asic chip 6 is coupled with substrate 3 by bonding line 7, described first chip in bonding material layer 5
Bonding material layer 4 can be flowable on DAF (Die attach film) bonding die membrane layers, FOW (Film on wire) line
Membrane layers, FOD (film on die) material layer etc. has high-performance, is suitable for the material layer of ultra-thin chip and multi-chip package,
Described second chip adhesive material layer 5 can be DAF material layer, FOW material layer, FOD material layer or conductive /non-conductive asphalt mixtures modified by epoxy resin
Fat epoxy layer.
Further, fingerprint chip 2, the second chip adhesive material are removed between described first chip adhesive material layer 4 and substrate 3
Space beyond the bed of material 5, carries out encapsulating filling with resin 8.
Further, described fingerprint chip 2 is coupled with substrate 3 by bonding line 7.Bonding line can be gold thread, silver wire, copper
Line etc..
Adopt as a example DAF material layer by first, second chip adhesive material layer in the present embodiment, because of DAF material itself
Intrinsic high rigidity, high cohesive force, thermal coefficient of expansion are close to characteristics such as silicon wafers it is ensured that the flatness of the material of each layer and hard
Degree it is ensured that final products encapsulating structure surface and internal fingerprint chip induction region surface keep good flatness it is ensured that
The recognition success rate of fingerprint, improves quality and the efficiency of production.
It is pointed out that as described above is only in order to explain the preferred embodiment of this utility model, and attempt according to this
This utility model is made with any formal restriction, therefore all have is made about this practicality newly under identical practical spirit
Any modification of type or change, all must include being intended to the category of protection in this utility model.
Claims (3)
1. a kind of fingerprint recognition chip-packaging structure it is characterised in that:It includes the capping on upper strata, middle fingerprint recognition core
Piece, the substrate of bottom, the upper surface of the bottom surface of described capping and fingerprint chip is adhesively fixed by the first chip adhesive material layer,
It is the second chip adhesive material layer between the lower surface of described fingerprint chip and upper surface of base plate, described second chip adhesive material
It is fixed with asic chip, described asic chip is coupled with substrate by bonding line, and described first chip adhesive material layer can in layer
Think DAF material layer, FOW material layer or FOD material layer, described second chip adhesive material layer can be DAF material layer, FOW
Material layer, FOD material layer or conductive /non-conductive epoxy resin layer.
2. a kind of fingerprint recognition chip-packaging structure according to claim 1 it is characterised in that:Described first chip adhesive
Between material layer and substrate, the space in addition to fingerprint chip, the second chip adhesive material layer, carries out encapsulating filling with resin.
3. a kind of fingerprint recognition chip-packaging structure according to claim 1 it is characterised in that:Described fingerprint chip passes through
Bonding line is coupled with substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201620712843.9U CN205944064U (en) | 2016-07-07 | 2016-07-07 | Fingerprint identification chip package structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201620712843.9U CN205944064U (en) | 2016-07-07 | 2016-07-07 | Fingerprint identification chip package structure |
Publications (1)
Publication Number | Publication Date |
---|---|
CN205944064U true CN205944064U (en) | 2017-02-08 |
Family
ID=57928436
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201620712843.9U Active CN205944064U (en) | 2016-07-07 | 2016-07-07 | Fingerprint identification chip package structure |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN205944064U (en) |
-
2016
- 2016-07-07 CN CN201620712843.9U patent/CN205944064U/en active Active
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CP03 | Change of name, title or address |
Address after: 215000 33 Xinghai street, Suzhou Industrial Park, Suzhou City, Jiangsu Province Patentee after: Yuancheng Technology (Suzhou) Co.,Ltd. Address before: 215000 33 Xinghai street, Suzhou Industrial Park, Suzhou City, Jiangsu Province Patentee before: Powertech Technology (Suzhou) Co.,Ltd. |
|
CP03 | Change of name, title or address |