CN206864462U - A kind of sorting-type storage chip encapsulating structure - Google Patents

A kind of sorting-type storage chip encapsulating structure Download PDF

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Publication number
CN206864462U
CN206864462U CN201720660136.4U CN201720660136U CN206864462U CN 206864462 U CN206864462 U CN 206864462U CN 201720660136 U CN201720660136 U CN 201720660136U CN 206864462 U CN206864462 U CN 206864462U
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CN
China
Prior art keywords
storage chip
lead frame
sorting
layer
encapsulating structure
Prior art date
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Active
Application number
CN201720660136.4U
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Chinese (zh)
Inventor
刘鹏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiji Semiconductor (suzhou) Co Ltd
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Taiji Semiconductor (suzhou) Co Ltd
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Priority to CN201720660136.4U priority Critical patent/CN206864462U/en
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Publication of CN206864462U publication Critical patent/CN206864462U/en
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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

It the utility model is related to a kind of sorting-type storage chip encapsulating structure, include lead frame, the front of lead frame is provided with front potting resin, the back side is provided with back side potting resin, storage chip layer and pad chip layer are provided with the potting resin of front, storage chip layer is stacked in pad chip layer, and pad chip layer is arranged on lead frame, it is connected between storage chip layer and lead frame and is bonded gold thread, lead frame is provided at both ends with plating pin;The sorting-type storage chip encapsulating structure of the utility model, due to that the heart need not be pressed to make, timbering material manufacture craft is simple, and the flatness of support is good compared with the material flatness for having the pressure heart, is advantageous to the process operations such as packaging and routing, chip stickup;Encapsulating structure takes unbalanced mode up and down, can effectively alleviate the mould flow velocity degree mismatch problem in encapsulation injection molded process.

Description

A kind of sorting-type storage chip encapsulating structure
Technical field
It the utility model is related to technical field of semiconductor encapsulation, and in particular to a kind of sorting-type storage chip encapsulating structure.
Background technology
After wafer manufacturing comes out, into wafer coupons test phase, genuine is according to size heterogeneity, by what is sorted out again Storage chip carries out requiring that encapsulation factory is encapsulated again by specified specification.
Such sorting general back side of chip is already provided with original-pack chip thin films adhesive tape, because the sorting chip memory time is longer, Chip cannot be typically directly used in be pasted on lead frame.In existing encapsulating products, the note of upper and lower balanced type is taken Mould.In order to accommodate 1-2 layers chip even more chips in TSOP packaging bodies, down-lead bracket needs to do the deeper pressure heart Make, the down-lead bracket of this depth pressure heart does not reach the requirement of packaging technology, and due to pressing, the heart is too deep to be caused in chip routing key Bonding point during conjunction is unstable, and chip excessively may result in chip and leak outside in entirely encapsulation cavity, and influence product can By property, original encapsulating structure chip number of plies is low, and capacity is small.
Utility model content
The purpose of the utility model is to provide a kind of sorting-type storage chip encapsulation knot for overcome the deficiencies in the prior art Structure.
To reach above-mentioned purpose, the technical solution adopted in the utility model is:A kind of sorting-type storage chip encapsulating structure, Comprising lead frame, the front of lead frame is provided with front potting resin, and the back side is provided with back side potting resin, front encapsulation Storage chip layer and pad chip layer are provided with resin, storage chip layer is stacked in pad chip layer, and pad chip layer is set Put on the lead frames, be connected between storage chip layer and lead frame and be bonded gold thread, lead frame is provided at both ends with electricity Plate pin.
Preferably, the storage chip layer include be sequentially stacked on top layer sorting-type storage chip in pad chip layer and Bottom sorting-type storage chip.
Preferably, the front of the lead frame is provided with adhesive tape layer, and pad chip is glued by adhesive tape layer and lead frame Even.
Preferably, the thickness of the adhesive tape layer is 20 microns.
Preferably, the size of the pad chip layer is more than storage chip layer.
Due to the utilization of above-mentioned technical proposal, the utility model has following advantages compared with prior art:
The sorting-type storage chip encapsulating structure of the utility model, due to that the heart need not be pressed to make, timbering material system Make that technique is simple, the flatness of support is good compared with the material flatness for having the pressure heart, is advantageous to packaging and routing, and the processing procedures such as chip is pasted are made Industry;Encapsulating structure takes unbalanced mode up and down, can effectively alleviate the mould flow velocity degree mismatch problem in encapsulation injection molded process.
Brief description of the drawings
Technical solutions of the utility model are described further below in conjunction with the accompanying drawings:
Accompanying drawing 1 is a kind of schematic diagram of sorting-type storage chip encapsulating structure described in the utility model.
Embodiment
Below in conjunction with the accompanying drawings and specific embodiment the utility model is described in further detail.
As shown in figure 1, a kind of sorting-type storage chip encapsulating structure described in the utility model, comprising lead frame 4, draws The front of wire frame 4 is provided with front potting resin 1, and the back side is provided with back side potting resin 2, set in front potting resin 1 There are storage chip layer and pad chip layer 5, pad chip layer 5 includes without electrical functions, storage chip layer and is sequentially stacked on pad Top layer sorting-type storage chip 9 and bottom sorting-type storage chip 7 in chip layer 5, the size of pad chip layer 5 are more than top layer The size of sorting-type storage chip 9 and bottom sorting-type storage chip 7, top layer sorting-type storage chip 9 and bottom sorting-type are deposited Storage chip 7 is bonded successively by the adhesive tape carried, and the tape thickness carried is 20~25 microns;The front of the lead frame 4 Adhesive tape layer 6 is provided with, the thickness of adhesive tape layer 6 is 20 microns, and pad chip 5 passes through adhesive tape layer 6 and the adhesion of lead frame 4;It is described Interconnection is provided between top layer sorting-type storage chip 9 and bottom sorting-type storage chip 7 and lead frame 4 is bonded gold Line 3, bonding gold thread 3 carry out the electric connection of chip using routing combination welding technique, and lead frame 4 is provided at both ends with plating Pin 8.
It the above is only concrete application example of the present utility model, do not form any limit to the scope of protection of the utility model System.All technical schemes formed using equivalent transformation or equivalent replacement, all fall within the utility model rights protection scope it It is interior.

Claims (5)

  1. A kind of 1. sorting-type storage chip encapsulating structure, it is characterised in that:Include lead frame(4), lead frame(4)Front It is provided with front potting resin(1), the back side is provided with back side potting resin(2), front potting resin(1)In be provided with storage core Lamella and pad chip layer(5), storage chip layer is stacked on pad chip layer(5)On, pad chip layer(5)It is arranged on lead frame Frame(4)On, storage chip layer and lead frame(4)Between be connected with bonding gold thread(3), lead frame(4)Be provided at both ends with Electroplate pin(8).
  2. 2. sorting-type storage chip encapsulating structure according to claim 1, it is characterised in that:The storage chip layer includes It is sequentially stacked on pad chip layer(5)On top layer sorting-type storage chip(9)With bottom sorting-type storage chip(7).
  3. 3. sorting-type storage chip encapsulating structure according to claim 1, it is characterised in that:The lead frame(4)'s Front is provided with adhesive tape layer(6), pad chip(5)Pass through adhesive tape layer(6)With lead frame(4)Adhesion.
  4. 4. sorting-type storage chip encapsulating structure according to claim 3, it is characterised in that:The adhesive tape layer(6)Thickness Spend for 20 microns.
  5. 5. sorting-type storage chip encapsulating structure according to claim 1, it is characterised in that:The pad chip layer(5) Size be more than storage chip layer.
CN201720660136.4U 2017-06-08 2017-06-08 A kind of sorting-type storage chip encapsulating structure Active CN206864462U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201720660136.4U CN206864462U (en) 2017-06-08 2017-06-08 A kind of sorting-type storage chip encapsulating structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201720660136.4U CN206864462U (en) 2017-06-08 2017-06-08 A kind of sorting-type storage chip encapsulating structure

Publications (1)

Publication Number Publication Date
CN206864462U true CN206864462U (en) 2018-01-09

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201720660136.4U Active CN206864462U (en) 2017-06-08 2017-06-08 A kind of sorting-type storage chip encapsulating structure

Country Status (1)

Country Link
CN (1) CN206864462U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020034386A1 (en) * 2018-08-14 2020-02-20 苏州德林泰精工科技有限公司 Stepped stacked chip packaging structure employing resin gasket and preparation process

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020034386A1 (en) * 2018-08-14 2020-02-20 苏州德林泰精工科技有限公司 Stepped stacked chip packaging structure employing resin gasket and preparation process
US11462448B2 (en) 2018-08-14 2022-10-04 Su Zhou Dream Technology Co., Ltd. Step-type stacked chip packaging structure based on resin spacer and preparation process

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