CN204928984U - Real -time image data collection system - Google Patents
Real -time image data collection system Download PDFInfo
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- CN204928984U CN204928984U CN201520508167.9U CN201520508167U CN204928984U CN 204928984 U CN204928984 U CN 204928984U CN 201520508167 U CN201520508167 U CN 201520508167U CN 204928984 U CN204928984 U CN 204928984U
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Abstract
The utility model discloses a real -time image data collection system, including image sensor, the sensor treater, buffer and controller, the clock module of controller provides the clock signal of image sensor and sensor treater, the input/output bush piece and the cooperation of multichannel buffering serial port of controller, analog sensor treater control word write in the chronogenesis into, writing in into of complete control word, adopt the EDMA mode to read the direct memory access module of the interior data of buffer to the controller, the clock interrupt setting of clock module is accomplished to the interrupt module of controller, this clock interrupt triggers the corresponding passageway of direct memory access module and accomplishes data reading, the controller adopts TMS320C6416. The utility model discloses real -time image data collection system is based on the TMS320C6416 controller, make full use of TMS320C6416 hardware resource, practiced thrift external interface and so on resource, the high -usage, simple structure, with low costs.
Description
Technical field
The utility model relates to a kind of acquisition system, specifically a kind of real time image data acquisition system.
Background technology
Along with the development of modern scientist, control system adopts DSP to control mostly, especially image data collection system, but existing image capturing system adopts a lot of interface circuit, chip circuit and various external memory storage to jointly control mostly, cause system configuration complicated, cost raises.
Utility model content
The purpose of this utility model is the real time image data acquisition system providing a kind of low cost, to solve the problem proposed in above-mentioned background technology.
For achieving the above object, the utility model provides following technical scheme:
A kind of real time image data acquisition system, comprise imageing sensor, sensor processor, buffer and controller, the clock module of controller provides the clock signal of imageing sensor and sensor processor, the input/output port module of controller and multiple tracks Buffered Serial mouth coordinate, the write timing of analog sensor processor control word, complete the write of control word, in employing EDMA mode read buffers, data are to the direct memory access module of controller, the interrupt module of controller completes the tick interrupt setting of clock module, this tick interrupt triggers direct memory access module respective channel and completes digital independent, described controller adopts TMS320C6416.
As further program of the utility model: described imageing sensor adopts SV253A4.
As further program of the utility model: described sensor processor adopts XRD98L23ACD.
As the utility model further scheme: described buffer adopts 74HC244.
Compared with prior art, the beneficial effects of the utility model are: the utility model real time image data acquisition system, based on TMS320C6416 controller, takes full advantage of TMS320C6416 hardware resource, save external interface etc. resource, utilance is high, and structure is simple, and cost is low.
Accompanying drawing explanation
Fig. 1 is the structural principle block diagram of real time image data acquisition system.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
Refer to Fig. 1, in the utility model embodiment, a kind of real time image data acquisition system, comprise imageing sensor, sensor processor, buffer and controller, the clock module of controller provides the clock signal of imageing sensor and sensor processor, the input/output port module of controller and multiple tracks Buffered Serial mouth coordinate, the write timing of analog sensor processor control word, complete the write of control word, in employing EDMA mode read buffers, data are to the direct memory access module of controller, the interrupt module of controller completes the tick interrupt setting of clock module, this tick interrupt triggers direct memory access module respective channel and completes digital independent, described controller adopts TMS320C6416.
Imageing sensor adopts SV253A4.
Sensor processor adopts XRD98L23ACD.
Buffer adopts 74HC244.
Operation principle of the present utility model is: refer to Fig. 1, after system electrification, TMS320C6416 writes control word by multiple tracks Buffered Serial mouth and input/output port module according to sensor processor XRD98L23ACD write timing, sensor processor is started working, input/output port module sends SP input signal, make the collection of imageing sensor begin column, clock module sends CP input signal module, imageing sensor is made to start to gather a point, produce tick interrupt event simultaneously, the tick interrupt event channel triggering direct memory access read module completes an EDMA operation, namely direct memory access read module is by external memory interface module enable buffer, read the digital signal through the converted collection point of sensor processor A/D, then trigger EDMA to interrupt, complete the data processing to collecting, amendment EDMA destination address and other calculating, after acquiring a line, send SP input signal and start new a line collection.
To those skilled in the art, obvious the utility model is not limited to the details of above-mentioned one exemplary embodiment, and when not deviating from spirit of the present utility model or essential characteristic, can realize the utility model in other specific forms.Therefore, no matter from which point, all should embodiment be regarded as exemplary, and be nonrestrictive, scope of the present utility model is limited by claims instead of above-mentioned explanation, and all changes be therefore intended in the implication of the equivalency by dropping on claim and scope are included in the utility model.Any Reference numeral in claim should be considered as the claim involved by limiting.
In addition, be to be understood that, although this specification is described according to execution mode, but not each execution mode only comprises an independently technical scheme, this narrating mode of specification is only for clarity sake, those skilled in the art should by specification integrally, and the technical scheme in each embodiment also through appropriately combined, can form other execution modes that it will be appreciated by those skilled in the art that.
Claims (4)
1. a real time image data acquisition system, comprise imageing sensor, sensor processor, buffer and controller, it is characterized in that, the clock module of controller provides the clock signal of imageing sensor and sensor processor, the input/output port module of controller and multiple tracks Buffered Serial mouth coordinate, the write timing of analog sensor processor control word, complete the write of control word, in employing EDMA mode read buffers, data are to the direct memory access module of controller, the interrupt module of controller completes the tick interrupt setting of clock module, this tick interrupt triggers direct memory access module respective channel and completes digital independent, described controller adopts TMS320C6416.
2. real time image data acquisition system according to claim 1, is characterized in that, described imageing sensor adopts SV253A4.
3. real time image data acquisition system according to claim 1, is characterized in that, described sensor processor adopts XRD98L23ACD.
4. real time image data acquisition system according to claim 1, is characterized in that, described buffer adopts 74HC244.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520508167.9U CN204928984U (en) | 2015-07-14 | 2015-07-14 | Real -time image data collection system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520508167.9U CN204928984U (en) | 2015-07-14 | 2015-07-14 | Real -time image data collection system |
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| Publication Number | Publication Date |
|---|---|
| CN204928984U true CN204928984U (en) | 2015-12-30 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201520508167.9U Expired - Fee Related CN204928984U (en) | 2015-07-14 | 2015-07-14 | Real -time image data collection system |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109738954A (en) * | 2019-03-14 | 2019-05-10 | 南方科技大学 | Clock synchronization circuit, clock synchronization method and ocean bottom seismograph |
-
2015
- 2015-07-14 CN CN201520508167.9U patent/CN204928984U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109738954A (en) * | 2019-03-14 | 2019-05-10 | 南方科技大学 | Clock synchronization circuit, clock synchronization method and ocean bottom seismograph |
| CN109738954B (en) * | 2019-03-14 | 2024-03-15 | 南方科技大学 | Clock synchronization circuit, clock synchronization method and submarine seismograph |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20151230 Termination date: 20170714 |