CN201812290U - High-speed data acquisition recorder based on disk array - Google Patents

High-speed data acquisition recorder based on disk array Download PDF

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Publication number
CN201812290U
CN201812290U CN2010205465708U CN201020546570U CN201812290U CN 201812290 U CN201812290 U CN 201812290U CN 2010205465708 U CN2010205465708 U CN 2010205465708U CN 201020546570 U CN201020546570 U CN 201020546570U CN 201812290 U CN201812290 U CN 201812290U
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China
Prior art keywords
chip
hard disk
interface
cpci
disk
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Expired - Fee Related
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CN2010205465708U
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Chinese (zh)
Inventor
张�浩
侯志安
汪冬
赵丽娟
董纯
韩艳
田文涛
康耀辉
朱国军
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XI'AN LEIXIN SCIENCE AND TECHNOLOGY Co Ltd
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XI'AN LEIXIN SCIENCE AND TECHNOLOGY Co Ltd
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Priority to CN2010205465708U priority Critical patent/CN201812290U/en
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Publication of CN201812290U publication Critical patent/CN201812290U/en
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Abstract

A high-speed data acquisition recorder based on a disk array comprises an acquisition control panel. The acquisition control panel is respectively connected with two hard disk boards through signals. The acquisition control panel comprises a first hard disk interface and a cache chip, a main control chip and a memory chip, which are connected in turn. The main control chip is respectively connected with an acquisition chip and a compact peripheral component interconnect (CPCI) bridge chip. The CPCI bridge chip is connected with a first CPCI interface. Each hard disk board comprises a second hard disk interface and a second CPCI interface. The second hard disk interface is respectively connected with a first hard disk, a second hard disk and the first hard disk interface. The first hard disk and the second hard disk respectively form the disk array. The utility model can acquire and store data at the same time, does not occupy computer resources and improves the acquisition and storage performance of data.

Description

A kind of high-speed data acquisition registering instrument based on disk array
Technical field
The utility model belongs to electronic data recording technique field, relates to a kind of data acquisition recorder, is specifically related to a kind of high-speed data acquisition registering instrument based on disk array.
Background technology
Data acquisition mainly is that the simulating signal of real world is carried out digital conversion, and gets off with the digital form stored record, promptly comprises gathering and the storage two large divisions.At present, in the high speed storing field, the collection of data and storage are two products independently, and the control of two kinds of functional products, transmission need take computer resource, greatly reduce the collection and the memory property of data.
Summary of the invention
In order to overcome above-mentioned problems of the prior art, the purpose of this utility model provides a kind of high-speed data acquisition registering instrument based on disk array, has simultaneously to gather and memory function, does not take computer resource, improves the collection and the memory property of data.
The technical scheme that the utility model adopted is, a kind of high-speed data acquisition registering instrument based on disk array, comprise acquisition controlling plate 1, acquisition controlling plate 1 is connected with two hard disk plate 2 signals respectively, acquisition controlling plate 1 comprises first hard-disk interface 9 and the cache chip 4 that is connected successively, main control chip 7 and storage chip 6, main control chip 7 is connected with CPCI bridge chip 5 with acquisition chip 3 respectively, CPCI bridge chip 5 is connected with a CPCI interface 8, hard disk plate 2 comprises second hard-disk interface 10 and the 2nd CPCI interface 13, second hard-disk interface 10 respectively with first hard disk 11, second hard disk 12 is connected with first hard-disk interface 9, and first hard disk 11 and second hard disk 12 constitute disk array respectively.
Main control chip 7 adopts programmable logic device (PLD).
Acquisition chip 3 adopts the A/D chip.
Cache chip 4 adopts synchronous dynamic random access memory.
CPCI bridge chip 5 adopts the industrial standard bridge chip.
The one CPCI interface 8 adopts standard C PCI connector.
Storage chip 6 adopts the SATA standard interface.
The utility model data acquisition recorder is integrated with collection, the storage of data, the convenient use; Adopt hardware controls, do not take computer resource; Adopt disk array to store, have high speed storing speed.
Description of drawings
Accompanying drawing is the structural representation of the utility model data acquisition recorder.
Among the figure, 1. acquisition controlling plate, 2. hard disk plate, 3. acquisition chip, 4. cache chip, 5.CPCI bridge chip, 6. storage chip, 7. main control chip, 8. a CPCI interface, 9. first hard-disk interface, 10. second hard-disk interface, 11. first hard disks, 12. second hard disks, 13. the 2nd CPCI interfaces.
Embodiment
Below in conjunction with the drawings and specific embodiments the utility model is elaborated.
As shown in drawings, the structure of the utility model acquisition and recording instrument comprises acquisition controlling plate 1, and acquisition controlling plate 1 is connected with two hard disk plate 2 signals respectively.
Acquisition controlling plate 1 comprises cache chip 4, main control chip 7 and the storage chip 6 that is connected successively, main control chip 7 is connected with CPCI bridge chip 5 with acquisition chip 3 respectively, CPCI bridge chip 5 is connected with a CPCI interface 8, and acquisition controlling plate 1 also comprises first hard-disk interface 9.
Hard disk plate 2 comprises that second hard-disk interface 10 and the 2nd CPCI interface 13, the second hard-disk interfaces 10 are connected with first hard-disk interface 9 with first hard disk 11, second hard disk 12 respectively.
Main control chip 7 adopts high performance programmable logic device (PLD) (FPGA).Monolithic FPGA can effectively reduce the complexity of system, improves the integrated level and the reliability of system.
Acquisition chip 3 adopts high performance A/D chip, realizes the high-speed figure conversion of simulating signal.
Cache chip 4 adopts the high performance synchronous dynamic storage, realizes high capacity, data cache, makes high-speed data obtain buffering before writing hard disk, effectively reduces hard-disc storage pressure.
CPCI bridge chip 5 adopts the bridge chip of industrial standard, and a CPCI interface 8 adopts standard C PCI connector, and CPCI bridge chip 5 links to each other with a CPCI interface 8, realizes high speed cpci bus interface.
Storage chip 6 adopts the SATA standard interface, and first hard-disk interface 9 is the high speed connector, and storage chip 6 links to each other with first hard-disk interface 9, realizes communicating by letter with the high-speed interface of hard disk.
The 2nd CPCI interface 13 provides power supply for first hard disk 11 and second hard disk 12.
Second hard-disk interface 10 is mainly first hard disk 11 and second hard disk 12 provides the high speed interface signal.
First hard disk 11 and second hard disk 12 constitute disk array, and writing speed is promoted significantly.
Principle of work of the present utility model:
During image data, upper computer software mails to main control chip 7 by a CPCI interface 8, CPCI bridge chip 5 with control command, main control chip 7 writes cache chip 4 according to command parameter with the data of acquisition chip 3 and carries out high-speed cache, simultaneously the data of cache chip 4 are read at a slow speed, and send into storage chip 6, storage chip 6 writes first hard disk 11 and second hard disk 12 in two hard disk plates 2 by first hard-disk interface 9 with data.During derived data, upper computer software mails to main control chip 7 by a CPCI interface 8, CPCI bridge chip 5 with control command, main control chip 7 is derived first hard disk 11 and second hard disk 12 of data from two hard disk plates 2 by storage chip 6, first hard-disk interface 9 according to command parameter, and the data of derivation are sent into computing machine by a CPCI bridge chip 5 and a CPCI interface 8.
The collection of the utility model data acquisition recorder collection data and be stored in one does not take computer resource, has improved the collection and the memory property of data.

Claims (7)

1. high-speed data acquisition registering instrument based on disk array, it is characterized in that, comprise acquisition controlling plate (1), acquisition controlling plate (1) is connected with two hard disk plates (2) signal respectively, the cache chip (4) that described acquisition controlling plate (1) comprises first hard-disk interface (9) and is connected successively, main control chip (7) and storage chip (6), main control chip (7) is connected with CPCI bridge chip (5) with acquisition chip (3) respectively, CPCI bridge chip (5) is connected with a CPCI interface (8), hard disk plate (2) comprises second hard-disk interface (10) and the 2nd CPCI interface (13), second hard-disk interface (10) respectively with first hard disk (11), second hard disk (12) is connected with first hard-disk interface (10), and described first hard disk (11) and second hard disk (12) constitute disk array respectively.
2. high-speed data acquisition registering instrument according to claim 1 is characterized in that, described main control chip (7) adopts programmable logic device (PLD).
3. high-speed data acquisition registering instrument according to claim 1 is characterized in that, described acquisition chip (3) adopts the A/D chip.
4. high-speed data acquisition registering instrument according to claim 1 is characterized in that, described cache chip (4) adopts synchronous dynamic random access memory.
5. high-speed data acquisition registering instrument according to claim 1 is characterized in that, described CPCI bridge chip (5) adopts the industrial standard bridge chip.
6. high-speed data acquisition registering instrument according to claim 1 is characterized in that, a described CPCI interface (8) adopts standard C PCI connector.
7. high-speed data acquisition registering instrument according to claim 1 is characterized in that, described storage chip (6) adopts the SATA standard interface.
CN2010205465708U 2010-09-27 2010-09-27 High-speed data acquisition recorder based on disk array Expired - Fee Related CN201812290U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2010205465708U CN201812290U (en) 2010-09-27 2010-09-27 High-speed data acquisition recorder based on disk array

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2010205465708U CN201812290U (en) 2010-09-27 2010-09-27 High-speed data acquisition recorder based on disk array

Publications (1)

Publication Number Publication Date
CN201812290U true CN201812290U (en) 2011-04-27

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CN2010205465708U Expired - Fee Related CN201812290U (en) 2010-09-27 2010-09-27 High-speed data acquisition recorder based on disk array

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CN (1) CN201812290U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112214426A (en) * 2020-09-25 2021-01-12 湖北三江航天红峰控制有限公司 VNX-based high-speed data recording module, data recording and analyzing method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112214426A (en) * 2020-09-25 2021-01-12 湖北三江航天红峰控制有限公司 VNX-based high-speed data recording module, data recording and analyzing method

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Granted publication date: 20110427

Termination date: 20130927