CN205620997U - Many high speed interface's high -speed serial bus storage device - Google Patents
Many high speed interface's high -speed serial bus storage device Download PDFInfo
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- CN205620997U CN205620997U CN201620355436.7U CN201620355436U CN205620997U CN 205620997 U CN205620997 U CN 205620997U CN 201620355436 U CN201620355436 U CN 201620355436U CN 205620997 U CN205620997 U CN 205620997U
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Abstract
The utility model discloses a many high speed interface's high -speed serial bus storage device. The utility model discloses a can not get in time saving that this problem goes on designing to high -speed data acquisition's data, providing 10, 000, 000, 000 ethernets, gigabit ethernet, RAPIDIO interface in the design, convenient data acquisition board with other carries out the interface butt joint. This is utilized the advantage that FPGA chip pin resource is abundant to that goes carries out read and write operations to 16 eMMC chips, has improved the read and write speed of whole board. Memory chip chooses the eMMC chip for use, utilizes the high reliability characteristics of eMMC chip itself to ensure whole board the reliability of the data. Because the interface standard of statistics is followed to the eMMC chip, accomplish the upgrading of storage device capacity and speed under the condition of not changing other hardware easily along with the development of eMMC technique.
Description
Technical field
This utility model belongs to digital signal processing technique field, realizes high speed storing plate based on eMMC storage chip particularly to utilizing FPGA.
Background technology
The development maked rapid progress along with information science technology, in modern real time signal processing field, in order to obtain more accurately effective information, necessarily needs
Obtain substantial amounts of data to process, and front high-speed data acquistion system is at radar, sonar, image procossing, speech recognition, communication, transient state letter
It is used widely in the fields such as number test.The degree of parallelism real-time producing mass data and data during sensor array work is the highest, it is therefore desirable at a high speed
Storage device data are stored.
Current most data-storage system is all traditional disk array RAID, disk array RAID from invention since, its memory capacity and
Reliability is all improving constantly, but this disk array RAID itself there is also some shortcomings: read or write speed is slow: traditional disk array RAID
Owing to using disc high speed rotating magnetic head as the reading manner of data, the addressing time is long, and read or write speed is slow;Stability is low: traditional magnetic disk array RAID
Frame for movement cause its head wear and cantilever deflection, and disk array can cause the instability of its service behaviour, at environment when being given a shock
Under conditions of E Lie inapplicable: power consumption is big: the machinery of traditional magnetic disk array RAID discs rotates and the radial motion of magnetic head all can be to a great extent
On cause disk array power consumption to increase.Additionally, along with improving constantly disk array access speed requirement, the rotating speed of disk array is also constantly
Accelerating, this can further result in disk array power consumption and increase.The most common hard-disc storage has been difficult to competent so high speed and the storage of continuous print data,
And sensor array is usually applied to harsh environment, common mechanical hard disk, harsh environment cannot be adapted to from volume and capacity of resisting disturbance and want
Ask, so needing design memory plane at a high speed to realize the storage demand that high bandwidth is stable in signal processor system.
To use NANDFLSH in the majority in the solution of high speed solid memory plane, NANDFLASH chip unit capacity price is low, read-write speed
Spend and constantly promoting.But due to the interface specification standard that NANDFLASH chip is the most unified, during use, must take into ECC check, bad block pipe
Reason and the problem such as load balance, will realize reliable and stable data and be stored on complexity and resource consumption and all there is a lot of inferior position.
EMMC is the embedded memory standard specifications ordered by MMC association, is primarily directed to mobile phone and mobile embedded product and designs.
EMMC is a kind of embedded non-volatile memory system, is made up of NAND FLASH and corresponding controller two parts.Owing to there being standard
Specification uses the encapsulation of standard, and eMMC is easy to upgrading, without changing hardware configuration during upgrading.ECC check, bad block management, load balance
Technology and low-power consumption management etc. are also easy to realize.So eMMC storage chip is easily operated and upgrading.Control multi-disc eMMC storage chip to improve
Bandwidth, expands capacity, and achieves the customization of multiple high-speed interface.
Summary of the invention
This utility model is that the data for high-speed data acquisition can not get storing this problem in time and are designed, and provides 10,000,000,000 ether in design
Net, gigabit Ethernet, RAPIDIO interface, conveniently carry out interface with other data acquisition board and dock.This utilizes fpga chip pin resource rich
Rich advantage, parallel is written and read operation, improves the read or write speed of imposite 16 eMMC chips.Storage chip selects eMMC chip,
The high reliability feature utilizing eMMC chip itself has ensured the reliability of imposite data.Owing to eMMC chip follows the interface standard of statistics, along with
The development of eMMC technology is easily accomplished the upgrading of capacity of memory device and speed in the case of not changing other hardware.
This utility model provide a kind of many high-speed interfaces high-speed serial bus storage device, including power module, power supply and temperature monitoring module, with
Too net physical chip, main control module, memory module, VPX standard connector, wherein power module is drawn from VPX standard connector, it is provided that whole
The power supply of plate, and being connected with power supply and temperature monitoring module, main control module to draw outside plate RAPIDIO interface, ten thousand mbit ethernet interfaces, gigabit with
Too network interface, gigabit ethernet interface through ethernet physical layer chip change after be connected with VPX standard connector, main control module in plate with storage
Module is connected, and controls the read-write operation of memory module, it is characterised in that described main control module includes order data processing unit, data distribution/converge
Total unit, ten thousand mbit ethernet modules, Gigabit Ethernet module, RAPIDIO module, storage control module, command process unit and ten thousand mbit ethernets
Module, Gigabit Ethernet module, RAPIDIO module are connected, and connect storage control module by data distribution/collection unit.
Preferably, can with FPGA as main control module, it is achieved the various functions of memory plane, ten thousand mbit ethernet modules, Gigabit Ethernet module,
RAPIDIO module realizes three kinds of external interfaces of memory plane respectively, and order data processing unit completes the parsing taken orders and coordinates data to distribute
/ collection unit processes.Data distribution/collection unit is distributed operation when receiving writing commands to data, and data are assigned to 16
EMMC chip stores, then sends read request to eMMC chip when receiving read command and the data obtained from eMMC control module are carried out
Collect packing.EMMC control module is controlled by data distribution/collection unit, and the instruction that reception data distribution/collection unit issues is converted into eMMC
The control of chip, the operation such as complete that the read-write of eMMMC chip is deleted.
Accompanying drawing explanation
Fig. 1 is hardware block diagram of the present utility model
Wherein, 1 is power module, provides stable supply voltage for imposite.
2 is power supply and temperature monitoring module, the temperature information of regional in the voltage x current information of the monitoring each power supply of imposite and plank.
3 is ethernet physical layer chip, provides 4 road gigabit Ethernet electricity mouth outputs.
4 is main control module, uses FPGA as the main control chip of this design.
5 is memory module, is the storage medium in design, preferably eMMC chip.
12 is VPX standard connector for P0-P6
Fig. 2 is main control module internal structure block diagram in this utility model
Wherein, 6 is ten thousand mbit ethernet modules, carries out 10,000,000,000 communications with other boards
7 is Gigabit Ethernet module, carries out gigabit communication with other boards
8 is RAPIDIO module, and the RAPIDIO carried out under X4 pattern with other boards communicates
9 is order data processing unit, processes the order from different links or data, order or data is resolved respectively, do for order
Go out different responses.
10 is data distribution/collection unit, completes the distribution of data and collects.
11 is eMMC control module, and the read-write etc. controlling every storage chip operates.
Detailed description of the invention
Preferably, main control module 4 described in the utility model uses fpga chip, and described memory element uses EMMC chip, four one group, and totally four
Group.
According to the usage amount of heterogeneous networks interface, improve service efficiency, it is preferable that described main control module to draw outside plate two-way RAPIDIO interface,
Two-way ten thousand mbit ethernet interface, 4 tunnel gigabit ethernet interfaces.
Power supply number is obtained by precision resistance and being applied in combination of INA230 for more preferably monitoring power work situation, described power supply and temperature monitoring module
According to, obtain temperature data by TMP100 chip, power supply and temperature data communicated with MCU by iic bus, the monitoring data after collecting
Host computer is mail to by IIC or serial ports.
Claims (4)
- null1. the high-speed serial bus storage device of high-speed interface more than a kind,Including power module (1)、Power supply and temperature monitoring module (2)、Ethernet physical layer chip (3)、Main control module (4)、Memory module (5)、VPX standard connector (12),Wherein power module (1) is drawn from VPX standard connector (12),The power supply of imposite is provided,And be connected with power supply and temperature monitoring module (2),Main control module (4) is to drawing ten thousand mbit ethernet interfaces outside plate、Gigabit ethernet interface、RAPIDIO interface,Gigabit ethernet interface is connected with VPX standard connector (12) after ethernet physical layer chip (3) is changed,Main control module (4) is connected with memory module (5) in plate,Control the read-write operation of memory module,It is characterized in that,Described main control module (4) includes order data processing unit (9),Data distribution/collection unit (10),Ten thousand mbit ethernet modules (6)、Gigabit Ethernet module (7)、RAPIDIO module (8),Storage control module (11),Command process unit (9) and ten thousand mbit ethernet modules (6)、Gigabit Ethernet module (7)、RAPIDIO module (8) is connected,And connect storage control module (11) by data distribution/collection unit (10).
- The high-speed serial bus storage device of a kind of many high-speed interfaces the most as claimed in claim 1, it is characterised in that described main control module (4) employing fpga chip, described memory element employing EMMC chip, four one group, totally four groups.
- The high-speed serial bus storage device of a kind of many high-speed interfaces the most as claimed in claim 2, it is characterised in that described main control module is to drawing two-way RAPIDIO interface, two-way ten thousand mbit ethernet interface, 4 tunnel gigabit ethernet interfaces outside plate.
- The high-speed serial bus storage device of a kind of many high-speed interfaces the most as claimed in claim 3, it is characterized in that, described power supply and temperature monitoring module obtain power data, by TMP100 chip acquisition temperature data by precision resistance and being applied in combination of INA230, power supply and temperature data are communicated with MCU by iic bus, and the monitoring data after collecting mail to host computer by IIC or serial ports.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105868145A (en) * | 2016-04-25 | 2016-08-17 | 北京中科海讯数字科技股份有限公司 | High-speed serial bus storage device provided with multiple high-speed interfaces |
CN107104847A (en) * | 2017-06-30 | 2017-08-29 | 山东超越数控电子有限公司 | A kind of RapidIO is exchanged and Ethernet exchanging unifies configuring management method |
-
2016
- 2016-04-25 CN CN201620355436.7U patent/CN205620997U/en active Active
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105868145A (en) * | 2016-04-25 | 2016-08-17 | 北京中科海讯数字科技股份有限公司 | High-speed serial bus storage device provided with multiple high-speed interfaces |
CN107104847A (en) * | 2017-06-30 | 2017-08-29 | 山东超越数控电子有限公司 | A kind of RapidIO is exchanged and Ethernet exchanging unifies configuring management method |
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