CN203025707U - Mass storage processor - Google Patents

Abstract

The utility model discloses a mass storage processor. The processor comprises a case and is characterized in that a power source, a backboard, and a host machine card, a high-speed data acquisition card and a storage array which are connected with the backboard, wherein all the components are installed in the case; the case is further provided with an analogue interface and a data interface; the analogue interface is connected with the super-high-speed data processing and acquisition card; and the data interface is connected with the host machine card. Preferably, the high-speed data acquisition card comprises at least two AD (Analog-Digital) converting chips connected in parallel. According to the utility mode, the storage array is used to store data, and thus the data storage capacity and the read-write speed are improved effectively; and a plurality of AD chips are used to perform parallel processing on data, and thus an analog signal processing bandwidth is enlarged.

Description

Large capacity storage processor

Technical field

The utility model belongs to computer communication field, relates to a kind of large capacity storage processor.

Background technology

In fields such as Aero-Space, geologic prospecting, environment monitorings, the data processing devices such as single-chip microcomputer of the collection of analog data signal to external world, storage and real-time Treatment Analysis have obtained extensive utilization, along with the degree of accuracy that data are processed, processing speed and storage capacity requirement are more and more higher, traditional single-chip microcomputer is subject to the restrictions such as volume, manufacturing process, be difficult to significantly promote at aspects such as capacity and processing speeds, can not satisfy more and more higher application requirements.

The utility model content

For overcoming conventional art to the processing speed of simulated data processing and the technological deficiency of off-capacity, the utility model provides a kind of large capacity storage processor.

Large capacity storage processor described in the utility model, comprise power supply, backboard and the host card that is connected with backboard, high-speed data acquisition card and storage array are installed in cabinet, described cabinet, also have analog interface and data-interface on described cabinet, described analog interface is connected with high-speed data acquisition card, and described data-interface is connected with host card.

Preferably, described high-speed data acquisition card comprises the AD conversion chip that at least two parallel modes connect.

Preferably, described cabinet is the CPCI cabinet.

Preferably, described data-interface includes but not limited to optical fiber interface, USB interface and Ethernet interface.

Preferably, described storage array comprises at least two storage cards that are connected with backboard separately separately.

Further, described storage card comprises integrated circuit board and the storage data-interface, storage medium chipset and the fpga chip group that are arranged on integrated circuit board; Described fpga chip group comprises maincenter FPGA and the collaborative FPGA that is connected with maincenter FPGA, and described maincenter FPGA is connected with the storage data-interface; Described storage medium chipset is connected with the fpga chip group.

Further, described storage medium chipset adopts NAND type Flash chip.

Further, described storage medium chipset is divided into identical two groups of quantity, adopts the ping-pong buffer structure.

Preferably, described large capacity storage processor comprises one of following at least feature:

A. described integrated circuit board is the 6U integrated circuit board that meets the CompactPCI standard;

B. described fpga chip group adopts Spartan6 series disposable type;

Adopt large capacity storage processor described in the utility model, adopt storage array that data are stored, effectively improved data storage capacity and read or write speed.Multi-disc ADC chip parallel data processing is adopted in the data collection, improved the analog signal processing bandwidth.

Description of drawings

Fig. 1 illustrates the structured flowchart of an embodiment of the utility model;

Fig. 2 illustrates the structured flowchart of an embodiment of storage card described in the utility model;

In each figure, the Reference numeral name is called: 1. analog interface 2. data-interfaces 3. are stored data-interfaces.

Embodiment

Below in conjunction with accompanying drawing, embodiment of the present utility model is described in further detail.

As shown in Figure 1, large capacity storage processor described in the utility model, comprise power supply, backboard and the host card that is connected with backboard, high-speed data acquisition card and storage array are installed in cabinet, described cabinet, also have analog interface 1 and data-interface 2 on described cabinet, described analog interface 1 be connected high-speed data acquisition card and connect, described data-interface 2 is connected with host card.

High-speed data acquisition card receives the simulated data that gathers by analog interface, built-in data processing chip passes to storage array by backboard after to the data analog to digital conversion, the user need to be to storage during data call, host card accesses the data of storage from storage array by backboard, from data-interface, data are sent out.For amplifying, storage array comprises at least two storage cards with the backboard parallel join.

For improving the processing speed to image data, described high-speed data acquisition card comprises the AD conversion chip that at least two parallel modes connect.To image data calibrate and splice after can realize picking rate more than 8GHz, and reach the dynamic range greater than 40dB.Be to guarantee the validity of storage data, start preferably begin according to outer triggering signal (realizing via the analog or digital detection module) when gathering to gather or to gatherer process in the data of buffer memory detect and begin when rear differentiation has signal to gather.

Compact PCI(Compact Peripheral Component Interconnect) be called for short CPCI, Chinese claims again compact PCI, is a kind of bus interface standards high reliability, highdensity advantage that International Industry Technological Problems In Computer Manufacturing person federation put forward in 1994.In addition, cpci bus has good shock resistance and air permeability, but also can make replacing and maintenance integrated circuit board very convenient from front panel plug integrated circuit board, and the utility model preferably is adopted as the CPCI cabinet, adopts the cpci bus interface that data are processed.

Concrete, described storage card comprises integrated circuit board and the storage data-interface 3, storage medium chipset and the fpga chip group that are arranged on integrated circuit board; Described fpga chip group comprises maincenter FPGA and the collaborative FPGA that is connected with maincenter FPGA, and described maincenter FPGA is connected with storage data-interface 3; Described storage medium chipset is connected with the fpga chip group.

Maincenter FPGA is the hinge of data receiver on storage card, distribution and transmission, and is preferred, and described storage medium chipset is divided into identical two groups of quantity, adopts the ping-pong buffer structure.

The ping-pong buffer structure is a kind of storage architecture well known to those skilled in the art, utilizes two identical storeies and corresponding steering logic to consist of the I/O memory buffer, and a ping-pong buffer structure comprises controller and two identical storeies.Wherein, controller and two storer control linkages realize the switching over function, with input traffic during by input data selection unit etc. ground with in distribution of flows to two storer.Coordinate by certain sequential, realize seamless buffer memory and the processing of data and save spatial cache.

Preferably, described data-interface includes but not limited to optical fiber interface, USB interface and Ethernet interface.To realize the reading and writing data of various peripherals.

Preferably, also comprise the analog detection chip that is connected with backboard, backboard and whole system are carried out analog signal detection, guarantee that system works is normal.

Fig. 2 illustrates a kind of embodiment of storage card described in the utility model, comprise integrated circuit board and the storage medium chipset and the fpga chip group that are arranged on integrated circuit board, described storage medium chipset adopts NAND type Flash chip, totally 128, one single chip memory capacity can reach 2TB, writes with sense data speed to reach 10Gb/S.128 NAND type Flash chips are divided into two groups, adopt soldier's pang syndeton between two groups, integrated circuit board is the 6U integrated circuit board that meets the CompactPCI standard, use the FPGA of Spartan6 serial model No. on plate, Spartan6 has abundant IO pin, and the ram in slice resource is very abundant, and three Spartan6 chips are connected by the high-speed-differential line respectively, realize the read-write operation of data.Comprise maincenter FPGA and the collaborative FPGA that is connected with maincenter FPGA, described maincenter FPGA is connected with storage data-interface 3; Described storage medium chipset is connected with the fpga chip group.

The method that in the utility model, the disclosed embodiments are described or the step of algorithm can directly use the software module of hardware, processor execution, and perhaps both combination is implemented.Software module can be placed in the storage medium of any other form known in random access memory (RAM), internal memory, ROM (read-only memory) (ROM), electrically programmable ROM, electrically erasable ROM, register, hard disk, moveable magnetic disc, CD-ROM or technical field.

previously described is each preferred embodiment of the present utility model, preferred implementation in each preferred embodiment is if not obviously contradictory or take a certain preferred implementation as prerequisite, each preferred implementation stack combinations is arbitrarily used, design parameter in described embodiment and embodiment is only the utility model proof procedure for clear statement utility model inventor, be not to limit scope of patent protection of the present utility model, scope of patent protection of the present utility model still is as the criterion with its claims, the equivalent structure that every utilization instructions of the present utility model and accompanying drawing content are done changes, in like manner all should be included in protection domain of the present utility model.

Claims (9)

1. large capacity storage processor, comprise cabinet, it is characterized in that: power supply, backboard and the host card that is connected with backboard, high-speed data acquisition card and storage array are installed in described cabinet, also have analog interface (1) and data-interface (2) on described cabinet, described analog interface (1) be connected high-speed data acquisition card and connect, described data-interface (2) is connected with host card.

2. large capacity storage processor as claimed in claim 1, it is characterized in that: described high-speed data acquisition card comprises the AD conversion chip that at least two parallel modes connect.

3. large capacity storage processor as claimed in claim 1, it is characterized in that: described cabinet is the CPCI cabinet.

4. large capacity storage processor as claimed in claim 1, it is characterized in that: described data-interface includes but not limited to optical fiber interface, USB interface and Ethernet interface.

5. large capacity storage processor as claimed in claim 1, it is characterized in that: described storage array comprises at least two storage cards that are connected with backboard separately separately.

6. large capacity storage processor as claimed in claim 5 is characterized in that: described storage card comprises integrated circuit board and is arranged on storage data-interface (3), storage medium chipset and fpga chip group on integrated circuit board; Described fpga chip group comprises maincenter FPGA and the collaborative FPGA that is connected with maincenter FPGA, and described maincenter FPGA is connected with storage data-interface (3); Described storage medium chipset is connected with the fpga chip group.

7. large capacity storage processor as claimed in claim 6, it is characterized in that: described storage medium chipset adopts NAND type Flash chip.

8. large capacity storage processor as claimed in claim 6 is characterized in that: described storage medium chipset is divided into identical two groups of quantity, adopts the ping-pong buffer structure.

9. large capacity storage processor as claimed in claim 6, it is characterized in that: described large capacity storage processor comprises one of following at least feature:

A. described integrated circuit board is the 6U integrated circuit board that meets the CompactPCI standard;

B. described fpga chip group adopts Spartan6 series.

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