CN203339161U - Radio frequency chip system grade packaging structure - Google Patents

Radio frequency chip system grade packaging structure Download PDF

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Publication number
CN203339161U
CN203339161U CN2013203719417U CN201320371941U CN203339161U CN 203339161 U CN203339161 U CN 203339161U CN 2013203719417 U CN2013203719417 U CN 2013203719417U CN 201320371941 U CN201320371941 U CN 201320371941U CN 203339161 U CN203339161 U CN 203339161U
Authority
CN
China
Prior art keywords
radio frequency
frequency chip
substrate
chip system
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2013203719417U
Other languages
Chinese (zh)
Inventor
金若虚
陆春荣
胡立栋
刘鹏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Li Cheng Technology (suzhou) Co Ltd
Original Assignee
Li Cheng Technology (suzhou) Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Li Cheng Technology (suzhou) Co Ltd filed Critical Li Cheng Technology (suzhou) Co Ltd
Priority to CN2013203719417U priority Critical patent/CN203339161U/en
Application granted granted Critical
Publication of CN203339161U publication Critical patent/CN203339161U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48095Kinked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Abstract

The utility model discloses a radio frequency chip system grade packaging structure. The radio frequency chip system grade packaging structure is characterized by comprising a base board having a top face and a bottom face opposite to the top face, at least one chip which is arranged on the top face of the base board, at least one element which is arranged on the top face of the base board, and insulation resin which is filled in a packaging space of the packaging structure. The radio frequency chip system grade packaging structure can realize integration of the radio frequency chip, an inductor and a capacitor in one enclosed element and has properties of small occupation space, high integration level and strong circuit signal.

Description

The radio frequency chip system-in-package structure
Technical field
The utility model belongs to SIP system in package technical field in semiconductor, is specifically related to a kind of by the system-in-package structure of components and parts and radio frequency chip integral packaging.
Background technology
In prior art because the surface mounting technology ability also is not applied in the encapsulation technology field, how reducing tin cream splashes, how overcoming the bonding wire problem caused because of external foreign matter is not resolved, so inductance, some components and parts such as electric capacity do not merge within a cavity with chip usually, each is independently components and parts encapsulation naturally, and finally on the PCB terminal substrate, form loop, each components and parts take up space greatly, integrated performance is general, owing to being single-chip package, utilance is low, can't reach system-level.
Summary of the invention
The purpose of this utility model is to provide a kind of by radio frequency chip, inductance, and electric capacity merges in airtight components and parts, and institute takes up space little, and integrated level is high, the system-in-package structure that circuit signal is strong.
For realizing above-mentioned utility model purpose, the utility model has adopted following technical scheme:
A kind of radio frequency chip system-in-package structure, is characterized in that, comprising:
One substrate, have a relative end face and a bottom surface;
At least one chip, be disposed on the end face of described substrate;
At least one components and parts, be disposed on the end face of described substrate;
The insulating resin of filling in the encapsulated space of encapsulating structure.
Further, also comprise multiple conducting wires, be electrically connected between chip and substrate, described wire is gold thread, adopts the routing combination technology.
Further, described chip is radio frequency chip.
Further, described components and parts are inductance or electric capacity.
Further, described chip and substrate, components and parts and substrate adhesive tape bonding.
Make the technological process of above-mentioned radio frequency chip system-in-package structure, comprise the following steps:
Electric capacity, inductance surface mount-> radio frequency chip grinds with cutting-> chip-stacked-> gold thread welding-> resin synthesize-> cutting.
Capacitor and inductor utilizes the tin cream surface mount; chip is ground to the thickness that encapsulation needs; and cut into discrete component; then connect chip and substrate by adhesive tape; the welding gold thread; connect chip and substrate electronic circuit, inner each device of the synthetic whole cavity protection of resin, finally be cut into single components and parts to the whole piece substrate.
Resolution system level encapsulation technology problem, comprise electric capacity, and the surface mount of inductance is controlled tin cream by special web plate, and accurately location, increase the techniques such as washing before the radio frequency chip welding, removes impurity, guarantees that radio frequency chip can encapsulate smoothly.
The utility model is higher in specification requirement, electric capacity particularly, the surface mount of inductance is controlled, one will guarantee planarization, two will guarantee tin cream stability in order to avoid have influence on follow-up chip package, this just needs special surface mounting technology and chip encapsulation technology to cooperatively interact, and finally reaches the encapsulation of system-level multifunctional product.
The utility model advantage:
Radio frequency chip system-in-package structure described in the utility model can be by radio frequency chip, inductance, and electric capacity merges in airtight components and parts, and institute takes up space little, and integrated level is high, and circuit signal is strong.
The accompanying drawing explanation
The profile that Fig. 1 is the utility model radio frequency chip system-in-package structure;
Wherein, 1, substrate, 2, chip, 3, components and parts, 4, gold thread, 5, insulating resin.
Embodiment
Below in conjunction with accompanying drawing and a preferred embodiment, the technical solution of the utility model is further described.
Embodiment:
As shown in Figure 1: a kind of radio frequency chip system-in-package structure comprises: a substrate 1 has a relative end face and a bottom surface; At least one chip 2, be disposed on the end face of described substrate 1; At least one components and parts 3, be disposed on the end face of described substrate 1; The insulating resin 5 of filling in the encapsulated space of encapsulating structure.
Also comprise multiple conducting wires, be electrically connected between chip and substrate, described wire is gold thread 4, adopts the routing combination technology.
Described chip 2 is radio frequency chip.Described components and parts 3 are inductance or electric capacity.
Described chip 2 is used adhesive tape bonding with substrate 1, components and parts 3 with substrate 1.
It is to be noted; as described above is only in order to explain the preferred embodiment of the utility model; not attempt is done any formal restriction to the utility model according to this; be with; all any modification or changes that the relevant the utility model of doing under identical utility model spirit is arranged, all must be included in the category that the utility model is intended to protection.

Claims (5)

1. a radio frequency chip system-in-package structure, is characterized in that, comprising:
One substrate, have a relative end face and a bottom surface;
At least one chip, be disposed on the end face of described substrate;
At least one components and parts, be disposed on the end face of described substrate;
The insulating resin of filling in the encapsulated space of encapsulating structure.
2. radio frequency chip system-in-package structure according to claim 1, is characterized in that, also comprises multiple conducting wires, is electrically connected between chip and substrate.
3. radio frequency chip system-in-package structure according to claim 2, is characterized in that, described chip is radio frequency chip.
4. radio frequency chip system-in-package structure according to claim 3, is characterized in that, described components and parts are inductance or electric capacity.
5. radio frequency chip system-in-package structure according to claim 4, is characterized in that, described chip and substrate, components and parts and substrate adhesive tape bonding.
CN2013203719417U 2013-06-26 2013-06-26 Radio frequency chip system grade packaging structure Expired - Fee Related CN203339161U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2013203719417U CN203339161U (en) 2013-06-26 2013-06-26 Radio frequency chip system grade packaging structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2013203719417U CN203339161U (en) 2013-06-26 2013-06-26 Radio frequency chip system grade packaging structure

Publications (1)

Publication Number Publication Date
CN203339161U true CN203339161U (en) 2013-12-11

Family

ID=49707823

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2013203719417U Expired - Fee Related CN203339161U (en) 2013-06-26 2013-06-26 Radio frequency chip system grade packaging structure

Country Status (1)

Country Link
CN (1) CN203339161U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105374804A (en) * 2015-12-08 2016-03-02 深圳佰维存储科技有限公司 Intelligent wearable device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105374804A (en) * 2015-12-08 2016-03-02 深圳佰维存储科技有限公司 Intelligent wearable device

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20131211

Termination date: 20210626

CF01 Termination of patent right due to non-payment of annual fee