CN204375722U - A kind of semiconductor package - Google Patents
A kind of semiconductor package Download PDFInfo
- Publication number
- CN204375722U CN204375722U CN201420838166.6U CN201420838166U CN204375722U CN 204375722 U CN204375722 U CN 204375722U CN 201420838166 U CN201420838166 U CN 201420838166U CN 204375722 U CN204375722 U CN 204375722U
- Authority
- CN
- China
- Prior art keywords
- lead frame
- heating panel
- chip
- line
- conductive insulating
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
The utility model discloses a kind of semiconductor package, a chip; One lead frame, described lead frame comprises metal base and metal pin; Described metal pin is connected by wire with described chip; One adhesive layer, described chip is bonded in one of metal base in described lead frame on the surface by described adhesive layer; One heat conductive insulating glue-line, is attached at another surface of metal base in described lead frame; One heating panel, is attached at heat conductive insulating glue-line; And a plastic packaging colloid, the non-radiating surface region of coating chip, adhesive layer, heat conductive insulating glue-line, lead frame and heating panel.The beneficial effects of the utility model are by using heat conductive insulating glue-line between heating panel and lead frame; heating panel can be combined with lead frame; the insulation of chip carrier and heating panel can be ensured; heat can be taken away by heating panel fast that simultaneously expose; simultaneously heating panel can absorb the heat that chip produces instantaneously and serves as heat sink, thus protect IC.
Description
Technical field
The utility model relates to technical field of semiconductors, particularly relates to a kind of semiconductor package.
Background technology
Semiconductor product is mainly used in high voltage field, owing to using the restriction needing product to meet UL standard (under ensureing high voltage, grid does not puncture with drain electrode and has enough creepage distances), must dielectric resin material be used to be encapsulated the metal base of product lead frame entirety and reach insulation object.
Lead frame is the basic material of semiconductor product encapsulation, and it plays as the chip carrier of integrated circuit the function served as bridge be connected with outer lead, takes into account the functions such as heat radiation and mechanical support simultaneously.The method of the metal base of dielectric resin material total incapsulation lead frame is adopted for reaching insulation requirements, because the resin material conductive coefficient of insulation only has 1/150 of lead frame, therefore the heat dispersion of lead frame can be affected, cause the heat dispersion of semiconductor product not good, will the useful life of semiconductor product chips be directly affects.
Utility model content
In view of this, the utility model embodiment provides a kind of semiconductor package, to solve technical problem of the prior art.
The utility model provides a kind of semiconductor package, comprises
One chip;
One lead frame, described lead frame comprises metal base and metal pin; Described metal pin is connected by wire with described chip;
One adhesive layer, described chip is bonded in one of metal base in described lead frame on the surface by described adhesive layer;
One heat conductive insulating glue-line, is attached at another surface of metal base in described lead frame;
One heating panel, is attached at heat conductive insulating glue-line; And
One plastic packaging colloid, the non-radiating surface region of coating chip, adhesive layer, heat conductive insulating glue-line, lead frame and heating panel.
Further, described chip has relative acting surface and non-active face, and the non-active face of chip is bonded on the surface of metal base by adhesive layer.
Further, the radiating surface of described heating panel exposes in air.
Further, the surface area of the radiating surface of described heating panel is greater than the surface area of heat conductive insulating glue-line.
Further, described heat conductive insulating glue-line have employed the resin glue of heat curing-type.
The beneficial effects of the utility model are: between heating panel with lead frame, use heat conductive insulating glue-line to be combined with lead frame by heating panel; the insulation of chip carrier and heating panel can be ensured; heat can be taken away by heating panel fast that expose; simultaneously heating panel can absorb the heat that chip produces instantaneously and serves as heat sink, thus protect IC.
Accompanying drawing explanation
By reading the detailed description done non-limiting example done with reference to the following drawings, other features, objects and advantages of the present utility model will become more obvious:
Fig. 1 is the structural representation of the utility model semiconductor package;
In figure:
1, chip 2, lead frame 3, metal base 4, metal pin 5, wire
6, adhesive layer 7, heat conductive insulating glue-line 8, heating panel 9, plastic packaging colloid
Embodiment
Below in conjunction with drawings and Examples, the utility model is described in further detail.Be understandable that, specific embodiment described herein only for explaining the utility model, but not to restriction of the present utility model.It also should be noted that, for convenience of description, illustrate only the part relevant to the utility model in accompanying drawing but not full content.
As shown in Figure 1, the utility model provides a kind of semiconductor package, comprises
One chip 1;
One lead frame 2, described lead frame 2 comprises metal base 3 and metal pin 4; Described metal pin 4 is connected by wire 5 with described chip 1;
One adhesive layer 6, described chip 1 is bonded in one of metal base 3 in described lead frame 2 on the surface by described adhesive layer 6;
One heat conductive insulating glue-line 7, is attached at another surface of metal base 3 in described lead frame 2;
One heating panel 8, is attached at heat conductive insulating glue-line 7; And
One plastic packaging colloid 9, the non-radiating surface region of coating chip 1, adhesive layer 6, heat conductive insulating glue-line 7, lead frame 2 and heating panel 8, wherein said adhesive body 9 have employed epoxy resin; The radiating surface of heating panel 8 is the surface of the heating panel 8 exposed in air, and the radiating surface of heating panel 8 is not coated by plastic packaging colloid 9 institute, can in time and the external world carry out exchange heat, dispel the heat.
Concrete, chip 1 has relative acting surface and non-active face, and the non-active face of chip 1 is bonded in one of metal base 3 on the surface by adhesive layer 6, wherein, the acting surface of described chip 1 is provided with electronic building brick, and the acting surface of described chip is not provided with electronic building brick; By such mode, chip 1 is fixed on lead frame 2.
Described heat conductive insulating glue-line 7 have employed thermosetting resin glue, and heating panel 8 and lead frame 2 can combine by the resin glue of such heat curing-type, and on the one hand, the heat that chip 1 can be produced passes to heating panel 8 fast; On the other hand, because lead frame 2 has the function of heat radiation, therefore the combination of heating panel 8 and lead frame 2, lead frame 2 and heating panel 8 are dispelled the heat simultaneously, and then protect IC 1.
The surface area of the radiating surface of described heating panel 8 is greater than the surface area of heat conductive insulating glue-line 7; The radiating surface of described heating panel 8 exposes in air, and heat can be taken away by heating panel 8 fast that in use expose, and simultaneously heating panel 8 can absorb the heat that chip 1 produces and serves as heat sink, thus protect IC 1.Surface area due to the radiating surface of heating panel 8 is greater than the surface area of heat conductive insulating glue-line 7, adds the area of heat radiation, and therefore the rate of heat dispation of heating panel 8 is very fast, is taken away fast by heat, protects chip 1.
Note, above are only preferred embodiment of the present utility model and institute's application technology principle.Skilled person in the art will appreciate that the utility model is not limited to specific embodiment described here, various obvious change can be carried out for a person skilled in the art, readjust and substitute and protection range of the present utility model can not be departed from.Therefore, although be described in further detail the utility model by above embodiment, but the utility model is not limited only to above embodiment, when not departing from the utility model design, can also comprise other Equivalent embodiments more, and scope of the present utility model is determined by appended right.
Claims (5)
1. a semiconductor package, is characterized in that, comprises
One chip;
One lead frame, described lead frame comprises metal base and metal pin; Described metal pin is connected by wire with described chip;
One adhesive layer, described chip is bonded in one of metal base in described lead frame on the surface by described adhesive layer;
One heat conductive insulating glue-line, is attached at another surface of metal base in described lead frame;
One heating panel, is attached at heat conductive insulating glue-line; And
One plastic packaging colloid, the non-radiating surface region of coating chip, adhesive layer, heat conductive insulating glue-line, lead frame and heating panel.
2. semiconductor package according to claim 1, is characterized in that, described chip has relative acting surface and non-active face, and the non-active face of chip is bonded on the surface of metal base by adhesive layer.
3. semiconductor package according to claim 1, is characterized in that, the radiating surface of described heating panel exposes in air.
4. semiconductor package according to claim 1, is characterized in that, the surface area of the radiating surface of described heating panel is greater than the surface area of heat conductive insulating glue-line.
5. semiconductor package according to claim 1, is characterized in that, described heat conductive insulating glue-line have employed the resin glue of heat curing-type.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420838166.6U CN204375722U (en) | 2014-12-23 | 2014-12-23 | A kind of semiconductor package |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420838166.6U CN204375722U (en) | 2014-12-23 | 2014-12-23 | A kind of semiconductor package |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204375722U true CN204375722U (en) | 2015-06-03 |
Family
ID=53331917
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420838166.6U Active CN204375722U (en) | 2014-12-23 | 2014-12-23 | A kind of semiconductor package |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204375722U (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105632947A (en) * | 2015-12-24 | 2016-06-01 | 合肥祖安投资合伙企业(有限合伙) | Semiconductor device packaging structure and manufacturing method thereof |
| CN106684065A (en) * | 2016-09-07 | 2017-05-17 | 四川上特科技有限公司 | Novel integrated Mini rectifier bridge structure and fabrication process thereof |
| CN106920785A (en) * | 2017-03-29 | 2017-07-04 | 江苏长电科技股份有限公司 | A kind of manufacturing process of interior insulation encapsulating structure |
| CN106935520A (en) * | 2017-03-29 | 2017-07-07 | 江苏长电科技股份有限公司 | A kind of interior insulation encapsulating structure and its manufacturing process |
| CN107045989A (en) * | 2016-12-20 | 2017-08-15 | 杰群电子科技（东莞）有限公司 | The method for packing and encapsulating structure of a kind of semiconductor element |
-
2014
- 2014-12-23 CN CN201420838166.6U patent/CN204375722U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105632947A (en) * | 2015-12-24 | 2016-06-01 | 合肥祖安投资合伙企业(有限合伙) | Semiconductor device packaging structure and manufacturing method thereof |
| CN106684065A (en) * | 2016-09-07 | 2017-05-17 | 四川上特科技有限公司 | Novel integrated Mini rectifier bridge structure and fabrication process thereof |
| CN107045989A (en) * | 2016-12-20 | 2017-08-15 | 杰群电子科技（东莞）有限公司 | The method for packing and encapsulating structure of a kind of semiconductor element |
| CN106920785A (en) * | 2017-03-29 | 2017-07-04 | 江苏长电科技股份有限公司 | A kind of manufacturing process of interior insulation encapsulating structure |
| CN106935520A (en) * | 2017-03-29 | 2017-07-07 | 江苏长电科技股份有限公司 | A kind of interior insulation encapsulating structure and its manufacturing process |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |