CN203133691U - Server computation node based on CPCI framework - Google Patents
Server computation node based on CPCI framework Download PDFInfo
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- CN203133691U CN203133691U CN 201320140664 CN201320140664U CN203133691U CN 203133691 U CN203133691 U CN 203133691U CN 201320140664 CN201320140664 CN 201320140664 CN 201320140664 U CN201320140664 U CN 201320140664U CN 203133691 U CN203133691 U CN 203133691U
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Abstract
The utility model provides a server computation node base on a CPCI (compact peripheral component interconnect) framework. The structure adopted by the utility model comprises a PCB (printed circuit board), wherein a PCIESWITCH chip is arranged on the PCB and is connected with an orthogonal connector, a network card chip, a first IC (integrated circuit) chip, a second IC chip and a CPU (central processing unit) in a wiring manner; the CPU is connected with a memory bar and an RJ 45 interface in the wiring manner; the network card chip is connected with the orthogonal connector; the first IC chip is connected with a display card which is connected with the orthogonal connector in a communication manner through a VGA (video graphics array) signal; and the second IC chip is connected with a USB interface, the orthogonal connector and the display card in a communication manner through a USB signal. Compared with the prior art, the server computation node based on the CPCI framework has the characteristics of reasonable design, simple structure, convenience in use and the like, the integrated structure is easy to achieve, the assembling and mounting are convenient, and the popularization is easy.
Description
Technical field
The utility model relates to field of computer technology, specifically a kind of simple in structure, based on the server computing node of CPCI framework.
Background technology
Server (server) provides specific service for each different terminating machine in network system, as database service, file storage service, print service, Email and web service etc., server is for realizing the above-mentioned function that specific service is provided for many station terminals machine, must possess and to handle request and information and the appropriate ability of making response that many station terminals machine sends simultaneously, therefore on the hardware in order to receive the information that many station terminals machine sends, server must be installed many group input/output port, then must manage the information that many station terminals machine sends on software.
Along with development of technology and development, except above-mentioned must technology, also ready to appear based on the server computing node of CPCI framework, especially under the prerequisite based on homemade chip development, as homemade various cpu chips: Godson processor, FT1000 processor etc.
Summary of the invention
Technical assignment of the present utility model is to solve the deficiencies in the prior art, provide a kind of simple in structure, based on the server computing node of CPCI framework.
The technical solution of the utility model realizes in the following manner, this a kind of server computing node based on the CPCI framework, its structure comprises printed circuit board (PCB), described printed circuit board (PCB) is provided with PCIE SWITCH chip, orthogonal connector, network card chip, video card, IC chip one, IC chip two, clock synthesizer, USB interface, the RJ45 interface, CPLD, CPU, at least two memory bars, described PCIE SWITCH chip wiring is connected with orthogonal connector, network card chip, IC chip one, IC chip two and CPU, this CPU wiring connects memory bar and RJ45 interface, network card chip is connected with orthogonal connector, IC chip one is connected with video card, video card is connected to orthogonal connector by VGA signal communication link, and IC chip two is connected to USB interface by the usb signal communication link, orthogonal connector and video card.
Orthogonal connector in this technical scheme is the CPCI high speed connector.
Described PCIE SWITCH chip connects orthogonal connector by a PCIE X1, a PCIEX4 slot; Connect CPU by a PCIE X8 slot; Connect network card chip by a PCIE X4 slot; Connect IC chip one by a PCIE X1 slot; Connect IC chip two by a PCIE X1 slot.
Described CPU refers to homemade FT1000 processor.
In sum, the beneficial effect that compared with prior art produces of the utility model is:
A kind of server computing node based on the CPCI framework of the present utility model has characteristics such as simple in structure, easy to use, novel, one-piece construction is easy to realize, make up easy for installation, realized that homemade CPU platform application is in the technology of CPCI IA frame serverPC, improve the competitive power of server on homemade CPU platform, thereby have good value for applications.
Description of drawings
Accompanying drawing 1 is structural representation block diagram of the present utility model.
Mark in the accompanying drawing is represented respectively:
1, printed circuit board (PCB), 2, PCIE SWITCH chip, 3, orthogonal connector, 4, network card chip, 5, video card, 6, IC chip one, 7, IC chip two, 8, clock synthesizer, 9, USB interface, 10, the RJ45 interface, 11, CPLD, 12, CPU, 13, memory bar.
Embodiment
Below in conjunction with accompanying drawing a kind of server computing node based on the CPCI framework of the present utility model is done following detailed description the in detail.
As shown in Figure 1, this a kind of server computing node based on the CPCI framework, its structure comprises printed circuit board (PCB) 1, described printed circuit board (PCB) 1 is provided with PCIE SWITCH chip 2, orthogonal connector 3, network card chip 4, video card 5, IC chip 1, IC chip 27, clock synthesizer 8, USB interface 9, RJ45 interface 10, CPLD11, CPU12, at least two memory bars 13, described PCIE SWITCH chip 2 wirings are connected with orthogonal connector 3, network card chip 4, IC chip 1, IC chip 27 and CPU12, this CPU12 wiring connects memory bar 13 and RJ45 interface 10, network card chip 4 is connected with orthogonal connector 3, IC chip 1 is connected with video card 5, video card 5 is connected to orthogonal connector 3 by VGA signal communication link, and IC chip 27 is connected to USB interface 9 by the usb signal communication link, orthogonal connector 3 and video card 5.
Described PCIE SWITCH chip 2 connects orthogonal connector 3 by a PCIE X1, a PCIEX4 slot; Connect CPU12 by a PCIE X8 slot; Connect network card chip 4 by a PCIE X4 slot; Connect IC chip 1 by a PCIE X1 slot; Connect IC chip 27 by a PCIE X1 slot.
Described CPU12 refers to homemade FT1000 processor.
Embodiment: the model that PCIE SWITCH chip 2 adopts is PEX8632, network card chip 4 adopts PCI-Express chip Intel 82576, it is PI7C9X111SL that IC chip 1 adopts model, and it is PI7C9X440SL that IC chip 27 adopts model, and it is CK 420BQ that clock synthesizer 8 adopts model.
Like this, the CPCI high speed connector mainly is responsible for each node and is carried out signal with IO plate, management board etc. and be connected communication; The FT1000 processor calculates and control module as this framework; Connect PCIE switch chip by the PCIE interface and expand the PCIE bus apparatus, reach expansion IO purpose; The PCIE bus apparatus comprises: 82576 pairs of PCI-Express of Intel, PCIE to PCI bridge sheet, PCIE to SATA bridge sheet, PCIE to USB bridge sheet etc.; And carry out system sequence by a CPLD chip and control; By the monitoring of substrate controller realization to computing node; An external USB interface can connect USB device; The RJ45 debug serial port can be debugged CPU and BMC system; The CPCI baffle plate is to satisfy the CPCI standard
Described orthogonal connector is used for connecting gigabit switch, the IO plate, and management boards etc. are in order to form whole C PCI IA frame serverPC system.
Except the described technical characterictic of instructions, be the known technology of those skilled in the art.
Claims (3)
1. server computing node based on the CPCI framework, it is characterized in that: its structure comprises printed circuit board (PCB), described printed circuit board (PCB) is provided with PCIE SWITCH chip, orthogonal connector, network card chip, video card, IC chip one, IC chip two, clock synthesizer, USB interface, the RJ45 interface, CPLD, CPU, at least two memory bars, described PCIE SWITCH chip wiring is connected with orthogonal connector, network card chip, IC chip one, IC chip two and CPU, this CPU wiring connects memory bar and RJ45 interface, network card chip is connected with orthogonal connector, IC chip one is connected with video card, video card is connected to orthogonal connector by VGA signal communication link, and IC chip two is connected to USB interface by the usb signal communication link, orthogonal connector and video card.
2. a kind of server computing node based on the CPCI framework according to claim 1 is characterized in that: described PCIE SWITCH chip connects orthogonal connector by a PCIE X1, a PCIEX4 slot; Connect CPU by a PCIE X8 slot; Connect network card chip by a PCIE X4 slot; Connect IC chip one by a PCIE X1 slot; Connect IC chip two by a PCIE X1 slot.
3. a kind of server computing node based on the CPCI framework according to claim 1, it is characterized in that: described CPU refers to homemade FT1000 processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320140664 CN203133691U (en) | 2013-03-26 | 2013-03-26 | Server computation node based on CPCI framework |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320140664 CN203133691U (en) | 2013-03-26 | 2013-03-26 | Server computation node based on CPCI framework |
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| Publication Number | Publication Date |
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| CN203133691U true CN203133691U (en) | 2013-08-14 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN 201320140664 Expired - Fee Related CN203133691U (en) | 2013-03-26 | 2013-03-26 | Server computation node based on CPCI framework |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104753720A (en) * | 2015-03-26 | 2015-07-01 | 浪潮集团有限公司 | PCIE SWITCH-based multi-interface functional module |
| CN105320213A (en) * | 2014-06-06 | 2016-02-10 | 上海锋金电子科技有限公司 | High-speed single board computer system based on compact peripheral component interconnect (CPCI) structure |
| CN105334920A (en) * | 2015-10-29 | 2016-02-17 | 上海飞斯信息科技有限公司 | PCIE general signal switching board |
| CN109213717A (en) * | 2018-08-31 | 2019-01-15 | 北京计算机技术及应用研究所 | The twinbridge piece framework of domestic Feiteng processor |
| CN109947682A (en) * | 2019-03-21 | 2019-06-28 | 浪潮商用机器有限公司 | A kind of server master board and server |
-
2013
- 2013-03-26 CN CN 201320140664 patent/CN203133691U/en not_active Expired - Fee Related
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105320213A (en) * | 2014-06-06 | 2016-02-10 | 上海锋金电子科技有限公司 | High-speed single board computer system based on compact peripheral component interconnect (CPCI) structure |
| CN104753720A (en) * | 2015-03-26 | 2015-07-01 | 浪潮集团有限公司 | PCIE SWITCH-based multi-interface functional module |
| CN105334920A (en) * | 2015-10-29 | 2016-02-17 | 上海飞斯信息科技有限公司 | PCIE general signal switching board |
| CN105334920B (en) * | 2015-10-29 | 2019-03-12 | 上海飞斯信息科技有限公司 | A kind of PCIE universal signal power board |
| CN109213717A (en) * | 2018-08-31 | 2019-01-15 | 北京计算机技术及应用研究所 | The twinbridge piece framework of domestic Feiteng processor |
| CN109947682A (en) * | 2019-03-21 | 2019-06-28 | 浪潮商用机器有限公司 | A kind of server master board and server |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130814 Termination date: 20160326 |