CN202363449U - Flip chip packaging structure - Google Patents

Flip chip packaging structure Download PDF

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Publication number
CN202363449U
CN202363449U CN2011204879838U CN201120487983U CN202363449U CN 202363449 U CN202363449 U CN 202363449U CN 2011204879838 U CN2011204879838 U CN 2011204879838U CN 201120487983 U CN201120487983 U CN 201120487983U CN 202363449 U CN202363449 U CN 202363449U
Authority
CN
China
Prior art keywords
projection
wafer
quasi
protruding blocks
plan
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2011204879838U
Other languages
Chinese (zh)
Inventor
彭兰兰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN2011204879838U priority Critical patent/CN202363449U/en
Application granted granted Critical
Publication of CN202363449U publication Critical patent/CN202363449U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Packaging Frangible Articles (AREA)

Abstract

The present utility model discloses a flip chip packaging structure which comprises a wafer, a soft loader and a bottom glue layer, the soft loader comprises a soft substrate and a line layer arranged on the soft substrate, a plurality of welding pads and quasi welding pads are arranged on the lower surface of the wafer, the welding pads and the quasi welding pads are respectively provided with a plurality of protruding blocks and quasi protruding blocks, the blocks are electrically connected with the soft substrate through the line layer; the bottom glue layer is used for wrapping the protruding blocks and the quasi protruding blocks, thus the protruding blocks and the quasi protruding blocks can be prevented from being damaged. The structure is simple in structure and reasonable in design, the reliability of the flip chip packaging structure can be effectively enhanced, and the market value is huge.

Description

A kind of composite packing structure
Technical field
The utility model relates to a kind of composite packing structure, especially a kind of wafer is overlying on the composite packing structure on the soft carrier.
Background technology
Owing to cover the chip package structure that brilliant combination technology can be applicable to the high pin number, and have plurality of advantages such as the package area of dwindling and shortening signal transmission path, make the chip package technology be widely used in the wafer package field at present.
Existing composite packing structure comprises wafer, soft carrier, a plurality of projection and base angle layer; Owing to will between wafer and soft carrier, pour into a mould the primer material to form the primer layer that coats projection; The primer material can't be full of between wafer and soft carrier fully, makes primer layer have a plurality of holes, yet; Primer layer has a plurality of holes will make primer layer can't coat projection fully; Department's projection is exposed in the environment, and projection receives ectocine easily and produces the crack, and then has influence on the reliability of composite packing structure.
Therefore, prior art awaits improving and improving.
Summary of the invention
In view of this, the purpose of the utility model is the design that a plurality of plan projections are set through the surface at wafer, and a kind of deflection that reduces soft carrier is provided, and then reduces the composite packing structure that the hole in the primer layer produces.
For achieving the above object; The utility model is realized through following technological means: a kind of composite packing structure comprises wafer, soft carrier and primer layer; Described soft carrier comprises flexible base plate and is arranged at the line layer on the flexible base plate; The lower surface of described wafer is provided with a plurality of weld pads and a plurality of plan weld pad, and those weld pads are respectively equipped with a plurality of projections and a plurality of plan projection with intending on the weld pad, and those projections electrically connect through line layer and flexible base plate with the plan projection; Described primer layer coats projection and intends projection, prevents that projection and plan projection are damaged.
Compared with prior art, the beneficial effect of the utility model is: owing on the surface of wafer a plurality of plan projections are set, these are intended projection and in the process of wafer and the electric connection of soft carrier, help the areal deformation amount of soft carrier more not obvious; When forming primer layer when the space that is surrounded between primer material injection wafer and the soft carrier, the primer material can inject smooth-goingly, thereby can reduce the probability of the inside formation hole of primer layer, and then improves the yield that drips the glue filling process.The utility model is simple in structure, and is reasonable in design, improves the reliability of composite packing structure effectively, has huge market value.
Description of drawings
Accompanying drawing 1 is the structural representation of a kind of composite packing structure of the utility model.
Each label is respectively among the figure: (1) wafer, and (2) flexible base plate, (3) line layer, (4) weld pad, (5) projection, projection is intended in (6), (7) primer layer, weld pad is intended in (8).
Embodiment
Below in conjunction with accompanying drawing the utility model is done further to specify:
Referring to Fig. 1; A kind of composite packing structure of the utility model comprises wafer 1, soft carrier and primer layer 7; Described soft carrier comprises flexible base plate 2 and is arranged at the line layer 3 on the flexible base plate 2; The lower surface of described wafer 1 is provided with a plurality of weld pads 4 and a plurality of plan weld pads 8, and those weld pads 4 are respectively equipped with a plurality of projections 5 and a plurality of plan projections 6 with intending on the weld pad 8, and those projections 5 electrically connect through line layer 3 and flexible base plate 2 with plan projection 6; Described primer layer 7 coats projection 5 and intends projection 6, prevents that projection 5 and plan projection 6 are damaged.
The above; It only is the preferred embodiment of the utility model; Be not that the utility model is done any pro forma restriction; Any professional and technical personnel of being familiar with possibly utilize the technology contents of above-mentioned announcement to change or be modified to the equivalent embodiment of equivalent variations; But all the utility model technical scheme contents that do not break away from, all still belong in the scope of the utility model technical scheme any simple modification, equivalent variations and modification that above embodiment did according to the technical spirit of the utility model.

Claims (1)

1. composite packing structure; Comprise wafer; Soft carrier and primer layer is characterized in that: described soft carrier comprises flexible base plate and is arranged at the line layer on the flexible base plate that the lower surface of described wafer is provided with a plurality of weld pads and a plurality of plan weld pad; Those weld pads are respectively equipped with a plurality of projections and a plurality of plan projection with intending on the weld pad, and those projections electrically connect through line layer and flexible base plate with the plan projection; Described primer layer coats projection and intends projection, prevents that projection and plan projection are damaged.
CN2011204879838U 2011-11-30 2011-11-30 Flip chip packaging structure Expired - Fee Related CN202363449U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2011204879838U CN202363449U (en) 2011-11-30 2011-11-30 Flip chip packaging structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2011204879838U CN202363449U (en) 2011-11-30 2011-11-30 Flip chip packaging structure

Publications (1)

Publication Number Publication Date
CN202363449U true CN202363449U (en) 2012-08-01

Family

ID=46574612

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2011204879838U Expired - Fee Related CN202363449U (en) 2011-11-30 2011-11-30 Flip chip packaging structure

Country Status (1)

Country Link
CN (1) CN202363449U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106971949A (en) * 2016-01-14 2017-07-21 中芯国际集成电路制造(上海)有限公司 A kind of semiconductor devices and its manufacture method and electronic installation

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106971949A (en) * 2016-01-14 2017-07-21 中芯国际集成电路制造(上海)有限公司 A kind of semiconductor devices and its manufacture method and electronic installation
CN106971949B (en) * 2016-01-14 2019-06-28 中芯国际集成电路制造(上海)有限公司 A kind of semiconductor devices and its manufacturing method and electronic device

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Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20120801

Termination date: 20121130