CN202307889U - High-power LED (Light Emitting Diode) integrated package structure - Google Patents

High-power LED (Light Emitting Diode) integrated package structure Download PDF

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Publication number
CN202307889U
CN202307889U CN 201120421380 CN201120421380U CN202307889U CN 202307889 U CN202307889 U CN 202307889U CN 201120421380 CN201120421380 CN 201120421380 CN 201120421380 U CN201120421380 U CN 201120421380U CN 202307889 U CN202307889 U CN 202307889U
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CN
China
Prior art keywords
layer
power led
integrated package
chip
chips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
CN 201120421380
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Chinese (zh)
Inventor
支柱
屈军毅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SHENZHEN LEYOND OPTO ELECTRONICS CO Ltd
Original Assignee
SHENZHEN LEYOND OPTO ELECTRONICS CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SHENZHEN LEYOND OPTO ELECTRONICS CO Ltd filed Critical SHENZHEN LEYOND OPTO ELECTRONICS CO Ltd
Priority to CN 201120421380 priority Critical patent/CN202307889U/en
Application granted granted Critical
Publication of CN202307889U publication Critical patent/CN202307889U/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

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  • Led Device Packages (AREA)

Abstract

The utility model discloses a high-power LED (Light Emitting Diode) integrated package structure, which comprises a layer of bracket copper base plate, and is characterized in that: the bracket copper base plate is covered by a silicon substrate layer; the silicon substrate layer is also covered by an insulating layer; the insulating layer is covered by a silver plating layer; the silver plating layer is provided with a circuit board and is provided with a plurality of chips; positive and negative electrodes of the chips are connected with the circuit board on the silver plating layer through metal wires and the chips are covered by silica gel layers; and the chips and air are isolated and sealed by the silica gel layers. The high-power LED integrated package structure is mainly applied to the LED package technology, so that the problem of arrangement of the chips during high-power LED integrated package is solved; and according to the high-power LED integrated package structure, the direct application of the metal wires for connecting the chips in series during the integrated package can be avoided, so that the service life and the stability of the high-power LED integrated package of an LED are improved.

Description

A kind of great power LED integrated encapsulation structure
[technical field]
The utility model relates to a kind of great power LED integrated encapsulation structure.
[background technology]
The integrated encapsulation of original high-power LED chip; All be to adopt gold thread directly the both positive and negative polarity of two different chips to be linked together when chip is connected; Like this because gold thread binding machine pressure when cutting off gold thread is bigger; Act directly on the chip, can certain damage be arranged to chip, said defective value must improve.
[utility model content]
The purpose of the utility model is to the above-mentioned defective of telling; A kind of great power LED integrated encapsulation structure is provided; The utility model is mainly used in the LED encapsulation technology; The arrangement problems of chip when mainly solving the integrated encapsulation of great power LED, the utility model purpose are to avoid chip chip series connection when integrated encapsulation directly to use gold thread to connect, thereby reach useful life and the stability that improves the integrated encapsulation of LED great power LED.
The technical scheme of the utility model is following: a kind of great power LED integrated encapsulation structure; Comprise one deck support copper base, it is characterized in that, cover one deck layer-of-substrate silicon on the described support copper base; Cover a layer insulating on the described layer-of-substrate silicon again; Described coated insulating layer lid layer silver coating, described silver coating are provided with circuit board and are arranged with several chips, and described chip links together the both positive and negative polarity of chip and the circuit board on the silver coating through gold thread; Be coated with silica gel layer on the described chip, described silica gel layer seals described chip and air insulated.
Described support copper base is a pure Cu substrate, the electroplating surface silver lustre, and main effect is to be used for heat conduction, fixing silicon chip, also is the thematic structure spare of support;
Described silica gel layer adopts two component height, light transmittance, high temperature resistant, silica gel that cementability is good, fills up support after the mixing, and chip and air insulated are guaranteed that the useful life of chip and gold thread do not receive ectocine;
Described gold thread uses automatic wire bonding machine, and the both positive and negative polarity of chip and the circuit of product are welded together, and makes the circuit of chip and pcb board form path, makes chip light emitting thereby when adding voltage for the pcb board circuit, can pressure drop be passed to chip;
Described chip is the luminous component of product, adopts the bonding mode of elargol with the center of die bonding on the guide pillar surface;
Described silver coating adopts electroplating technology, on the insulating barrier of its silicon chip surface, plates silver lustre, and effect improves the effect of reflectivity and conduction;
Described insulating barrier adopts more advanced high heat conductive insulating layer at present, adopts the mode of pressing or coating that insulating barrier is fixed on the silicon chip;
Described silicon substrate is to adopt high purity silicon to have a conductive force as what material formed.
According to above-mentioned structure; The utility model is mainly used in the LED encapsulation technology; The arrangement problems of chip when having solved the integrated encapsulation of great power LED; The utility model can avoid chip chip series connection when integrated encapsulation directly to use gold thread to connect, thereby reaches useful life and the stability that improves the integrated encapsulation of LED great power LED.
[description of drawings]
Accompanying drawing 1 is the structural representation of the utility model;
Accompanying drawing 2 is the structural representation of the utility model vertical section after amplifying.
Support copper base in the drawings, 1; 2, silica gel layer; 4, gold thread; 5, chip; 6, silver coating; 7, insulating barrier; 8, substrate layer.
[embodiment]
Below in conjunction with accompanying drawing and execution mode the utility model is further described:
Like Fig. 1, shown in Figure 2, a kind of great power LED integrated encapsulation structure comprises one deck support copper base 1; It is characterized in that; Cover one deck layer-of-substrate silicon 8 on the described support copper base 1, cover a layer insulating 7 on the described layer-of-substrate silicon 8 again, cover one deck silver coating 6 on the described insulating barrier 7; Described silver coating 6 is provided with circuit board and is arranged with several chips 5; Described chip 5 links together the both positive and negative polarity of chip and the circuit board on the silver coating 6 through gold thread 4, is coated with silica gel layer 2 on the described chip 5, and described silica gel layer 2 seals described chip 5 with air insulated.
In a word; The described execution mode of the foregoing description is not represented all implementations of the utility model, and above embodiment is not the concrete qualification to the utility model; All and the similar structure of the utility model technical scheme all should belong to the protection range of the utility model.

Claims (1)

1. great power LED integrated encapsulation structure; Comprise one deck support copper base, it is characterized in that, cover one deck layer-of-substrate silicon on the described support copper base; Cover a layer insulating on the described layer-of-substrate silicon again; Described coated insulating layer lid layer silver coating, described silver coating are provided with circuit board and are arranged with several chips, and described chip links together the both positive and negative polarity of chip and the circuit board on the silver coating through gold thread; Be coated with silica gel layer on the described chip, described silica gel layer seals described chip and air insulated.
CN 201120421380 2011-10-25 2011-10-25 High-power LED (Light Emitting Diode) integrated package structure Expired - Lifetime CN202307889U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201120421380 CN202307889U (en) 2011-10-25 2011-10-25 High-power LED (Light Emitting Diode) integrated package structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201120421380 CN202307889U (en) 2011-10-25 2011-10-25 High-power LED (Light Emitting Diode) integrated package structure

Publications (1)

Publication Number Publication Date
CN202307889U true CN202307889U (en) 2012-07-04

Family

ID=46376729

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201120421380 Expired - Lifetime CN202307889U (en) 2011-10-25 2011-10-25 High-power LED (Light Emitting Diode) integrated package structure

Country Status (1)

Country Link
CN (1) CN202307889U (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103118487A (en) * 2013-01-28 2013-05-22 苏州热驰光电科技有限公司 Metal-based circuit board with ultrahigh heat-conducting property and preparation method thereof
CN108598072A (en) * 2018-07-02 2018-09-28 江西科技师范大学 A kind of UV-LED light source module preparation methods based on integrated bracket

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103118487A (en) * 2013-01-28 2013-05-22 苏州热驰光电科技有限公司 Metal-based circuit board with ultrahigh heat-conducting property and preparation method thereof
CN103118487B (en) * 2013-01-28 2016-02-17 苏州热驰光电科技有限公司 Super-high heat-conductive metal base circuit board and preparation method thereof
CN108598072A (en) * 2018-07-02 2018-09-28 江西科技师范大学 A kind of UV-LED light source module preparation methods based on integrated bracket

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GR01 Patent grant
CX01 Expiry of patent term

Granted publication date: 20120704

CX01 Expiry of patent term