CN202111083U - 集成电路引线框架结构 - Google Patents

集成电路引线框架结构 Download PDF

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Publication number
CN202111083U
CN202111083U CN 201120241110 CN201120241110U CN202111083U CN 202111083 U CN202111083 U CN 202111083U CN 201120241110 CN201120241110 CN 201120241110 CN 201120241110 U CN201120241110 U CN 201120241110U CN 202111083 U CN202111083 U CN 202111083U
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lead frame
semiconductor chip
bonding wire
frame structure
integrated circuit
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CN 201120241110
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English (en)
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张建国
伍江涛
左福平
张航
龚道发
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Shenzhen Diantong Wintronic Microelectronics Co Ltd
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Shenzhen Diantong Wintronic Microelectronics Co Ltd
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Priority to CN 201120241110 priority Critical patent/CN202111083U/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

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  • Wire Bonding (AREA)

Abstract

本实用新型的集成电路引线框架结构，技术目的是提供一种节省焊线并且焊线不易变形的集成电路引线框架结构。包括有塑封体、半导体芯片及基岛，半导体芯片上连接有焊线；所述基岛边缘与半导体芯片下端边缘接触，所述接触点与焊线引脚形成一斜线。本实用新型焊线缩短后，焊线压焊机器的工作行程缩短，相对效率提高，并且由于焊线跨度减小，弧度不容易塌陷变形。适用于半导体芯片的生产领域。

Description

集成电路引线框架结构
技术领域
本实用新型涉及一种集成电路，更具体的说，涉及一种集成电路的引线框结构。
背景技术
引线框架是集成电路的基本部件，包含一个上芯的基岛及基岛四周的引脚，表面电镀金属层，基岛粘接芯片，用焊线连接芯片焊盘与引脚，再利用塑封料封装，进而固定成一整体半导体元件。在现工业化生产进程中分工日趋细致化的前提下，多数半导体元器件封装工厂都是从上级供应厂商直接采购引线框架。因此，引线框架厂商主导了市场标准的封装材料的设计，包括结构和规格。框架厂家为了销售的通用性，采用多种规格载体向大面积兼容载体尺寸单一化的生产方式。现有的SOP16L集成电路引线框架，基岛面积较大，芯片和小焊点的间距大小，决定了焊线的长短，间距大，焊线长；弧度容易塌陷变形；同样线径的导线通过的电流小；间距小，焊线短；弧度不容易塌陷变形；同样线径的导线通过的电流大。所以，现有的SOP16L集成电路引线框架，封装过程中，使用的焊线较长，对封装成本影响很大，对电流通过能力和弧度控制有负面影响。
发明内容
本实用新型的技术目的是克服现有技术中，半导体芯片焊线及基岛结构存在着焊线弧度跨度大，易变形的技术缺陷；提供一种节省焊线并且焊线不易变形的集成电路引线框架结构。
为实现以上技术目的，本实用新型的技术方案是
集成电路引线框架结构，包括有塑封体、半导体芯片及基岛，半导体芯片上连接有焊线；其特征是：所述基岛边缘与半导体芯片下端边缘接触，所述接触点与焊线引脚形成一斜线。
更进一步的，所述基岛面积为1.524mm×1.524mm。
本实用新型的有益技术效果是：引线框架的基岛面积减小，有效减少了引线框架本身铜材的使用量，大幅降低了焊线的耗用数量，降低材料成本；提高焊线电流载荷能力和焊线弧度稳定性。焊线缩短后，焊线压焊机器的工作行程缩短，相对效率提高，并且由于焊线跨度减小，弧度不容易塌陷变形；同样线径的焊线通过的电流更大。
附图说明
图1是本实用新型一个实施例的剖面结构示意图。
具体实施方式
如图1所示，本实用新型集成电路引线框架结构，包括有塑封体1、半导体芯片4及基岛5，半导体芯片4上连接有焊线2；基岛5边缘与半导体芯片4下端边缘接触，所述接触点与焊线引脚3形成一斜线。
新型引线框架结构不仅基岛尺寸和基岛两侧引线间距大幅度缩小，同时封装后的剖面图展示出采用该引线框架后的焊线长度和跨度大大缩小，节约焊线，提高了设备效率，弧度不容易塌陷变形；同样线径的导线通过的电流大。本新型实用在SOP16L封装领域可以广泛应用。

Claims (2)

1.集成电路引线框架结构，包括有塑封体、半导体芯片及基岛，半导体芯片上连接有焊线；其特征是：所述基岛边缘与半导体芯片下端边缘接触，所述接触点与焊线引脚形成一斜线。
2.根据权利要求1所述的集成电路引线框架结构，其特征是：所述基岛面积为1.524mm×1.524mm。
CN 201120241110 2011-07-08 2011-07-08 集成电路引线框架结构 Expired - Lifetime CN202111083U (zh)

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