CN202585399U - 引线框架 - Google Patents
引线框架 Download PDFInfo
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- CN202585399U CN202585399U CN201220259603XU CN201220259603U CN202585399U CN 202585399 U CN202585399 U CN 202585399U CN 201220259603X U CN201220259603X U CN 201220259603XU CN 201220259603 U CN201220259603 U CN 201220259603U CN 202585399 U CN202585399 U CN 202585399U
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- lead frame
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/84801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
引线框架。涉及对引线框架的改进。提供了一种增加与塑封料的接触面积,从而提高连接可靠性的引线框架。包括连为一体的散热片、基片和三个引脚,所述三个引脚平行设置,所述三个引脚中两侧引脚的上端设有焊脚,所述散热片与所述基片的连接处之间设有凹槽一;所述基片与所述中间引脚之间的表面上以及所述焊脚与所述两侧引脚之间的表面上设有凹槽二。本实用新型中的引线框架在散热片和基片之间增加了沟槽,同时在引脚和焊脚之间增加了凹槽,在封装的过程中,增大了与塑封料的接触面积,使得溶动的塑封料的流动距离增加,与引线框架正面、侧面结合更加紧密,牢靠,缝隙更小。本实用新型结构简单,提高了使用寿命。
Description
技术领域
本实用新型涉及对引线框架的改进。
背景技术
半导体分立元器件封装的目的是为了使半导体芯片的功能以方便的形式提供给用户,目前塑料树脂封装形式是大规模批量生产最通用的方式。其中,引线框架是半导体器件塑料树脂封装所需的支撑元件,其作用一是固定芯片,二是将芯片的功能通过外引线传递出去。
随着半导体行业的迅速发展,封装的高度集成化,客户对分立元器件的要求越来越高,体积要求小且散热性好,电性能稳定;而贴片式器件封装满足上述需求,但此封装要求引脚进行弯脚成型,在此过程中必然有应力通过引线传导至本体内部,对内部芯片产生影响,严重时候可能发生芯片电性失效,造成重大客户端异常,损失严重。
实用新型内容
本实用新型针对以上问题,提供了一种增加与塑封料的接触面积,从而提高连接可靠性的引线框架。
本实用新型的技术方案是:包括连为一体的散热片、基片和三个引脚,所述三个引脚平行设置,所述三个引脚中两侧引脚的上端设有焊脚,所述散热片与所述基片的连接处之间设有凹槽一;所述基片与所述中间引脚之间的表面上以及所述焊脚与所述两侧引脚之间的表面上设有凹槽二。
所述凹槽二的平面形状为弧形。
本实用新型中的引线框架在散热片和基片之间增加了沟槽,同时在引脚和焊脚之间增加了凹槽,在封装的过程中,增大了与塑封料的接触面积,使得溶动的塑封料的流动距离增加,与引线框架正面、侧面结合更加紧密,牢靠,缝隙更小。当引线在成型过程中受到冲击变形,产生的应力大大降低了对芯片的影响,只能通过其他途径释放,继而保护了芯片。本实用新型结构简单,提高了使用寿命。
附图说明
图1是本实用新型的结构示意图,
图2是图1的右视图,
图3是图2中I处的局部放大图,
图4是本实用新型的使用状态参考图;
图中1是散热片,2是基片,3是引脚,30是焊脚,4是凹槽一,5是凹槽二,50是弧形,6是芯片,7是塑封体,8是跳线。
具体实施方式
本实用新型如图1-3所示,包括连为一体的散热片1、基片2和三个引脚3,所述三个引脚3平行设置,所述三个引脚3中两侧引脚的上端设有焊脚30,所述散热片1与所述基片2的连接处之间设有凹槽一4;所述基片2与所述中间引脚之间的表面上以及所述焊脚30与所述两侧引脚之间的表面上设有凹槽二5。
所述凹槽二5的平面形状为弧形50。
如图4所示,本实用新型的使用状态,芯片6焊接基片2上,通过跳线8将其与引脚焊接连接,然后在外表面上进行封装,形成塑封体7。
Claims (2)
1.引线框架,包括连为一体的散热片、基片和三个引脚,所述三个引脚平行设置,所述三个引脚中两侧引脚的上端设有焊脚,其特征在于,所述散热片与所述基片的连接处之间设有凹槽一;所述基片与所述中间引脚之间的表面上以及所述焊脚与所述两侧引脚之间的表面上设有凹槽二。
2.根据权利要求1所述的引线框架,其特征在于,所述凹槽二的平面形状为弧形。
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CN201220259603XU CN202585399U (zh) | 2012-06-04 | 2012-06-04 | 引线框架 |
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CN201220259603XU CN202585399U (zh) | 2012-06-04 | 2012-06-04 | 引线框架 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104681528A (zh) * | 2013-10-28 | 2015-06-03 | 德克萨斯仪器股份有限公司 | 停止集成电路引线成品上树脂溢出和模具溢料的方法和设备 |
CN105895592A (zh) * | 2016-06-24 | 2016-08-24 | 扬州扬杰电子科技股份有限公司 | 一种框架、包含该框架的二极管及二极管的加工工艺 |
-
2012
- 2012-06-04 CN CN201220259603XU patent/CN202585399U/zh not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104681528A (zh) * | 2013-10-28 | 2015-06-03 | 德克萨斯仪器股份有限公司 | 停止集成电路引线成品上树脂溢出和模具溢料的方法和设备 |
CN104681528B (zh) * | 2013-10-28 | 2019-08-23 | 德克萨斯仪器股份有限公司 | 停止集成电路引线成品上树脂溢出和模具溢料的方法和设备 |
CN105895592A (zh) * | 2016-06-24 | 2016-08-24 | 扬州扬杰电子科技股份有限公司 | 一种框架、包含该框架的二极管及二极管的加工工艺 |
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Granted publication date: 20121205 |
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