CN202076244U - 用混合镀金合金线制造集成电路芯片的封装结构 - Google Patents
用混合镀金合金线制造集成电路芯片的封装结构 Download PDFInfo
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Abstract
本实用新型公开一种用混合镀金合金线制造集成电路芯片的封装结构,所述结构包括封装在塑封体内的金属框架、芯片、混合镀金合金线和导电层,在所述金属框架上设有衬底区和引脚区,所述导电层设在所述衬底区和引脚区,所述芯片固定在所述衬底区的导电层上,所述芯片的表面具有金属化焊盘,所述金属化焊盘的厚度大于等于2um,焊盘点大于60um,所述混合镀金合金线的一端球焊在所述金属化焊盘上,另一端压焊在所述引脚区的导电层上。本实用新型通过增加芯片金属化焊盘的厚度,使金属化焊盘能够承受更大的超声能量和键合压力,在焊接过程中可保证焊接质量;且在节省芯片制造成本的同时不影响芯片的性能,利于大规模推广应用。
Description
技术领域
本实用新型涉及芯片制造领域,尤其涉及一种用混合镀金合金线制造集成电路芯片的封装结构。
背景技术
球焊是集成电路引线键合中最具代表性的焊接技术。它是在一定的温度下,对键合劈刀施加压力,同时加载超声振动,将烧成球形的引线一端键合在芯片的金属化焊盘上,另一端键合到引线框架上,实现芯片内部电路与外围电路的电连接。由于球焊操作技术要求高、焊点细。而且焊点牢固,要求有方向性,故设定焊接线路图后可实现高速自动化焊接。
传统的球焊引线是采用高纯金。随着集成电路封装密度的增加,引线数增多,而市场行情却要求封装成本更低。在金线用量增大,金线价格上升的情况下,封装成本亦会相应的增加。这一难题成为集成电路封装业的瓶颈。
中国实用新型专利申请号为:“200820235164.2”,名称为:“一种用超声波铜线制造集成电路芯片封装结构”的专利文件中公开了一种用超声波铜线制造集成电路芯片封装结构,包括封装在塑封体内的金属框架、芯片、铜线,所述金属框架上设有衬底区和引脚区,其中,进一步包括导电层,所述导电层设在所述衬底区和引脚区,所述芯片固定在所述衬底区的导电层上,所述芯片的表面具有金属化焊盘,所述金属化焊盘的要求厚度大于3um,焊盘点大于90um,所述铜线的一端球焊在所述金属化焊盘上,另一端压焊在所述引脚区的导电层上。该专利文件的技术方案虽然采用了比较廉价的铜线替代纯金线,但是其抗伸强度、导热性、电阻率、延伸率、线性膨胀系数等参数均达不到纯金线和混合镀金线的技术水平,导致使用该铜线制成的集成电路芯片性能受到影响。
实用新型内容
本实用新型主要解决的技术问题是提供一种用混合镀金合金引线制造集成电路芯片的封装结构,能够使得采用混合镀金合金线制成的集成电路芯片达到采用纯金线的水平。
为解决上述技术问题,本实用新型采用的一个技术方案是:提供一种用混合镀金合金线制造集成电路芯片的封装结构,包括封装在塑封体内的金属框架、芯片、混合镀金合金线和导电层,在所述金属框架上设有衬底区和引脚区,所述导电层设在所述衬底区和引脚区,所述芯片固定在所述衬底区的导电层上,所述芯片的表面具有金属化焊盘,所述金属化焊盘的厚度大于等于2um,焊盘点大于60um,所述混合镀金合金线的一端球焊在所述金属化焊盘上,另一端压焊在所述引脚区的导电层上。
其中,所述在所述金属框架上连杆左右设有散热片,所述散热片对称排列在所述金属框架引脚区的引脚之间。
其中,所述结构还包括银胶层,所述银胶层设在所述衬底区的导电层与所述芯片之间。
其中,所述导电层为镀银层。
其中,所述塑封体的材质为环氧树脂。
本实用新型的有益效果是:区别于现有技术的采用铜线制造集成电路芯片的多种性能参数达不到纯金线制造集成电路芯片性能的缺陷,本实用新型通过增加芯片金属化焊盘的厚度,使金属化焊盘能够承受更大的超声能量和键合压力,在焊接过程中可保证焊接质量;且采用混合镀金合金线来作为球焊引线,其该混合镀金合金线的抗伸强度、导热性、电阻率、延伸率、线性膨胀系数等参数均达到纯金线的水平,从而在节省芯片制造成本的同时不影响芯片的性能,利于大规模推广应用。
附图说明
图1是本实用新型实施例的主视图;
图2是本实用新型实施例金属框架的结构示意图;
图3是本实用新型实施例金属框架剖示图;
图4是本实用新型实施例混合镀金合金线球焊芯片焊点示意图;
图5是本实用新型实施例混合镀金合金线球焊的结构示意图。
主要组件符号说明
1、塑封体,2、引脚,3、散热片,4、铜合金框架,5、衬底区,6、引脚区,7、边筋,8、连杆,9、边框,10、芯片,11、混合镀金合金线,12、镀银层,13、银胶层,14、铝金属化焊盘,15、芯片焊点。
具体实施方式
为详细说明本实用新型的技术内容、构造特征、所实现目的及效果,以下结合实施方式并配合附图详予说明。
请参阅图1~图5,本实用新型实施例的用混合镀金合金线制造集成电路芯片的封装结构,包括封装在塑封体1内的金属框架、芯片10、混合镀金合金线11和导电层,所述导电层为镀银层12,在所述金属框架上设有衬底区5和引脚区6,所述镀银层12设在所述衬底区5和引脚区6上,所述芯片10固定在所述衬底区5的导电层上,所述芯片的表面具有金属化焊盘,所述金属化焊盘的厚度大于等于2um,焊盘点大于60um,所述混合镀金合金线11的一端球焊在所述金属化焊盘上,另一端压焊在所述引脚区的导电层上。于本实用新型实施例中,所述金属框架为铜合金框架4。所述铜合金框架4还包括位于塑封体1外的两排引脚2及其连杆8、边筋7和边框9。延伸出塑封体1外的引脚2用于与电路板(图中未示)连接;连杆8、边筋7和边框9用于在加工过程中将衬底区5和引脚区6稳固在同一平面,塑封后边筋7和边框9被切掉。
所述芯片10的表面具有金属化焊盘,于本实用新型的实施例中,所述金属化焊盘为铝金属化焊盘14,用于球焊芯片焊点15。由于混合镀金合金线的硬度、屈服强度等物理参数高于金,球焊时需要对金属化焊盘施加更大的超声能量和键合压力,为了避免对芯片10的铝金属化焊盘14造成损伤甚至破坏,所述铝金属化焊盘14的厚度大于等于5μm。这样在增大超声能量和键合压力的情况下不会对铝金属化焊盘14造成损伤甚至破坏又可保证焊接质量。
所述混合镀金合金线的直径选取与集成电路的功率大小相匹配,较粗的直径可承载较大的工作电流。本实用新型实施例所采取的混合镀金合金线:φ0.02mm,延伸率:10-18%,拉力:8g。
所述混合镀金合金线11的一端球焊在所述铝金属化焊盘14上,另一端压焊在所述引脚区6的镀银层12上。所述铜合金框架4上设有散热片3,延伸出塑封体1外的散热片3对称排列于引脚区每列引脚2之间,所述散热片3用于将集成电路芯片10产生的热量及时传导并散发出去。
本实用新型实施例的引脚2呈双列对称排列并被打弯成L形。
本实用新型的银胶层13是一种高纯银粉与高分子聚合液的混合胶体。在高温下,聚合液分子相互交连而固化,将芯片10底部与衬底区5镀银层粘结为一体,胶体中大量均匀分布的银粒相互紧密接触而形成导电导热通道。
区别于现有技术的采用铜线制造集成电路芯片的多种性能参数达不到纯金线制造集成电路芯片性能的缺陷,本实用新型通过增加芯片金属化焊盘的厚度,使金属化焊盘能够承受更大的超声能量和键合压力,在焊接过程中可保证焊接质量;且采用混合镀金合金线来作为球焊引线,其该混合镀金合金线的抗伸强度、导热性、电阻率、延伸率、线性膨胀系数等参数均达到纯金线的水平,从而节省芯片在封装制造成本的同时不影响芯片的性能,利于大规模推广应用。
在一实施例中,塑封体的材质为环氧树脂。本实用新型的集成电路芯片在后工序注入环氧树脂保护连接在芯片上的线路免受冲弯或者冲断焊线,起到保护芯片及焊线特性作用,焊球硬度与线材硬度极强,提高了产品的质量及可靠性。
本实用新型的混合镀金合金线是由≥99.9998%的高纯镀银铜材料经过添加微量合金、微量元素而制成的键合线,表面镀金,结构稳定,使用简单。在焊接于芯片上的焊点、性能、导电、导热性强,经过超声波等工艺改造无需像传统工艺使用氮气进行烧球保护,对芯片焊球表面抗氧化特性强,自身抗氧化远远高于铜线及镀钯铜线,与纯金键合线同一特性。在生产工艺上进行创新改造,对超声波、烧球、打火参数、力度等技术配合焊接在集成电路芯片上的焊点、抗拉力性强、导热性强、电阻率、延伸率、线性膨胀系数技术达到领先地位。
本实用新型在集成电路芯片的封装上具有非常重要的地位,对于大功率、超导热性强的芯片封装要求是不可缺少的一种材料工艺突破,该项技术的应用,全面推广,可替代传统的纯金键合金线,由于现国际金价不断上涨,对集成电路芯片封装企业带来严重影响,也制约企业的发展。因此使用混合镀金合金线,可以大大节约成本,在市场上有极大的竞争优势与发展空间。
以上所述仅为本实用新型的实施例,并非因此限制本实用新型的专利范围,凡是利用本实用新型说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本实用新型的专利保护范围内。
Claims (5)
1.一种用混合镀金合金线制造集成电路芯片的封装结构,其特征在于:包括封装在塑封体内的金属框架、芯片、混合镀金合金线和导电层,在所述金属框架上设有衬底区和引脚区,所述导电层设在所述衬底区和引脚区,所述芯片固定在所述衬底区的导电层上,所述芯片的表面具有金属化焊盘,所述金属化焊盘的厚度大于等于2um,焊盘点大于60um,所述混合镀金合金线的一端球焊在所述金属化焊盘上,另一端压焊在所述引脚区的导电层上。
2.根据权利要求1所述的用混合镀金合金线制造集成电路芯片的封装结构,其特征在于:所述在所述金属框架上连杆左右设有散热片,所述散热片对称排列在所述金属框架引脚区的引脚之间。
3.根据权利要求2所述的用混合镀金合金线制造集成电路芯片的封装结构,其特征在于:所述结构还包括银胶层,所述银胶层设在所述衬底区的导电层与所述芯片之间。
4.根据权利要求3所述的用混合镀金合金线制造集成电路芯片的封装结构,其特征在于:所述导电层为镀银层。
5.根据权利要求1~4任一项所述的用混合镀金合金线制造集成电路芯片的封装结构,其特征在于:所述塑封体的材质为环氧树脂。
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CN114883285B (zh) * | 2022-04-19 | 2024-01-30 | 江西万年芯微电子有限公司 | 一种沉金基板开发特殊键合方式生产工艺 |
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