CN201813350U - Low-voltage rail-to-rail operation amplifying circuit - Google Patents

Low-voltage rail-to-rail operation amplifying circuit Download PDF

Info

Publication number
CN201813350U
CN201813350U CN2010205701221U CN201020570122U CN201813350U CN 201813350 U CN201813350 U CN 201813350U CN 2010205701221 U CN2010205701221 U CN 2010205701221U CN 201020570122 U CN201020570122 U CN 201020570122U CN 201813350 U CN201813350 U CN 201813350U
Authority
CN
China
Prior art keywords
oxide
semiconductor
type metal
source electrode
drain electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2010205701221U
Other languages
Chinese (zh)
Inventor
黄海云
应智花
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hangzhou Dianzi University
Original Assignee
Hangzhou Dianzi University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hangzhou Dianzi University filed Critical Hangzhou Dianzi University
Priority to CN2010205701221U priority Critical patent/CN201813350U/en
Application granted granted Critical
Publication of CN201813350U publication Critical patent/CN201813350U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Abstract

The utility model relates to a low-voltage rail-to-rail operation amplifying circuit, which comprises three resistances, three capacitances, 19 P-shaped metal oxide semiconductor (MOS) tubes and 17 N-shaped MOS tubes. The circuit adopts a current mode transconductance device which is applicable to low voltage, a folding type cascode amplifying circuit, a class AB push-pull output circuit and other subcircuit structures, overcomes the defect that the traditional voltage type operation amplifier is seriously limited by threshold voltage, adopts a circuit unit which satisfies low voltage requirement, and improves the circuit structure, thereby realizing the low-voltage and low-power performance with the conventional complementary metal oxide semiconductor (CMOS) technology. The utility model adopts the current mode transconductance device, and obtains rail-to-rail common-mode voltage input and good frequency response; the gain stage adopts the folding type cascode amplifying circuit, and obtains high voltage gain and high power supply rejection ratio; and the output stage adopts the class AB push-pull output circuits of two inverters, obtains high drive capacity, and has rail-to-rail common-mode voltage output and extremely-low harmonic distortion.

Description

Low pressure rail-to-rail operational amplification circuit
Technical field
The utility model belongs to wireless communication field, relate to a kind of low pressure rail-to-rail operational amplification circuit, be mainly used in indoor cordless telephone, cellular mobile phone, personal digital assistant, portable sound system, battery monitoring system, with battery powered portable electric appts etc.
Technical background
Mobile phone in recent years, personal digital assistant, portable electronic measuring instrument etc. is used widely with battery powered electronic product, and an urgent demand we adopt the circuit of low-voltage, low-power consumption to reduce the battery number, prolongs battery service time.We know that the total power consumption of a Circuits System is approximately equal to the switch power consumption NC that capacitor charge and discharge causes EqV 2 DD, quiescent current power consumption I DDV DDWith instantaneous short circuit current power dissipation I ShortV DDSum, the power consumption that can know circuit directly and supply voltage be directly proportional, therefore have only the reduction supply voltage could significantly reduce the power consumption of circuit.May cause the minimizing to a certain degree of circuit frequency bandwidth and voltage swing although reduce supply voltage, this point can overcome by the circuit optimization design.Another benefit that the reduction supply voltage brings is to have reduced the required battery number of circuit operate as normal, has also just reduced the volume of electronic product, makes them be more convenient for carrying.Reduce the withstand voltage reduction that supply voltage also makes transistor and born in addition, increased the stability of circuit.Yet we know that an electronic product always comprises artificial circuit part and digital circuit part, and the operating voltage of digital circuit requires low, and power consumption is less, and analog circuit to the requirement of supply voltage than digital circuit height, power consumption is also big than digital circuit.Therefore in order to reduce the power consumption of circuit, realize that analog-and digital-circuit can both be operated under the low-voltage with regard to the necessary analog circuit that adapts to low-voltage of designing.
Summary of the invention
The purpose of this utility model is in order to overcome the weak point of prior art, to propose a kind of low pressure rail-to-rail operational amplification circuit.
The utility model comprises three resistance, three electric capacity, 19 P type metal-oxide-semiconductors and 17 N type metal-oxide-semiconductors, specifically:
The one P type metal-oxide-semiconductor P 1Drain electrode and biasing resistor R 1An end connect a N type metal-oxide-semiconductor N 1Source electrode and grid and the 4th N type metal-oxide-semiconductor N 4Grid and the 2nd P type metal-oxide-semiconductor P 2Drain electrode connect the 3rd P type metal-oxide-semiconductor P 3Grid and drain electrode and divider resistance R 2An end connect; The 4th P type metal-oxide-semiconductor P 4Drain and gate and the 5th P type metal-oxide-semiconductor P 5Grid and the 3rd P type metal-oxide-semiconductor P 3Source electrode connect the 4th N type metal-oxide-semiconductor N 4Source electrode, the 5th N type metal-oxide-semiconductor N 5Drain electrode and the 6th N type metal-oxide-semiconductor N 6Drain electrode and divider resistance R 2The other end connect; The 3rd N type metal-oxide-semiconductor N 3Grid and source electrode, the 2nd N type metal-oxide-semiconductor N 2Grid, the 5th N type metal-oxide-semiconductor N 5Grid and the 6th P type metal-oxide-semiconductor P 6Source electrode connect the 5th P type metal-oxide-semiconductor P 5Drain electrode, the 6th P type metal-oxide-semiconductor P 6Drain electrode, the 6th N type metal-oxide-semiconductor N 6Grid and the 7th P type metal-oxide-semiconductor P 7Source electrode connect the 6th P type metal-oxide-semiconductor P 6Grid be connected the 7th P type metal-oxide-semiconductor P with the negative terminal Vin-of differential signal input 7Grid be connected with the anode Vin+ of differential signal input; The 2nd N type metal-oxide-semiconductor N 2Source electrode, the 6th N type metal-oxide-semiconductor N 6Source electrode, the 9th P type metal-oxide-semiconductor P 9Source electrode and the 11 P type metal-oxide-semiconductor P 11Drain electrode connect; The 8th P type metal-oxide-semiconductor P 8Source electrode, the tenth P type metal-oxide-semiconductor P 10Drain electrode, the 5th N type metal-oxide-semiconductor N 5Source electrode and the 8th N type metal-oxide-semiconductor N 8Source electrode connect; The 7th N type metal-oxide-semiconductor N 7Grid and source electrode and the 8th N type metal-oxide-semiconductor N 8Grid and the 7th P type metal-oxide-semiconductor P 7Drain electrode connect the 9th N type metal-oxide-semiconductor N 9Grid and source electrode and the tenth N type metal-oxide-semiconductor N 10Grid and the 8th P type metal-oxide-semiconductor P 8Drain electrode connect; The tenth N type metal-oxide-semiconductor N 10Source electrode, the 11 N type metal-oxide-semiconductor N 11The coral utmost point, the 9th P type metal-oxide-semiconductor P 9Drain electrode and the 12 P type metal-oxide-semiconductor P 12The drain electrode and the second filter capacitor C 2An end connect the 13 N type metal-oxide-semiconductor N 13Source electrode, the 14 N type metal-oxide-semiconductor N 14Source electrode, 16 P type metal-oxide-semiconductor P 16Drain electrode, 17 P type metal-oxide-semiconductor P 17Drain electrode and load capacitance C 3An end and load resistance R 3An end and the second filter capacitor C 2The other end connect load capacitance C 3The other end and load resistance R 3Other end ground connection; The 11 N type metal-oxide-semiconductor N 11Source electrode, the 13 P type metal-oxide-semiconductor P 13Drain electrode, the 14 P type metal-oxide-semiconductor P 14The coral utmost point and the 18 P type metal-oxide-semiconductor P 18The coral utmost point and the first filter capacitor C 1An end connect the first filter capacitor C 1The other end and the 12 P type metal-oxide-semiconductor P 12Source electrode connect; The 15 P type metal-oxide-semiconductor P 15Drain and gate, the 14 P type metal-oxide-semiconductor P 14Drain electrode, the 16 P type metal-oxide-semiconductor P 16Grid, the 12 N type metal-oxide-semiconductor N 12Source electrode and the 13 N type metal-oxide-semiconductor N 13The coral utmost point connect; The 15 N type metal-oxide-semiconductor N 15Source electrode and grid, the 14 N type metal-oxide-semiconductor N 14Grid, the 16 N type metal-oxide-semiconductor N 16Source electrode, the 17 P type metal-oxide-semiconductor P 17The coral utmost point and the 18 P type metal-oxide-semiconductor P 18Drain electrode connect the 16 N type metal-oxide-semiconductor N 16The coral utmost point and the 17 N type metal-oxide-semiconductor N 17The coral utmost point and the 12 N type metal-oxide-semiconductor N 12The coral utmost point connect the 17 N type metal-oxide-semiconductor N 17Source electrode and 19 P type metal-oxide-semiconductor P 19Drain electrode connect.
The one P type metal-oxide-semiconductor P 1Grid, the 2nd P type metal-oxide-semiconductor P 2Grid, the tenth P type metal-oxide-semiconductor P 10Grid, the 11 P type metal-oxide-semiconductor P 11Grid, the 13 P type metal-oxide-semiconductor P 13Grid and the 19 P type metal-oxide-semiconductor P 19Grid connect; The one P type metal-oxide-semiconductor P 1Source electrode, the 2nd P type metal-oxide-semiconductor P 2Source electrode, the 4th P type metal-oxide-semiconductor P 4Source electrode, the 5th P type metal-oxide-semiconductor P 5Source electrode, the tenth P type metal-oxide-semiconductor P 10Source electrode, the 11 P type metal-oxide-semiconductor P 11Source electrode, the 13 P type metal-oxide-semiconductor P 13Source electrode, the 14 P type metal-oxide-semiconductor P 14Source electrode, the 15 P type metal-oxide-semiconductor P 15Source electrode, the 16 P type metal-oxide-semiconductor P 16Source electrode, the 17 P type metal-oxide-semiconductor P 17Source electrode, the 18 P type metal-oxide-semiconductor P 18Source electrode, the 19 P type metal-oxide-semiconductor P 19Source electrode and the 12 P type metal-oxide-semiconductor P 12Substrate ground connection.
The one N type metal-oxide-semiconductor N 1Drain electrode, the 2nd N type metal-oxide-semiconductor N 2Drain electrode, the 3rd N type metal-oxide-semiconductor N 3Drain electrode, the 4th N type metal-oxide-semiconductor N 4Drain electrode, the 7th N type metal-oxide-semiconductor N 7Drain electrode, the 8th N type metal-oxide-semiconductor N 8Drain electrode, the 9th N type metal-oxide-semiconductor N 9Drain electrode, the tenth N type metal-oxide-semiconductor N 10Drain electrode, the 11 N type metal-oxide-semiconductor N 11Drain electrode, the 12 N type metal-oxide-semiconductor N 12Drain electrode, the 13 N type metal-oxide-semiconductor N 13Drain electrode, the 14 N type metal-oxide-semiconductor N 14Drain electrode, the 15 N type metal-oxide-semiconductor N 15Drain electrode, the 16 N type metal-oxide-semiconductor N 16Drain electrode, the 17 N type metal-oxide-semiconductor N 17Drain electrode, the 5th N type metal-oxide-semiconductor N 5Substrate, the 6th N type metal-oxide-semiconductor N 6Substrate, the 8th P type metal-oxide-semiconductor P 8The coral utmost point, the 9th P type metal-oxide-semiconductor P 9The coral utmost point, the 12 P type metal-oxide-semiconductor P 12The coral utmost point and biasing resistor R 1The other end all be connected with 1.5V power vd D.
The utility model has overcome the shortcoming that traditional electrical die mould operational amplifier is limited by threshold voltage deeply, adopted and be suitable for the circuit unit that low-voltage requires, on circuit structure, improve, thereby under the CMOS of routine technology, realized the performance of low-voltage, low-power consumption.This circuit adopts the current mode trsanscondutor, has obtained input of rail-to-rail common-mode voltage and good frequency response; Gain stage adopts collapsible cascade amplifying circuit, has obtained high voltage gain and high Power Supply Rejection Ratio; Output stage adopts the AB class push-pull output circuit of two pairs of inverters, has obtained high driving ability, has output of rail-to-rail common-mode voltage and extremely low harmonic distortion.
Description of drawings
Fig. 1 is a circuit diagram of the present utility model.
Embodiment
As shown in Figure 1, a kind of low pressure rail-to-rail operational amplification circuit comprises three resistance, three electric capacity, 19 P type metal-oxide-semiconductors and 17 N type metal-oxide-semiconductors, specifically:
The one P type metal-oxide-semiconductor P 1Drain electrode and biasing resistor R 1An end connect a N type metal-oxide-semiconductor N 1Source electrode and grid and the 4th N type metal-oxide-semiconductor N 4Grid and the 2nd P type metal-oxide-semiconductor P 2Drain electrode connect the 3rd P type metal-oxide-semiconductor P 3Grid and drain electrode and divider resistance R 2An end connect; The 4th P type metal-oxide-semiconductor P 4Drain and gate and the 5th P type metal-oxide-semiconductor P 5Grid and the 3rd P type metal-oxide-semiconductor P 3Source electrode connect the 4th N type metal-oxide-semiconductor N 4Source electrode, the 5th N type metal-oxide-semiconductor N 5Drain electrode and the 6th N type metal-oxide-semiconductor N 6Drain electrode and divider resistance R 2The other end connect; The 3rd N type metal-oxide-semiconductor N 3Grid and source electrode, the 2nd N type metal-oxide-semiconductor N 2Grid, the 5th N type metal-oxide-semiconductor N 5Grid and the 6th P type metal-oxide-semiconductor P 6Source electrode connect the 5th P type metal-oxide-semiconductor P 5Drain electrode, the 6th P type metal-oxide-semiconductor P 6Drain electrode, the 6th N type metal-oxide-semiconductor N 6Grid and the 7th P type metal-oxide-semiconductor P 7Source electrode connect the 6th P type metal-oxide-semiconductor P 6Grid be connected the 7th P type metal-oxide-semiconductor P with the negative terminal Vin-of differential signal input 7Grid be connected with the anode Vin+ of differential signal input; The 2nd N type metal-oxide-semiconductor N 2Source electrode, the 6th N type metal-oxide-semiconductor N 6Source electrode, the 9th P type metal-oxide-semiconductor P 9Source electrode and the 11 P type metal-oxide-semiconductor P 11Drain electrode connect; The 8th P type metal-oxide-semiconductor P 8Source electrode, the tenth P type metal-oxide-semiconductor P 10Drain electrode, the 5th N type metal-oxide-semiconductor N 5Source electrode and the 8th N type metal-oxide-semiconductor N 8Source electrode connect; The 7th N type metal-oxide-semiconductor N 7Grid and source electrode and the 8th N type metal-oxide-semiconductor N 8Grid and the 7th P type metal-oxide-semiconductor P 7Drain electrode connect the 9th N type metal-oxide-semiconductor N 9Grid and source electrode and the tenth N type metal-oxide-semiconductor N 10Grid and the 8th P type metal-oxide-semiconductor P 8Drain electrode connect; The tenth N type metal-oxide-semiconductor N 10Source electrode, the 11 N type metal-oxide-semiconductor N 11The coral utmost point, the 9th P type metal-oxide-semiconductor P 9Drain electrode and the 12 P type metal-oxide-semiconductor P 12The drain electrode and the second filter capacitor C 2An end connect the 13 N type metal-oxide-semiconductor N 13Source electrode, the 14 N type metal-oxide-semiconductor N 14Source electrode, 16 P type metal-oxide-semiconductor P 16Drain electrode, 17 P type metal-oxide-semiconductor P 17Drain electrode and load capacitance C 3An end and load resistance R 3An end and the second filter capacitor C 2The other end connect load capacitance C 3The other end and load resistance R 3Other end ground connection; The 11 N type metal-oxide-semiconductor N 11Source electrode, the 13 P type metal-oxide-semiconductor P 13Drain electrode, the 14 P type metal-oxide-semiconductor P 14The coral utmost point and the 18 P type metal-oxide-semiconductor P 18The coral utmost point and the first filter capacitor C 1An end connect the first filter capacitor C 1The other end and the 12 P type metal-oxide-semiconductor P 12Source electrode connect; The 15 P type metal-oxide-semiconductor P 15Drain and gate, the 14 P type metal-oxide-semiconductor P 14Drain electrode, the 16 P type metal-oxide-semiconductor P 16Grid, the 12 N type metal-oxide-semiconductor N 12Source electrode and the 13 N type metal-oxide-semiconductor N 13The coral utmost point connect; The 15 N type metal-oxide-semiconductor N 15Source electrode and grid, the 14 N type metal-oxide-semiconductor N 14Grid, the 16 N type metal-oxide-semiconductor N 16Source electrode, the 17 P type metal-oxide-semiconductor P 17The coral utmost point and the 18 P type metal-oxide-semiconductor P 18Drain electrode connect the 16 N type metal-oxide-semiconductor N 16The coral utmost point and the 17 N type metal-oxide-semiconductor N 17The coral utmost point and the 12 N type metal-oxide-semiconductor N 12The coral utmost point connect the 17 N type metal-oxide-semiconductor N 17Source electrode and 19 P type metal-oxide-semiconductor P 19Drain electrode connect.
The one P type metal-oxide-semiconductor P 1Grid, the 2nd P type metal-oxide-semiconductor P 2Grid, the tenth P type metal-oxide-semiconductor P 10Grid, the 11 P type metal-oxide-semiconductor P 11Grid, the 13 P type metal-oxide-semiconductor P 13Grid and the 19 P type metal-oxide-semiconductor P 19Grid connect; The one P type metal-oxide-semiconductor P 1Source electrode, the 2nd P type metal-oxide-semiconductor P 2Source electrode, the 4th P type metal-oxide-semiconductor P 4Source electrode, the 5th P type metal-oxide-semiconductor P 5Source electrode, the tenth P type metal-oxide-semiconductor P 10Source electrode, the 11 P type metal-oxide-semiconductor P 11Source electrode, the 13 P type metal-oxide-semiconductor P 13Source electrode, the 14 P type metal-oxide-semiconductor P 14Source electrode, the 15 P type metal-oxide-semiconductor P 15Source electrode, the 16 P type metal-oxide-semiconductor P 16Source electrode, the 17 P type metal-oxide-semiconductor P 17Source electrode, the 18 P type metal-oxide-semiconductor P 18Source electrode, the 19 P type metal-oxide-semiconductor P 19Source electrode and the 12 P type metal-oxide-semiconductor P 12Substrate ground connection.
The one N type metal-oxide-semiconductor N 1Drain electrode, the 2nd N type metal-oxide-semiconductor N 2Drain electrode, the 3rd N type metal-oxide-semiconductor N 3Drain electrode, the 4th N type metal-oxide-semiconductor N 4Drain electrode, the 7th N type metal-oxide-semiconductor N 7Drain electrode, the 8th N type metal-oxide-semiconductor N 8Drain electrode, the 9th N type metal-oxide-semiconductor N 9Drain electrode, the tenth N type metal-oxide-semiconductor N 10Drain electrode, the 11 N type metal-oxide-semiconductor N 11Drain electrode, the 12 N type metal-oxide-semiconductor N 12Drain electrode, the 13 N type metal-oxide-semiconductor N 13Drain electrode, the 14 N type metal-oxide-semiconductor N 14Drain electrode, the 15 N type metal-oxide-semiconductor N 15Drain electrode, the 16 N type metal-oxide-semiconductor N 16Drain electrode, the 17 N type metal-oxide-semiconductor N 17Drain electrode, the 5th N type metal-oxide-semiconductor N 5Substrate, the 6th N type metal-oxide-semiconductor N 6Substrate, the 8th P type metal-oxide-semiconductor P 8The coral utmost point, the 9th P type metal-oxide-semiconductor P 9The coral utmost point, the 12 P type metal-oxide-semiconductor P 12The coral utmost point and biasing resistor R 1The other end all be connected with 1.5V power vd D.
Biasing resistor R 1With a P type metal-oxide-semiconductor P 1, the 2nd P type metal-oxide-semiconductor P 2The main biasing circuit of forming circuit, main bias current are designed to 5 μ A.The one N type metal-oxide-semiconductor N 1With the 4th N type metal-oxide-semiconductor N 4For the input stage operate as normal provides constant current source.Input stage is a current mode trsanscondutor of being made up of two NMOS parallel to each other and PMOS differential pair and current source thereof.The 5th N type metal-oxide-semiconductor N 5With the 6th N type metal-oxide-semiconductor N 6Form PMOS differential pair trsanscondutor, the 4th N type metal-oxide-semiconductor N 4It is its current source; The 6th P type metal-oxide-semiconductor P 6With the 7th P type metal-oxide-semiconductor P 7Form nmos differential to trsanscondutor, the 5th P type metal-oxide-semiconductor P 5The electric current that is it is heavy.Adopt the 9th N type metal-oxide-semiconductor N of folding common source 9, the tenth N type metal-oxide-semiconductor N 10, the 11 N type metal-oxide-semiconductor N 11, the 8th P type metal-oxide-semiconductor P 8, the 9th P type metal-oxide-semiconductor P 9, the tenth P type metal-oxide-semiconductor P 10, the 11 P type metal-oxide-semiconductor P 11, the 12 P type metal-oxide-semiconductor P 12, the 13 P type metal-oxide-semiconductor P 13Form amplifier second level amplifying circuit and be actually a kind of trans-impedance amplifier, it changes the current signal that input stage produces into voltage signal, and amplifies output.The 11 P type metal-oxide-semiconductor P wherein 11With the 12 P type metal-oxide-semiconductor P 12Bias current as input stage is heavy; The 8th P type metal-oxide-semiconductor P 8, the 9th P type metal-oxide-semiconductor P 9, the 9th N type metal-oxide-semiconductor N 9, the tenth N type metal-oxide-semiconductor N 10Constitute a kind of folded common source and common grid current mirror; The 11 N type metal-oxide-semiconductor N 11With the 13 P type metal-oxide-semiconductor P 13Form common source configuration amplifying circuit, the first filter capacitor C 1Be miller compensation electric capacity, the 12 P type metal-oxide-semiconductor P 12Be equivalent to a resistance, resistance dynamically changes along with the voltage at drain-source two ends, can eliminate the first filter capacitor C 1The RHP effect at zero point that the forward direction coupling causes.The 12 P type metal-oxide-semiconductor P 12Adopt MOSFET and, be in order to reduce area of chip and phase margin dynamically to be adjusted without fixed resistance.What this amplifier adopted is a kind of electric current folding electric circuit technology, it is directly linked the drain terminal of input stage PMOS differential pair on the source electrode of cascade device, make input common mode voltage increase, supply voltage required to reduce to have the intrinsic superperformance of cascode amplifier simultaneously again.The tenth P type metal-oxide-semiconductor P in the circuit 10With the 11 P type metal-oxide-semiconductor P 11The electric current that absorbs equals from input stage differential pair the 5th N type metal-oxide-semiconductor N 5, the 6th N type metal-oxide-semiconductor N 6Or the 6th P type metal-oxide-semiconductor P 6, the 7th P type metal-oxide-semiconductor P 7The electric current and the 8th P type metal-oxide-semiconductor P that flow into 8, the 9th P type metal-oxide-semiconductor P 9, the 9th N type metal-oxide-semiconductor N 9, the tenth N type metal-oxide-semiconductor N 10The electric current sum.During balance, the 9th P type metal-oxide-semiconductor P 9Electric current equal the tenth N type metal-oxide-semiconductor N 10Electric current.The nmos differential of supposing input stage is to work, if input voltage V INRaise to the positive supply direction, so I In +Increase Δ I, I In -Reduce Δ I, these variations are reflected as the 8th P type metal-oxide-semiconductor P 8Electric current increases Δ I, the 9th P type metal-oxide-semiconductor P 9Electric current has reduced Δ I, and the result flows to the 9th N type metal-oxide-semiconductor N 9, the tenth N type metal-oxide-semiconductor N 10The electric current of drain electrode is 2 Δ I.
The 19 P type metal-oxide-semiconductor P 19, the 12 N type metal-oxide-semiconductor N 12, the 16 N type metal-oxide-semiconductor N 16, the 17 N type metal-oxide-semiconductor N 17Form bias current sources, the 19 P type metal-oxide-semiconductor P 19The grid level connect the main biasing of amplifier, the 12 N type metal-oxide-semiconductor N 12, the 16 N type metal-oxide-semiconductor N 16Respectively with the 17 N type metal-oxide-semiconductor N 17Form current mirror.Input circuit is by the 14 P type metal-oxide-semiconductor P 14, the 15 P type metal-oxide-semiconductor P 15, the 18 P type metal-oxide-semiconductor P 18With the 15 N type metal-oxide-semiconductor N 15Form, output circuit is by two inverters the 13 N type metal-oxide-semiconductor N 13, the 16 P type metal-oxide-semiconductor P 16And the 14 N type metal-oxide-semiconductor N 14, the 17 P type metal-oxide-semiconductor P 17Constitute, their output point is connected together jointly as the output of amplifier.Because the working power of amplifier is 1.5V, the threshold voltage of MOS device is about 0.75V, so each has only a MOSFET to be operated in saturation region (the 16 P type metal-oxide-semiconductor P to inverter 16, the 14 N type metal-oxide-semiconductor N 14), and other one be operated in cut-off region (the 13 N type metal-oxide-semiconductor N 13, the 17 P type metal-oxide-semiconductor P 17).
This circuit adopts the current mode trsanscondutor that is suitable for low-voltage, and electronic circuit structures such as the AB class push-pull output circuit of folded common source and common grid amplifying circuit and low-power consumption, entire circuit are only by 36 MOSFET, and three electric capacity and three resistance are formed.

Claims (1)

1. low pressure rail-to-rail operational amplification circuit comprises three resistance, three electric capacity, 19 P type metal-oxide-semiconductors and 17 N type metal-oxide-semiconductors, it is characterized in that:
The one P type metal-oxide-semiconductor P 1Drain electrode and biasing resistor R 1An end connect a N type metal-oxide-semiconductor N 1Source electrode and grid and the 4th N type metal-oxide-semiconductor N 4Grid and the 2nd P type metal-oxide-semiconductor P 2Drain electrode connect the 3rd P type metal-oxide-semiconductor P 3Grid and drain electrode and divider resistance R 2An end connect; The 4th P type metal-oxide-semiconductor P 4Drain and gate and the 5th P type metal-oxide-semiconductor P 5Grid and the 3rd P type metal-oxide-semiconductor P 3Source electrode connect the 4th N type metal-oxide-semiconductor N 4Source electrode, the 5th N type metal-oxide-semiconductor N 5Drain electrode and the 6th N type metal-oxide-semiconductor N 6Drain electrode and divider resistance R 2The other end connect; The 3rd N type metal-oxide-semiconductor N 3Grid and source electrode, the 2nd N type metal-oxide-semiconductor N 2Grid, the 5th N type metal-oxide-semiconductor N 5Grid and the 6th P type metal-oxide-semiconductor P 6Source electrode connect the 5th P type metal-oxide-semiconductor P 5Drain electrode, the 6th P type metal-oxide-semiconductor P 6Drain electrode, the 6th N type metal-oxide-semiconductor N 6Grid and the 7th P type metal-oxide-semiconductor P 7Source electrode connect the 6th P type metal-oxide-semiconductor P 6Grid be connected the 7th P type metal-oxide-semiconductor P with the negative terminal Vin-of differential signal input 7Grid be connected with the anode Vin+ of differential signal input; The 2nd N type metal-oxide-semiconductor N 2Source electrode, the 6th N type metal-oxide-semiconductor N 6Source electrode, the 9th P type metal-oxide-semiconductor P 9Source electrode and the 11 P type metal-oxide-semiconductor P 11Drain electrode connect; The 8th P type metal-oxide-semiconductor P 8Source electrode, the tenth P type metal-oxide-semiconductor P 10Drain electrode, the 5th N type metal-oxide-semiconductor N 5Source electrode and the 8th N type metal-oxide-semiconductor N 8Source electrode connect; The 7th N type metal-oxide-semiconductor N 7Grid and source electrode and the 8th N type metal-oxide-semiconductor N 8Grid and the 7th P type metal-oxide-semiconductor P 7Drain electrode connect the 9th N type metal-oxide-semiconductor N 9Grid and source electrode and the tenth N type metal-oxide-semiconductor N 10Grid and the 8th P type metal-oxide-semiconductor P 8Drain electrode connect; The tenth N type metal-oxide-semiconductor N 10Source electrode, the 11 N type metal-oxide-semiconductor N 11The coral utmost point, the 9th P type metal-oxide-semiconductor P 9Drain electrode and the 12 P type metal-oxide-semiconductor P 12The drain electrode and the second filter capacitor C 2An end connect the 13 N type metal-oxide-semiconductor N 13Source electrode, the 14 N type metal-oxide-semiconductor N 14Source electrode, 16 P type metal-oxide-semiconductor P 16Drain electrode, 17 P type metal-oxide-semiconductor P 17Drain electrode and load capacitance C 3An end and load resistance R 3An end and the second filter capacitor C 2The other end connect load capacitance C 3The other end and load resistance R 3Other end ground connection; The 11 N type metal-oxide-semiconductor N 11Source electrode, the 13 P type metal-oxide-semiconductor P 13Drain electrode, the 14 P type metal-oxide-semiconductor P 14The coral utmost point and the 18 P type metal-oxide-semiconductor P 18The coral utmost point and the first filter capacitor C 1An end connect the first filter capacitor C 1The other end and the 12 P type metal-oxide-semiconductor P 12Source electrode connect; The 15 P type metal-oxide-semiconductor P 15Drain and gate, the 14 P type metal-oxide-semiconductor P 14Drain electrode, the 16 P type metal-oxide-semiconductor P 16Grid, the 12 N type metal-oxide-semiconductor N 12Source electrode and the 13 N type metal-oxide-semiconductor N 13The coral utmost point connect; The 15 N type metal-oxide-semiconductor N 15Source electrode and grid, the 14 N type metal-oxide-semiconductor N 14Grid, the 16 N type metal-oxide-semiconductor N 16Source electrode, the 17 P type metal-oxide-semiconductor P 17The coral utmost point and the 18 P type metal-oxide-semiconductor P 18Drain electrode connect the 16 N type metal-oxide-semiconductor N 16The coral utmost point and the 17 N type metal-oxide-semiconductor N 17The coral utmost point and the 12 N type metal-oxide-semiconductor N 12The coral utmost point connect the 17 N type metal-oxide-semiconductor N 17Source electrode and 19 P type metal-oxide-semiconductor P 19Drain electrode connect;
The one P type metal-oxide-semiconductor P 1Grid, the 2nd P type metal-oxide-semiconductor P 2Grid, the tenth P type metal-oxide-semiconductor P 10Grid, the 11 P type metal-oxide-semiconductor P 11Grid, the 13 P type metal-oxide-semiconductor P 13Grid and the 19 P type metal-oxide-semiconductor P 19Grid connect; The one P type metal-oxide-semiconductor P 1Source electrode, the 2nd P type metal-oxide-semiconductor P 2Source electrode, the 4th P type metal-oxide-semiconductor P 4Source electrode, the 5th P type metal-oxide-semiconductor P 5Source electrode, the tenth P type metal-oxide-semiconductor P 10Source electrode, the 11 P type metal-oxide-semiconductor P 11Source electrode, the 13 P type metal-oxide-semiconductor P 13Source electrode, the 14 P type metal-oxide-semiconductor P 14Source electrode, the 15 P type metal-oxide-semiconductor P 15Source electrode, the 16 P type metal-oxide-semiconductor P 16Source electrode, the 17 P type metal-oxide-semiconductor P 17Source electrode, the 18 P type metal-oxide-semiconductor P 18Source electrode, the 19 P type metal-oxide-semiconductor P 19Source electrode and the 12 P type metal-oxide-semiconductor P 12Substrate ground connection;
The one N type metal-oxide-semiconductor N 1Drain electrode, the 2nd N type metal-oxide-semiconductor N 2Drain electrode, the 3rd N type metal-oxide-semiconductor N 3Drain electrode, the 4th N type metal-oxide-semiconductor N 4Drain electrode, the 7th N type metal-oxide-semiconductor N 7Drain electrode, the 8th N type metal-oxide-semiconductor N 8Drain electrode, the 9th N type metal-oxide-semiconductor N 9Drain electrode, the tenth N type metal-oxide-semiconductor N 10Drain electrode, the 11 N type metal-oxide-semiconductor N 11Drain electrode, the 12 N type metal-oxide-semiconductor N 12Drain electrode, the 13 N type metal-oxide-semiconductor N 13Drain electrode, the 14 N type metal-oxide-semiconductor N 14Drain electrode, the 15 N type metal-oxide-semiconductor N 15Drain electrode, the 16 N type metal-oxide-semiconductor N 16Drain electrode, the 17 N type metal-oxide-semiconductor N 17Drain electrode, the 5th N type metal-oxide-semiconductor N 5Substrate, the 6th N type metal-oxide-semiconductor N 6Substrate, the 8th P type metal-oxide-semiconductor P 8The coral utmost point, the 9th P type metal-oxide-semiconductor P 9The coral utmost point, the 12 P type metal-oxide-semiconductor P 12The coral utmost point and biasing resistor R 1The other end all be connected with 1.5V power vd D.
CN2010205701221U 2010-10-19 2010-10-19 Low-voltage rail-to-rail operation amplifying circuit Expired - Fee Related CN201813350U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2010205701221U CN201813350U (en) 2010-10-19 2010-10-19 Low-voltage rail-to-rail operation amplifying circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2010205701221U CN201813350U (en) 2010-10-19 2010-10-19 Low-voltage rail-to-rail operation amplifying circuit

Publications (1)

Publication Number Publication Date
CN201813350U true CN201813350U (en) 2011-04-27

Family

ID=43896286

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2010205701221U Expired - Fee Related CN201813350U (en) 2010-10-19 2010-10-19 Low-voltage rail-to-rail operation amplifying circuit

Country Status (1)

Country Link
CN (1) CN201813350U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8610614B1 (en) 2013-06-04 2013-12-17 King Fahd University Of Petroleum And Minerals CMOS current-mode folding amplifier
CN104218904A (en) * 2013-05-29 2014-12-17 上海华虹宏力半导体制造有限公司 Rail-to-rail-input AB-class-output full-differential operational amplifier
CN110719080A (en) * 2018-07-13 2020-01-21 爱思开海力士有限公司 Amplifying circuit, receiving circuit using the same, semiconductor device, and semiconductor system

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104218904A (en) * 2013-05-29 2014-12-17 上海华虹宏力半导体制造有限公司 Rail-to-rail-input AB-class-output full-differential operational amplifier
CN104218904B (en) * 2013-05-29 2017-06-06 上海华虹宏力半导体制造有限公司 The Full differential operational amplifier of rail-to-rail input AB class outputs
US8610614B1 (en) 2013-06-04 2013-12-17 King Fahd University Of Petroleum And Minerals CMOS current-mode folding amplifier
CN110719080A (en) * 2018-07-13 2020-01-21 爱思开海力士有限公司 Amplifying circuit, receiving circuit using the same, semiconductor device, and semiconductor system
CN110719080B (en) * 2018-07-13 2023-10-13 爱思开海力士有限公司 Amplifying circuit, receiving circuit using the same, semiconductor device, and semiconductor system

Similar Documents

Publication Publication Date Title
CN101958692B (en) Low-pressure rail-to-rail calculation magnification circuit
CN102176659B (en) Transconductance-enhanced recovery current folded MOS (metal oxide semiconductor) transistor cascade amplifier
CN101951236B (en) Digital variable gain amplifier
CN101443996B (en) Circuit and method for driving bulk capacitance of amplifier input transistors
CN101839941B (en) Signal sensing amplifier
CN102176658B (en) Symmetrically-folded MOS (metal oxide semiconductor) transistor cascade amplifier with broadband and low-power consumption
CN104242830B (en) Reconfigurable ultra-wideband low-noise amplifier based on active inductance
CN201846315U (en) Digital variable gain amplifier
CN106301242A (en) Current multiplexing type radio-frequency amplifier circuit
CN110212866A (en) A kind of low-power consumption three-stage operational amplifier driving heavy load capacitor
CN106330104A (en) Fully differential amplifier circuit with high accuracy and high dynamic range
CN201813350U (en) Low-voltage rail-to-rail operation amplifying circuit
CN102158188B (en) Low-power consumption bandwidth-multiplying operational amplifier realized by metal oxide semiconductor (MOS) devices
Shi et al. A 0.1-3.4 GHz LNA with multiple feedback and current-reuse technique based on 0.13-μm SOI CMOS
CN101951224B (en) Up-conversion mixer of silicon germanium bipolar complementary metal oxide semiconductor
US20140266390A1 (en) Transconductance circuit and frequency mixer
CN102158181B (en) Low-power consumption bandwidth multiplication chopping stabilized operational amplifier based on MOS (metal oxide semiconductor) device
CN100559706C (en) Radio-frequency differential-to-single-ended converter
CN106374858A (en) High-speed differential amplification circuit
JP2005311689A (en) High breakdown voltage cascode amplifier
CN206164477U (en) Current reuse type high frequency amplifier circuit
CN110350880A (en) A kind of Novel ultra wide band operational amplifier
CN206259909U (en) A kind of fully-differential amplifier circuit of high accuracy HDR
Hati et al. A power efficient and constant-g m 1.8 V CMOS operational transconductance amplifier with rail-to-rail input and output ranges for charge pump in phase-locked loop
CN203180852U (en) Integrated power amplifier interstage signal coupling circuit

Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20110427

Termination date: 20131019