CN102158188B - Low-power consumption bandwidth-multiplying operational amplifier realized by metal oxide semiconductor (MOS) devices - Google Patents

Low-power consumption bandwidth-multiplying operational amplifier realized by metal oxide semiconductor (MOS) devices Download PDF

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CN102158188B
CN102158188B CN 201110061084 CN201110061084A CN102158188B CN 102158188 B CN102158188 B CN 102158188B CN 201110061084 CN201110061084 CN 201110061084 CN 201110061084 A CN201110061084 A CN 201110061084A CN 102158188 B CN102158188 B CN 102158188B
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pipe
signal
current
drain electrode
power consumption
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CN102158188A (en
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方华军
赵晓
梁仁荣
王敬
许军
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Tsinghua University
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Abstract

The invention discloses a low-power consumption bandwidth-multiplying operational amplifier realized by metal oxide semiconductor (MOS) devices, which belong to the field of analogue integrated circuit design. The amplifier comprises a shunting input stage, an intermediate stage and a rail-to-rail output stage, wherein the shunting input stage consists of two N-channel metal oxide semiconductor (NMOS) transistors and two P-channel metal oxide semiconductor (PMOS) transistors, converts an input voltage signal into a current signal, and forms low forward-backward signal current; the intermediate stage consists of four low voltage current mirrors, and amplifies recovery current to realize a recovery current amplification function; and the rail-to-rail output stage consists of four PMOS transistors and four NMOS transistors to realize the rail-to-rail output of signals. The low-power consumption bandwidth-multiplying operational amplifier has a plurality of advantages of capability of increasing a bandwidth by more than triple under the condition of not remarkably increasing power consumption, increasing of low frequency gain and signal swing rate, capability of working in a low voltage environment to increase input/output signal amplitude, and the like; each MOS device can adopt the conventional MOS transistors, and also can adopt strained silicon MOS devices with high mobility to further improve the performance of the circuit.

Description

The low-power consumption bandwidth multiplication operational amplifier that adopts the MOS device to realize
Technical field
The invention belongs to the analog integrated circuit design field.Be particularly related to a kind of novel low-power consumption bandwidth multiplication operational amplifier.
Background technology
Since 20 centurial years generations, increasingly mature along with the development of sub-micron, sub-micro technology and system chip technology adopted battery powered portable type electronic product to obtain fast development and popularizes fast.Because the development of battery technology does not catch up with the development with electronic system far away, from the cardiac pacemaker to the hearing aids, mobile phone and variety of products all proposed strict restriction to the supply power voltage of electronic product.On the other hand, along with device size constantly dwindles, the puncture voltage of technique also reducing, has also proposed strict restriction to supply voltage.The electronic device performance requirement is more and more higher, and the construction cycle is shorter and shorter, and is also increasingly strict with the restriction of production cost to exploitation, makes the low-voltage simulation integrated circuit receive great concern.
Operational amplifier is most important circuit unit in the analog circuit, is widely used in analog circuit and the mixed signal treatment circuit, and such as switching capacity, modulus, digital to analog converter etc.But linearity does not reduce along with reducing of characteristic size owing to transistorized threshold voltage, so under the low supply voltage environment, the property indices of operational amplifier can reduce greatly.In order to improve the performance of amplifier, the bandwidth range of increasing circuit processing signals just must improve design to traditional folded common source and common grid amplifier, and this has just facilitated generation and the development of various novel low-power consumption wide-band amplifiers.
Over past ten years, the low-power consumption broadband operational amplifier emerges in multitude, and each major company also releases own corresponding product one after another.Its application is very extensive, can be used in the middle of DVD player, sound card, mobile phone, system, the various circuit of sensor.Traditional folded common source and common grid amplifier mainly has following characteristics: (1) input common-mode range is wider.(2) have higher low-frequency gain and wider bandwidth.(3) output voltage can reach the positive and negative two-stage of supply voltage.
The circuit structure of traditional folded common source and common grid amplifier as shown in Figure 1.Input stage is comprised of two PMOS pipes P1, P2, and positive-negative output end is arrived in its simultaneously drain electrode of folding flow through N3 and N4 of electric current with positive and negative both direction.But NMOS pipe N1 and N2 just play the effect of current source, and therefore traditional folded common source and common grid amplifier has the following disadvantages:
1. than the amplifier of other types, its quiescent dissipation is high.
2. current source N1 and N2 just serve as current source, and not being used to transmit small-signal current is a kind of " waste ".
3. in the strict situation of power consumption, be difficult to reach the performance of high bandwidth.
Summary of the invention
The objective of the invention is for overcoming the deficiency of prior art, a kind of low-power consumption bandwidth multiplication operational amplifier that adopts the MOS device to realize is proposed, it is characterized in that, described low-power consumption bandwidth multiplication operational amplifier adopts MOS technique to realize, comprises the shunting input stage, amplifies and reclaim electric current intergrade and rail-to-rail output stage;
Described shunting input stage manages P1a, P2a by PMOS and NMOS pipe N1b, N2b form; Described amplification is reclaimed the electric current intergrade and is comprised of four current mirrors, wherein NMOS pipe N4, N6, N7 form the first current mirror, NMOS pipe N8, N10, N11 form the second current mirror, and PMOS pipe P4, P6, P7 form the 3rd current mirror, and PMOS pipe P8, P10, P11 form the 4th current mirror; Described rail-to-rail output stage manages N5, N9 by NMOS and PMOS pipe P5, P9 form;
The forward input signal of described low-power consumption bandwidth multiplication operational amplifier converts voltage signal to downward small-signal current by input pipe P1a, this small-signal current is exaggerated K doubly by the first current mirror that is connected to form by N7, N4, N6, and then the drain electrode by N5 flows to the negative sense output; Simultaneously, the forward input signal converts voltage signal to upwards small-signal current by input pipe N1b, and this small-signal current is exaggerated K doubly by connected to form the 3rd current mirror by P7, P4, P6, and then the drain electrode by P5 also flows to the negative sense output; The negative sense input signal converts voltage signal to downward small-signal current by input pipe P2a, and this small-signal current is exaggerated K doubly by the second current mirror that is connected to form by N8, N10, N11, and then the drain electrode by N9 flows to the forward output; Simultaneously, the negative sense input signal converts voltage signal to upwards small-signal current by input pipe N2b, this small-signal current is exaggerated K doubly by the 4th current mirror that is connected to form by P8, P10, P11, then the drain electrode by P9 also flows to the forward output, and wherein each MOS device adopts conventional MOS transistor.Wherein each MOS device is replaced with the strain silicon MOS device of high mobility by conventional MOS transistor.
The invention has the beneficial effects as follows that novel low-power consumption bandwidth multiplication operational amplifier compares with the traditional design scheme and have following obvious advantage:
1. in the situation of not obvious increase power consumption, improve bandwidth more than three times.
2. increased the low-frequency gain of amplifier.
3. under the environment of low-voltage, increase the amplitude of input/output signal.
4. increase the large-signal Slew Rate of amplifier and reduced small-signal settling time.
Description of drawings:
Fig. 1 is the circuit structure diagram of traditional folded common source and common grid amplifier.
Fig. 2 is the circuit structure diagram of Novel low power consumption bandwidth multiplication operational amplifier of the present invention.
Fig. 3 is the simulation in the frequency-domain comparison diagram as a result of Novel low power consumption bandwidth of the present invention multiplication operational amplifier.
Embodiment:
A kind of low-power consumption bandwidth multiplication operational amplifier that adopts the MOS device to realize that the present invention proposes as shown in Figure 2, comprises the shunting input stage, amplifies and reclaim electric current intergrade and rail-to-rail output stage; Described shunting input stage mainly is comprised of PMOS pipe P1a, P2a and NMOS pipe N1b, N2b; Described shunting input stage manages P1a, P2a by PMOS and NMOS pipe N1b, N2b form; The intergrade that electric current is reclaimed in described amplification is comprised of four current mirrors, wherein NMOS pipe N4, N6, N7 form the first current mirror, NMOS pipe N8, N10, N11 form the second current mirror, and PMOS pipe P4, P6, P7 form the 3rd current mirror, and PMOS pipe P8, P10, P11 form the 4th current mirror; Described rail-to-rail output stage manages N5, N9 by NMOS and PMOS pipe P5, P9 form.
In Fig. 2, the forward input signal of described low-power consumption bandwidth multiplication operational amplifier converts voltage signal to downward small-signal current by input pipe P1a, this small-signal current is exaggerated K doubly by one-tenth the first current mirror by N7, N4, N6 connection group, and then the drain electrode by N5 flows to the negative sense output; Simultaneously, the forward input signal converts voltage signal to upwards small-signal current by input pipe N1b, and this small-signal current is exaggerated K doubly by connected to form the 3rd current mirror by P7, P4, P6, and then the drain electrode by P5 also flows to the negative sense output; The negative sense input signal converts voltage signal to downward small-signal current by input pipe P2a, and this small-signal current is exaggerated K doubly by the second current mirror that is connected to form by N8, N10, N11, and then the drain electrode by N9 flows to the forward output; Simultaneously, the negative sense input signal converts voltage signal to upwards small-signal current by input pipe N2b, and this small-signal current is exaggerated K doubly by the 4th current mirror that is connected to form by P8, P10, P11, and then the drain electrode by P9 also flows to the forward output.Wherein each MOS device adopts conventional MOS transistor.Wherein each MOS device is replaced with the strain silicon MOS device of high mobility by conventional MOS transistor.
In the embodiment circuit diagram of the low-power consumption bandwidth multiplication operational amplifier that employing MOS device shown in Figure 2 is realized, input stage is comprised of two PMOS pipe P1a, P2a and two NMOS pipes N1a, N2a, wherein in order to keep the PMOS pipe consistent with the mutual conductance of NMOS pipe, the size of PMOS pipe is the twice of the size of NMOS pipe.Simultaneously, the grid of NMOS pipe N7, N6, the drain electrode of N4 are connected with the P1a pipe drain electrode of input stage, the grid of NMOS pipe N10, N11, the drain electrode of N8 are connected with the P2a pipe drain electrode of input stage, the grid of PMOS pipe P7, P6, the drain electrode of P4 are connected with the N1b pipe drain electrode of input stage, and the drain electrode of PMOS pipe P8, the grid of P10, P11 are connected with the N2b pipe drain electrode of input stage.In addition, the drain electrode of PMOS pipe P13 links to each other with the drain electrode of P6, and the drain electrode of P12 links to each other with the drain electrode of P11, and the grid of P12 and P13 links to each other with common mode feedback amplifier CMFB together, thereby so that the dc voltage stability of the output of amplifier on a fixed value.
Fig. 3 is novel low-power consumption bandwidth multiplication operational amplifier of the present invention and the frequency response simulation result comparison diagram of traditional folded common source and common grid amplifier.As can be seen from the figure, the bandwidth of novel amplifier of the present invention has improved three times than traditional folded common source and common grid amplifier.Simultaneously, low-frequency gain still slightly is improved.

Claims (4)

1. a low-power consumption bandwidth multiplication operational amplifier that adopts the MOS device to realize is characterized in that, described low-power consumption bandwidth multiplication operational amplifier adopts MOS technique to realize, comprises the shunting input stage, amplifies and reclaim electric current intergrade and rail-to-rail output stage;
Described shunting input stage manages P1a, P2a by PMOS and NMOS pipe N1b, N2b form; Described amplification is reclaimed the electric current intergrade and is comprised of four current mirrors, wherein NMOS pipe N4, N6, N7 form the first current mirror, NMOS pipe N8, N10, N11 form the second current mirror, and PMOS pipe P4, P6, P7 form the 3rd current mirror, and PMOS pipe P8, P10, P11 form the 4th current mirror; Described rail-to-rail output stage manages N5, N9 by NMOS and PMOS pipe P5, P9 form;
The forward input signal of described low-power consumption bandwidth multiplication operational amplifier converts voltage signal to downward small-signal current by input pipe P1a, this small-signal current amplifies K doubly by the first current mirror that is connected to form by N7, N4, N6, and then the drain electrode by N5 flows to the negative sense output; Simultaneously, the forward input signal converts voltage signal to upwards small-signal current by input pipe N1b, and this small-signal current amplifies K doubly by connected to form the 3rd current mirror by P7, P4, P6, and then the drain electrode by P5 also flows to the negative sense output; The negative sense input signal converts voltage signal to downward small-signal current by input pipe P2a, and this small-signal current amplifies K doubly by the second current mirror that is connected to form by N8, N10, N11, and then the drain electrode by N9 flows to the forward output; Simultaneously, the negative sense input signal converts voltage signal to upwards small-signal current by input pipe N2b, this small-signal current amplifies K doubly by the 4th current mirror that is connected to form by P8, P10, P11, then the drain electrode by P9 also flows to the forward output, and wherein each MOS device adopts conventional MOS transistor.
2. low-power consumption bandwidth multiplication operational amplifier according to claim 1 is characterized in that wherein each MOS device is replaced with the strain silicon MOS device of high mobility by conventional MOS transistor.
3. low-power consumption bandwidth multiplication operational amplifier according to claim 1 is characterized in that, two PMOS pipes of described composition shunting input stage are consistent with the mutual conductance of two NMOS pipes, and the size of PMOS pipe is the twice of NMOS pipe size.
4. low-power consumption bandwidth according to claim 1 multiplication operational amplifier, it is characterized in that, the grid of NMOS pipe N7, N6, the drain electrode of N4 are connected with the P1a pipe drain electrode of input stage, the grid of NMOS pipe N10, N11, the drain electrode of N8 are connected with the P2a pipe drain electrode of input stage, the grid of PMOS pipe P7, P6, the drain electrode of P4 are connected with the N1b pipe drain electrode of input stage, and the drain electrode of PMOS pipe P8, the grid of P10, P11 are connected with the N2b pipe drain electrode of input stage.
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CN102571005B (en) * 2010-12-27 2016-08-17 无锡华润上华半导体有限公司 Rail-to-rail operational amplifier
CN103427772A (en) * 2012-05-18 2013-12-04 电子科技大学 Closed-loop gain-adjustable operational amplifier
CN103138743A (en) * 2013-03-06 2013-06-05 中国科学技术大学 High-efficiency low-power-consumption on-off keying detector of impulse ultra wide band
CN104506150B (en) 2014-10-30 2017-11-17 华为技术有限公司 A kind of rail-to-rail operational amplifier of ultra-low operating voltage and its Differential Input amplification grade circuit and output-stage circuit
CN104467716B (en) * 2014-12-18 2017-12-29 北京集创北方科技股份有限公司 A kind of design of the rail-to-rail amplifier of fully differential of output common mode voltage constant

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