CN101839941B - Signal sensing amplifier - Google Patents

Abstract

The invention discloses a signal sensing amplifier, comprising a difference transconductance input circuit, a difference cascode transduction amplifying circuit and an active load circuit. The difference transconductance input circuit is a voltage-to-current difference input stage which has a symmetrical structure and can realize wide common-mode input range, the difference cascode transduction amplifying circuit comprises transistors M5 and M6 with same types and sizes, and a CB3 (Circuit Breaker 3) and a CB4 (Circuit Breaker 4) are respectively connected with source electrodes of the M5 and the M6 to provide direct current bias. The invention provides the wide common-mode input capable of supporting the CMOS (Complementary Metal Oxide Semiconductor) process, in particular to the sensing amplifier which is wider than a power supply voltage track and has high speed, high precision, low voltage and low power consumption. The circuit is not influenced by the process, the power supply voltage and temperature (PVT) excursion, and can be used as a comparator and an amplifier to detect current or sense circuit.

Description

Signal sensing amplifier

Affiliated technical field

The present invention relates to a kind of signal sensing amplifier; Especially; A kind of low pressure, low-power consumption, common-mode input range can be widened the high speed sense amplifying circuits to the power supply supply voltage rail, and it is used for current status to power supply equipment current delivery passage and detects or the channel current size is carried out sensing.

Background technology

At present, in many consumer electronics, communication apparatus, the computer equipment power supply, often need carry out the direct current conversion process, to satisfy unequally loaded supply voltage demand.In these were used, typical converter was the DC-DC converter, and it has occupied a large amount of volume, power consumption and the costs of electronic equipment.Electronic equipment development in future trend is low pressure, low-power consumption, miniaturization and cost degradation; This just needs the design of DC-DC converter circuit towards low pressure, low-power consumption, high-level efficiency development; The switching frequency of DC-DC converter is towards high frequency development (switching frequency is that the DC-DC converter of ten order of megahertz is a development in future trend), and manufacture craft aspect court is the CMOS technological development cheaply.Transient response speed is fast, control is simple because current-control type DC-DC converter has, be easy to compensate, high-precision output voltage and inherent control and limitation capability to the power switch electric current; Therefore the DC-DC converter adopts current control mode more; But in the face of electronic equipment development in future trend, as the necessary current detecting of Current Control or current sensing circuit in low pressure, low-power consumption, at a high speed, received great challenge aspect the high precision.

In current control mode, controller could be confirmed the control signal to power switch after need understanding the current status information of current channel.This just need carry out the real-time sensing of size of current to current channel, or the channel current state is carried out current detecting (detecting like peak point current state-detection, valley point current state-detection or zero current condition).For the sensing of size of current, its output waveform is passage waveform voltage or the current waveform behind the constant convergent-divergent in proportion.And to the detection of current status, its output waveform is a digital level, and detected waveform is corresponding digital level state with regard to saltus step after sensed current reaches predefined thresholding.

With CMOS technology cheaply is example, and theoretically, current detecting or sensing circuit have signal input and source signal to import dual mode.It is narrow to adopt the structure of grid input signal to be subject to common-mode input range, can not effectively operate in it beyond power supply supply voltage rail, its application scenario be limited in that common mode detects or sensing voltage at the supply voltage rail with interior or slightly wide occasion.Can better describe this situation through Fig. 1 a, in Fig. 1 a, describe the traditional amplifier with folded common source and common grid structure, this amplifier gain is higher, but its input common-mode range need guarantee to let difference input pipe M ₁, M ₂Do not get into linear zone, must guarantee its current offset source C yet _B2And C _B3Operate as normal, thus make its common-mode input range have a upper limit, and the maximal value of its common-mode input range is:

V _{CM_MAX}＝V _DD+V _TH-V _CB23 (1)

Wherein:

V _DDIt is supply voltage;

V _THBe differential pair tube M1, the threshold voltage of M2;

V _CB23Be current source C _B2And C _B3The minimum voltage difference that its two ends need during operate as normal.

Can find out that from formula (1) the highest input common mode voltage of this circuit is limited by the threshold voltage of its supply voltage, differential pair crystal and current source minimum operationg pressure differential.Aspect speed, the common source circuit can influence its response speed owing to the Miller phenomenon of differential pair tube mostly.

So operate in the situation beyond the power supply supply voltage rail for common mode detection or sensing voltage; Generally use common gate mode by the source electrode input signal; Though general common grid input method can produce the differential mode computing and circuit is simple, low in energy consumption, the asymmetry of its structure particularly makes its performance receive the influence of technology, supply voltage and temperature (PVT) drift serious under CMOS technology; Robustness is relatively poor; Especially it is simple in structure, is difficult to improve its gain bandwidth product, causes its speed and precision limited.Can better describe this situation through Fig. 1 b, describe the both-end that adopts the source electrode input signal among Fig. 1 b and arrive single-ended differential mode amplifier, wherein M ₁The employing diode connects, with V _1NSignal is coupled to M ₂Grid and M ₂Source signal V _IPForm the differential mode computing, but because the asymmetry of this structure, it is serious that one side its threshold value when this circuit uses as comparer receives the influence of PVT drift, on the other hand when this structure is used as amplifier, because M ₂Drain electrode as output, make the direct current fluctuation of output voltage can cause M ₁And M ₂The dc point of drain voltage does not match, and this will worsen input offset voltage.And this structure output terminal equals M to the common mode admittance of input end ₂Mutual conductance, cause its common-mode rejection ratio extremely low.Its gain characteristic is subject to M ₂The highest-gain characteristic be M ₂Self mutual conductance g _m(M ₂) divided by its source stray admittance g _Ds(M ₂), if will strengthen its gain or common-mode rejection ratio or M ₁And M ₂Match condition then need connect commonsource amplifier in back level, but like this can be because the Miller phenomenon that common source is introduced and seriously limit its bandwidth.

Summary of the invention

Drawback in view of prior art; The object of the present invention is to provide a kind of wide common-mode input range that can preferentially support CMOS technology; Particularly can be wider than high speed, high precision, the low pressure of supply voltage rail, the sensing amplifier of low-power consumption; This circuit does not receive the influence of technology, supply voltage, temperature (PVT) drift, can realize that current detection circuit can realize current sensing circuit as the amplifier function again as comparator function.

Therefore, the technical scheme of sensing amplifier of the present invention is as shown in Figure 2, comprises differential transconductance input circuit, difference cascode transduction amplifying circuit and active pull-up circuit.Said differential transconductance input circuit is one and has voltage that symmetrical structure can realize wide common-mode input range to the current-differencing input stage, comprises (M ₁, M ₂) and (M of the generation difference current that constitutes ₃, M ₄) another of the generation difference current that constitutes, M ₁～M ₄Be the transistor of same type, wherein, M ₁With M ₄Measure-alike, M ₂And M ₃Measure-alike.And M ₁And M ₄All adopt diode to connect and respectively by C _B1And C _B2The DC current biasing is provided, M ₁With M ₃Source electrode (or emitter) link together, constitute an input end of differential input stage, M ₄With M ₂Source electrode (or emitter) link together, constitute another input end of differential input stage, M ₂And M ₃Drain electrode (or collector) link to each other with the next stage input end as the output terminal of difference current; Said difference cascode transduction amplifying circuit comprises the transistor M of same type and size ₅And M ₆, C _B3And C _B4Respectively with M ₅And M ₆Source electrode (or emitter) connect and DC current biasing be provided, this tie point is as the difference current input end of the corresponding levels, M ₅And M ₆Grid (or base stage) has common DC voltage biasing V _B, M ₅And M ₆Drain electrode separately links to each other with active pull-up circuit and forms the output terminal of signal amplification as sensing amplifier of the present invention.

The present invention utilizes source electrode (or emitter) input differential signal, has the input common mode voltage of wide region, and circuit adopts symmetrical structure to have robustness preferably, and internal signal transmits with current system, can realize that high gain-bandwidth is long-pending with miniwatt, and response speed is fast.Below explain detailedly with the specific embodiment conjunction with figs. so that be easier to understand the object of the invention, technology contents, characteristics and effect thereof.

Description of drawings

The collapsible common source and common grid amplifier of Fig. 1 a tradition grid input signal

The sensing amplifier of Fig. 1 b tradition source electrode input signal

Fig. 2 sensing amplifier block diagram of the present invention

An example circuit diagram of Fig. 3 a sensing amplifier of the present invention

Another example circuit diagram that can use as comparer of Fig. 3 b sensing amplifier of the present invention

Fig. 4 a adopts one of them typical application of the current sensing circuit of Fig. 3 a example circuit

The simulation waveform embodiment of the present invention of one of them typical application of the current sensing circuit of Fig. 4 b employing Fig. 3 a example circuit

(1) invention block diagram technology is set forth

The technical scheme of sensing amplifier of the present invention is as shown in Figure 2, comprises differential transconductance input circuit, difference cascode transduction amplifying circuit and active pull-up circuit.Said differential transconductance input circuit is one and has voltage that symmetrical structure can realize wide common-mode input range to the current-differencing input stage, comprises (M ₁, M ₂) and (M of the generation difference current that constitutes ₃, M ₄) another of the generation difference current that constitutes, M ₁～M ₄Be the transistor of same type, wherein, M ₁With M ₄Measure-alike, M ₂And M ₃Measure-alike, M ₁Or M ₄With M ₂Or M ₃Equivalent breadth length ratio be M: N.And M ₁And M ₄All adopt diode to connect and respectively by C _B1And C _B2The DC current biasing is provided, M ₁With M ₃Source electrode (or emitter) link together, constitute an input end V of differential input stage _IP, M ₄With M ₂Source electrode (or emitter) link together, constitute another input end V of differential input stage _IN, V at this moment _IPAC portion pass through M ₁Be directly coupled to M ₂Grid (or base stage), V _INAC portion pass through M ₄Be directly coupled to M ₃Grid (or base stage), M ₂And M ₃Drain electrode (or collector) as difference current (Δ i _D1, Δ i _D2)Output terminal, and satisfy:

$\mathrm{\&Delta;}{i}_{\mathrm{<figure-callout\; id="2"\; label="D"\; filenames="HSA00000126362900032.png"\; state="\{\{state\}\}">D</figure-callout>}2}=-\mathrm{\&Delta;}{i}_{D1}=\mathrm{\&Delta;v}\&CenterDot;g_{m({\mathrm{<figure-callout\; id="2"\; label="M"\; filenames="HSA00000126362900032.png"\; state="\{\{state\}\}">M</figure-callout>}}_2,M_3)}---\left(2\right)$

Wherein:

Be M ₂And M ₃Mutual conductance;

Δ v is the pressure reduction of input end.

It is the common-mode input range that can not had the upper limit in theory that this input stage adopts the advantage of source electrode (emitter) input signal, and its minimum input common mode voltage is:

$V_{\mathrm{CM}\_\mathrm{MIN}}=V_{\mathrm{SG}\left(M_{1,4}\right)}+V_{C_{B1.2}}---\left(3\right)$

Wherein:

Be M ₁, M ₄Source-grid (or emitter-base stage) driving voltage;

Be current source C _B1And C _B2The minimum voltage difference that its two ends need during operate as normal.

Difference current (Δ i _D1, Δ i _D2) output terminal link to each other with the input end of said difference cascode transduction amplifying circuit, comprise the transistor M of same type and size ₅And M ₆, C _B3And C _B4Respectively with M ₅And M ₆Source electrode (or emitter, preferred FET) connect and the DC current biasing be provided, this tie point is as the difference current input end of the corresponding levels, M ₅And M ₆Grid (or base stage) has common DC voltage biasing V _B, especially work as V _BWhen adopting the cascodes that gain strengthens, make M ₅And M ₆The node impedance that source electrode place is arranged lower, make inferior limit of this point at high frequency treatment, thereby obtain the frequency response of getting well.M ₅And M ₆Drain electrode separately links to each other with active pull-up circuit and forms the output terminal of signal amplification as sensing amplifier of the present invention.Active load generally adopts the current mirror mode, thereby especially the cascade interface that strengthens of cascodes or gain can obtain high output impedance and obtains high output gain, and its every dc bias current is:

$I_{\mathrm{active}\_\mathrm{load}}=I_{C_{B3.4}}-\frac{N}{M}{I}_{C_{B1.2}}---\left(4\right)$

Wherein:

Be C _B1And C _B2Bias current

Be C _B3And C _B4Bias current

So C _B3And C _B4Bias current must be enough greatly, to satisfy the direct current biasing demand of active load.

Bias voltage V _BMust be enough high to satisfy cascade transduction amplifier operate as normal, with respect to power rail V _PS2, V _BThe condition that needs to satisfy is:

$V_B>V_{\mathrm{GS}\left(M\mathrm{5,6}\right)}+V_{C_{B3.4}}---\left(5\right)$

Wherein:

V _{GS (M5,6)}Be M ₅, M ₆Grid source (base-emitter) driving voltage

Be C _B3, C _B4Minimum

Simultaneously, the simulation output area of sensing amplifier receives V _BWith the restriction of active pull-up circuit structure, its minimum output voltage is by V _BBe restricted to:

V _O(min)＝V _B-V _TH (5)

Wherein:

V _THThreshold voltage for MOSFET.

(2) instance of sensing amplifier shown in Fig. 3 a and the typical application (Fig. 4) in current sense thereof is set forth

Fig. 3 a is depicted as an instance of sensing amplifier, measure-alike PMOS transistor M among Fig. 3 a ₁₃, M ₁₄, M ₁₅Be the current offset part on basis, its bias current is 1uA, M ₁₆Respectively and M ₅, M ₆, M ₇, M ₈Bias current sources C in the pie graph 2 of pairing back _B1, C _B2, C _B3, C _B4, M wherein ₁₆, M ₅, M ₆Measure-alike, M ₇And M ₈The equivalence breadth length ratio is M ₁₆2 times so that the current offset of 1uA is provided for the active load of back; PMOS transistor M ₁～M ₄M in the corresponding diagram 2 ₁～M ₄, its size is all identical, and input end is respectively vip and vin.Measure-alike NMOS pipe M ₉And M ₁₀M in the pie graph 2 ₅And M ₆, its gate bias is managed M by NMOS ₁₇M is provided ₁₇Equivalent wide ratio be M ₁₆1/12; Measure-alike PMOS pipe M ₁₁And M ₁₂Constitute current mirror load.

This circuit is single-ended output, and the highest of output area is than the low 0.2V of supply voltage, and its DC current gain equals 2g _{M (M2,3)}* r _{O (M12)}, g wherein _{M (M2,3)}Be M ₂And M ₃Mutual conductance, r _{O (M12)}Be M ₁₂Output impedance.

Fig. 4 a is the instance of a typical application in current sense of this Fig. 3 a amplifier of employing, and is wherein identical with Fig. 3 a amplifier in the frame of broken lines s; Supply voltage V _DDBe 5V, M _SWBe current switch, M _P1Be current sense pipe, M _P1Size and M _SWRatio be 2: 10 ⁵, they have drive signal V _DRVV is worked as in control _DRVElectric current is closed during=5V, works as V _DRV=0 o'clock electric current I _LThrough.The static input current of amplifier is I _B=2uA, M _P2Link to each other with the output of amplifier and back linking to each other constitute negative feedback, M with the negative terminal input vin of amplifier _P2Also can make M among Fig. 3 a ₁₁And M ₁₂More symmetry is worked as V _DRV, force M at=0 o'clock _P1And M _SWVoltage is identical, through I _CCompensation, thereby the electric current I that senses _SensBe I _L2/10 ⁵, this function of current is to wave filter R _SAnd C _SAfter output voltage V _SenseShown in Fig. 4 b, waveform can satisfy the demand of high frequency switch power less than 50ns Time Created.

(3) sensing amplifier instance shown in Fig. 3 b is set forth

Fig. 3 b is depicted as another instance of sensing amplifier, measure-alike PMOS transistor M among Fig. 3 b ₁₅, M ₁₆, M ₁₇Be the current offset part on basis, its bias current is 1uA, M ₁₈Respectively and M ₅, M ₆, M ₇, M ₈Bias current sources C in the pie graph 2 of pairing back _B1, C _B2, C _B3, C _B4, M wherein ₁₈, M ₅, M ₆Measure-alike, M ₇And M ₈The equivalence breadth length ratio is M ₁₆2 times so that the current offset of 1uA is provided for the active load of back; PMOS transistor M ₁～M ₄M in the corresponding diagram 2 ₁～M ₄, its size is all identical, and input end is respectively vip and vin.Measure-alike NMOS pipe M ₉And M ₁₀M in the pie graph 2 ₅And M ₆, its gate bias is managed M by NMOS ₁₉M is provided ₁₉Equivalent wide ratio be M ₁₈1/12; Measure-alike PMOS pipe M ₁₁And M ₁₂, M ₁₃, M _14A, M _14BConstitute the cascade load, M _14AAnd M _14BBiasing circuit be 1uA.

This circuit is single-ended output, has symmetrical structure, and gain reaches g _{M (M2,3)}r _{O (M12)}g _{M (m13)}r _{O (m13)}, be suitable as that comparer detects at current detecting such as peak current detection, valley point current, use in the zero passage detection.

The useful result that more than can know this circuit comprises:

(a), common-mode input range is big, the minimum value of input common mode voltage is V in theory _TH+ 2V _OV, there is not higher limit, can reach any high pressure that technology is supported, wherein V _THBe transistorized threshold voltage (about 0.7V), V _OV(0.1V～0.2V) is generally got in board design for its overdrive voltage;

(b), whole signal flow is by the source electrode or the emitting stage input of differential mode; Reduced the Miller phenomenon; Response speed is fast; Can under miniwatt, realize big gain bandwidth product, and the influence that differential mode can make the input dc offset voltage drifted about by technology, supply voltage, temperature (PVT) is little, also makes entire circuit have stronger common mode inhibition capacity.

Claims (1)

1. signal sensing amplifier is used for current channel is carried out the real-time sensing of size of current, or the channel current state is carried out current detecting, comprises differential transconductance input circuit, difference cascode transduction amplifying circuit and active pull-up circuit; Said differential transconductance input circuit is one and has voltage that symmetrical structure can realize wide common-mode input range to the current-differencing input stage, comprises by transistor M ₁And M ₂One of the generation difference current that constitutes and by transistor M ₃And M ₄Another of the generation difference current that constitutes, transistor M ₁And M ₄All adopt diode to connect and respectively by current source C _B1And C _B2The DC current biasing is provided, M ₁With M ₃Source electrode link together, constitute an input end of differential input stage, M ₄With M ₂Source electrode link together, constitute another input end of differential input stage, transistor M ₂And M ₃Drain electrode link to each other with the next stage input end as the output terminal of difference current; Said difference cascode transduction amplifying circuit comprises the transistor M of same type and size ₅And M ₆, current source C _B3And C _B4Respectively with transistor M ₅With M ₆Source electrode connect and the DC current biasing be provided, this tie point is as the difference current input end of the corresponding levels, transistor M ₅And M ₆Grid has common DC voltage biasing V _B, M ₅And M ₆Drain electrode separately links to each other with active pull-up circuit and forms the output terminal of signal amplification as said sensing amplifier; Said transistor M ₁, M ₂, M ₃, M ₄Transistor for same type; Transistor M ₁With M ₄Measure-alike, transistor M ₂And M ₃Measure-alike.

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