CN201509366U - Weld pad conducting structure for circuit board - Google Patents

Weld pad conducting structure for circuit board Download PDF

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Publication number
CN201509366U
CN201509366U CN2009202362872U CN200920236287U CN201509366U CN 201509366 U CN201509366 U CN 201509366U CN 2009202362872 U CN2009202362872 U CN 2009202362872U CN 200920236287 U CN200920236287 U CN 200920236287U CN 201509366 U CN201509366 U CN 201509366U
Authority
CN
China
Prior art keywords
circuit board
circuit
layer
line layer
weld pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2009202362872U
Other languages
Chinese (zh)
Inventor
黄坤
唐雪明
曹庆荣
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kunshan Huasheng circuit board research and development base Co Ltd
Original Assignee
KUNSHAN HUASHENG PRINTED CIRCUIT BOARD CO Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by KUNSHAN HUASHENG PRINTED CIRCUIT BOARD CO Ltd filed Critical KUNSHAN HUASHENG PRINTED CIRCUIT BOARD CO Ltd
Priority to CN2009202362872U priority Critical patent/CN201509366U/en
Application granted granted Critical
Publication of CN201509366U publication Critical patent/CN201509366U/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

The utility model discloses a weld pad conducting structure for a circuit board. The weld pad conducting structure comprises at least two circuit layers; weld pads are included in the circuit layer on the surface of a circuit board; according to the design, a plurality of conducting holes are formed in the corresponding positions of a plurality of weld pads and penetrate at least two adjacent circuit layers in the circuit board; and a metal layer electroplated on the inner wall of each conducting hole correspondingly connects and conducts all the circuit layers through which the conducting holes penetrate. By forming the conducting holes in the corresponding positions of the weld pads in the circuit board, a layer conducting structure of the circuit board is formed, so that the design space of the conducting holes of the circuit board is expanded greatly, and the layout design of a circuit board with concentrated wiring and smaller area is facilitated.

Description

The solder pad conduction structure of circuit board
Technical field
The utility model relates to board structure of circuit, especially a kind of solder pad conduction structure of circuit board.
Background technology
The interlayer conduction of circuit board is all realized by the technology of via, the via of existing circuit board all designs on the circuit board space outside the bond pad locations, and for wiring for intensive or the circuit board that area is less, the design space of via is too narrow and small and limited the composing design of circuit board.
Summary of the invention
In order to overcome above-mentioned defective, the utility model provides a kind of solder pad conduction structure of circuit board, effectively the via design space of extension circuit plate.
The utility model for the technical scheme that solves its technical problem and adopt is:
A kind of solder pad conduction structure of circuit board, comprise two-tier circuit plate line layer at least, each weld pad is included in the circuit board line layer of circuit board surface, described circuit board is offered some vias by design in the correspondence position of some weld pads, each via runs through the plate of two-tier circuit at least line layer adjacent in the circuit board by design, the inwall of described each via is electroplate with metal level, corresponding its each the circuit board line layer that is run through of conducting that connects of described metal level.
As further improvement of the utility model, when described circuit board is double-sided PCB, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, this two-tier circuit plate line layer forms the outer-layer circuit and the weld pad of circuit board respectively, and described each via all runs through the outer-layer circuit (being that described via is a plated-through-hole) on circuit board two surfaces.
As further improvement of the utility model, when described circuit board is multilayer circuit board, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, the circuit board line layer on these circuit board two surfaces forms the outer-layer circuit and the weld pad of circuit board respectively; Be provided with at least one layer circuit board line layer in the middle of this circuit board, each the circuit board line layer in the middle of this circuit board forms the internal layer circuit of circuit board; Each via runs through two-layer at least structure adjacent in each circuit board line layer by design and is divided into three kinds: first kind of via runs through lip-deep outer-layer circuit of circuit board and at least one deck internal layer circuit (be described first kind via be blind hole) adjacent with this outer-layer circuit, second kind of via do not run through any outer-layer circuit, only run through the middle adjacent two-layer at least internal layer circuit (being that described second kind of via is buried via hole) of circuit board, the third via runs through the outer-layer circuit (being that described the third via is a plated-through-hole) on circuit board two surfaces simultaneously.
As further improvement of the utility model, filling has welding resistance printing ink in the metal level of described via inwall.
As further improvement of the utility model, run through circuit board surface position that circuit board surface and its run through in the described via and be provided with weld pad, this weld pad covers the welding resistance printing ink in the described via inwall metal level.
The beneficial effects of the utility model are: the mode of offering via in the position of employing correspondence of weld pad in circuit board forms the interlayer conduction structure of circuit board, significantly expand the via design space of circuit board, made things convenient for the composing design of connect up intensive or the circuit board that area is less.
Description of drawings
Fig. 1 is the cut-away section structure enlarged diagram of double-sided PCB described in the utility model;
Fig. 2 is the cut-away section structure enlarged diagram of multilayer circuit board described in the utility model.
Embodiment
Embodiment: a kind of solder pad conduction structure of circuit board, comprise two-tier circuit plate line layer at least, each weld pad 1 is included in the circuit board line layer of circuit board surface, described circuit board is offered some vias 2 by design in the correspondence position of some weld pads 1, each via 2 runs through the plate of two-tier circuit at least line layer adjacent in the circuit board by design, the inwall of described each via 2 is electroplate with metal level 3, described metal level 3 corresponding its each circuit board line layers that is run through of conducting that connect.
When described circuit board is double-sided PCB, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, this two-tier circuit plate line layer forms the outer-layer circuit 4 and the weld pad 1 of circuit board respectively, and described each via 2 all runs through the outer-layer circuit 4 (being that described via is a plated-through-hole) on circuit board two surfaces.
When described circuit board is multilayer circuit board, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, the circuit board line layer on these circuit board two surfaces forms the outer-layer circuit 4 and the weld pad 1 of circuit board respectively; Be provided with at least one layer circuit board line layer in the middle of this circuit board, each the circuit board line layer in the middle of this circuit board forms the internal layer circuit 5 of circuit board; Each via 2 runs through two-layer at least structure adjacent in each circuit board line layer by design and is divided into three kinds: first kind of via 21 runs through a lip-deep outer-layer circuit 4 of circuit board and at least one deck internal layer circuit 5 (be described first kind via be blind hole) adjacent with this outer-layer circuit, second kind of via 22 do not run through any outer-layer circuit 4, only run through the middle adjacent two-layer at least internal layer circuit 5 (being that described second kind of via is buried via hole) of circuit board, the third via 23 runs through the outer-layer circuit 4 (being that described the third via is a plated-through-hole) on circuit board two surfaces simultaneously.
Filling has welding resistance printing ink 6 in the metal level of described via inwall.
Run through circuit board surface position that circuit board surface and its run through in the described via 2 and be provided with weld pad 1, the welding resistance printing ink 6 that this weld pad 1 covers in the described via 1 inwall metal level 3.
The mode of offering via in the position of employing correspondence of weld pad in circuit board forms the interlayer conduction structure of circuit board, has significantly expanded the via design space of circuit board, has made things convenient for the composing design of connect up intensive or the circuit board that area is less.

Claims (5)

1. the solder pad conduction structure of a circuit board, comprise two-tier circuit plate line layer at least, each weld pad (1) is included in the circuit board line layer of circuit board surface, it is characterized in that: described circuit board is offered some vias (2) by design in the correspondence position of some weld pads (1), each via (2) runs through the plate of two-tier circuit at least line layer adjacent in the circuit board by design, the inwall of described each via (2) is electroplate with metal level (3), corresponding its each the circuit board line layer that is run through of conducting that connects of described metal level (3).
2. the solder pad conduction structure of circuit board according to claim 1, it is characterized in that: when described circuit board is double-sided PCB, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, this two-tier circuit plate line layer forms the outer-layer circuit (4) and the weld pad (1) of circuit board respectively, and described each via (2) all runs through the outer-layer circuit (4) on circuit board two surfaces.
3. the solder pad conduction structure of circuit board according to claim 1, it is characterized in that: when described circuit board is multilayer circuit board, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, the circuit board line layer on these circuit board two surfaces forms the outer-layer circuit (4) and the weld pad (1) of circuit board respectively; Be provided with at least one layer circuit board line layer in the middle of this circuit board, each the circuit board line layer in the middle of this circuit board forms the internal layer circuit (5) of circuit board; Each via (2) runs through two-layer at least structure adjacent in each circuit board line layer by design and is divided into three kinds: first kind of via (21) runs through a lip-deep outer-layer circuit of circuit board (4) and at least one deck internal layer circuit (5) adjacent with this outer-layer circuit, second kind of via (22) do not run through any outer-layer circuit (4), only run through the middle adjacent two-layer at least internal layer circuit (5) of circuit board, the third via (23) runs through the outer-layer circuit (4) on circuit board two surfaces simultaneously.
4. according to the solder pad conduction structure of claim 1,2 or 3 described circuit boards, it is characterized in that: filling has welding resistance printing ink (6) in the metal level of described via inwall.
5. the solder pad conduction structure of circuit board according to claim 4, it is characterized in that: run through circuit board surface position that circuit board surface and its run through in the described via (2) and be provided with weld pad (1), this weld pad (1) covers the welding resistance printing ink (6) in described via (1) the inwall metal level (3).
CN2009202362872U 2009-09-25 2009-09-25 Weld pad conducting structure for circuit board Expired - Fee Related CN201509366U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2009202362872U CN201509366U (en) 2009-09-25 2009-09-25 Weld pad conducting structure for circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2009202362872U CN201509366U (en) 2009-09-25 2009-09-25 Weld pad conducting structure for circuit board

Publications (1)

Publication Number Publication Date
CN201509366U true CN201509366U (en) 2010-06-16

Family

ID=42470484

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2009202362872U Expired - Fee Related CN201509366U (en) 2009-09-25 2009-09-25 Weld pad conducting structure for circuit board

Country Status (1)

Country Link
CN (1) CN201509366U (en)

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Legal Events

Date Code Title Description
C14 Grant of patent or utility model
GR01 Patent grant
C41 Transfer of patent application or patent right or utility model
TR01 Transfer of patent right

Effective date of registration: 20160629

Address after: 215341 Suzhou city in Jiangsu province Kunshan City Qiandeng Fumin Industrial Development Zone

Patentee after: Kunshan Huasheng circuit board research and development base Co Ltd

Address before: Henderson Fumin Industrial Zone, Qiandeng Town Road Kunshan City, Jiangsu province 215341 No. 198

Patentee before: Kunshan Huasheng Printed Circuit Board Co., Ltd.

CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20100616

Termination date: 20170925