CN101917817A - Solder pad conduction structure of circuit board - Google Patents
Solder pad conduction structure of circuit board Download PDFInfo
- Publication number
- CN101917817A CN101917817A CN2009100355737A CN200910035573A CN101917817A CN 101917817 A CN101917817 A CN 101917817A CN 2009100355737 A CN2009100355737 A CN 2009100355737A CN 200910035573 A CN200910035573 A CN 200910035573A CN 101917817 A CN101917817 A CN 101917817A
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- Prior art keywords
- circuit board
- circuit
- layer
- line layer
- conduction structure
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Abstract
The invention discloses a solder pad conduction structure of a circuit board, comprising at least two layers of circuit layers of the circuit board, wherein each solder pad is included in the circuit layers of the circuit board on the surface of the circuit board; the circuit board is provided with a plurality of conduction holes according to the design in a position which corresponds to the plurality of solder pads; each conduction hole penetrates through the at least two layers of adjacent circuit layers of the circuit board according to the design; and inner walls of all the conduction hole are electroplated with metal layers which are connected with each other to conduct all the circuit layers of the circuit board penetrated by the conduction holes. An interlayer conduction structure of the circuit board formed in a way of arranging the conduction holes in the corresponding position of solder pads in the circuit board is adopted, therefore, the design space of the conduction holes of the circuit board is greatly enlarged, and the typeset of the circuit board with dense wirings or smaller area is very convenient.
Description
Technical field
The present invention relates to board structure of circuit, especially a kind of solder pad conduction structure of circuit board.
Background technology
The interlayer conduction of circuit board is all realized by the technology of via, the via of existing circuit board all designs on the circuit board space outside the bond pad locations, and for wiring for intensive or the circuit board that area is less, the design space of via is too narrow and small and limited the composing design of circuit board.
Summary of the invention
In order to overcome above-mentioned defective, the invention provides a kind of solder pad conduction structure of circuit board, effectively the via design space of extension circuit plate.
The present invention for the technical scheme that solves its technical problem and adopt is:
A kind of solder pad conduction structure of circuit board, comprise two-tier circuit plate line layer at least, each weld pad is included in the circuit board line layer of circuit board surface, described circuit board is offered some vias by design in the correspondence position of some weld pads, each via runs through the plate of two-tier circuit at least line layer adjacent in the circuit board by design, the inwall of described each via is electroplate with metal level, corresponding its each the circuit board line layer that is run through of conducting that connects of described metal level.
As a further improvement on the present invention, when described circuit board is double-sided PCB, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, this two-tier circuit plate line layer forms the outer-layer circuit and the weld pad of circuit board respectively, and described each via all runs through the outer-layer circuit (being that described via is a plated-through-hole) on circuit board two surfaces.
As a further improvement on the present invention, when described circuit board is multilayer circuit board, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, the circuit board line layer on these circuit board two surfaces forms the outer-layer circuit and the weld pad of circuit board respectively; Be provided with at least one layer circuit board line layer in the middle of this circuit board, each the circuit board line layer in the middle of this circuit board forms the internal layer circuit of circuit board; Each via runs through two-layer at least structure adjacent in each circuit board line layer by design and is divided into three kinds: first kind of via runs through lip-deep outer-layer circuit of circuit board and at least one deck internal layer circuit (be described first kind via be blind hole) adjacent with this outer-layer circuit, second kind of via do not run through any outer-layer circuit, only run through the middle adjacent two-layer at least internal layer circuit (being that described second kind of via is buried via hole) of circuit board, the third via runs through the outer-layer circuit (being that described the third via is a plated-through-hole) on circuit board two surfaces simultaneously.
As a further improvement on the present invention, filling has welding resistance printing ink in the metal level of described via inwall.
As a further improvement on the present invention, run through circuit board surface position that circuit board surface and its run through in the described via and be provided with weld pad, this weld pad covers the welding resistance printing ink in the described via inwall metal level.
The invention has the beneficial effects as follows: the mode of offering via in the position of employing correspondence of weld pad in circuit board forms the interlayer conduction structure of circuit board, significantly expand the via design space of circuit board, made things convenient for the composing design of connect up intensive or the circuit board that area is less.
Description of drawings
Fig. 1 is the cut-away section structure enlarged diagram of double-sided PCB of the present invention;
Fig. 2 is the cut-away section structure enlarged diagram of multilayer circuit board of the present invention.
Embodiment
Embodiment: a kind of solder pad conduction structure of circuit board, comprise two-tier circuit plate line layer at least, each weld pad 1 is included in the circuit board line layer of circuit board surface, described circuit board is offered some vias 2 by design in the correspondence position of some weld pads 1, each via 2 runs through the plate of two-tier circuit at least line layer adjacent in the circuit board by design, the inwall of described each via 2 is electroplate with metal level 3, described metal level 3 corresponding its each circuit board line layers that is run through of conducting that connect.
When described circuit board is double-sided PCB, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, this two-tier circuit plate line layer forms the outer-layer circuit 4 and the weld pad 1 of circuit board respectively, and described each via 2 all runs through the outer-layer circuit 4 (being that described via is a plated-through-hole) on circuit board two surfaces.
When described circuit board is multilayer circuit board, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, the circuit board line layer on these circuit board two surfaces forms the outer-layer circuit 4 and the weld pad 1 of circuit board respectively; Be provided with at least one layer circuit board line layer in the middle of this circuit board, each the circuit board line layer in the middle of this circuit board forms the internal layer circuit 5 of circuit board; Each via 2 runs through two-layer at least structure adjacent in each circuit board line layer by design and is divided into three kinds: first kind of via 21 runs through a lip-deep outer-layer circuit 4 of circuit board and at least one deck internal layer circuit 5 (be described first kind via be blind hole) adjacent with this outer-layer circuit, second kind of via 22 do not run through any outer-layer circuit 4, only run through the middle adjacent two-layer at least internal layer circuit 5 (being that described second kind of via is buried via hole) of circuit board, the third via 23 runs through the outer-layer circuit 4 (being that described the third via is a plated-through-hole) on circuit board two surfaces simultaneously.
Filling has welding resistance printing ink 6 in the metal level of described via inwall.
Run through circuit board surface position that circuit board surface and its run through in the described via 2 and be provided with weld pad 1, the welding resistance printing ink 6 that this weld pad 1 covers in the described via 1 inwall metal level 3.
The mode of offering via in the position of employing correspondence of weld pad in circuit board forms the interlayer conduction structure of circuit board, has significantly expanded the via design space of circuit board, has made things convenient for the composing design of connect up intensive or the circuit board that area is less.
Claims (5)
1. the solder pad conduction structure of a circuit board, comprise two-tier circuit plate line layer at least, each weld pad (1) is included in the circuit board line layer of circuit board surface, it is characterized in that: described circuit board is offered some vias (2) by design in the correspondence position of some weld pads (1), each via (2) runs through the plate of two-tier circuit at least line layer adjacent in the circuit board by design, the inwall of described each via (2) is electroplate with metal level (3), corresponding its each the circuit board line layer that is run through of conducting that connects of described metal level (3).
2. the solder pad conduction structure of circuit board according to claim 1, it is characterized in that: when described circuit board is double-sided PCB, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, this two-tier circuit plate line layer forms the outer-layer circuit (4) and the weld pad (1) of circuit board respectively, and described each via (2) all runs through the outer-layer circuit (4) on circuit board two surfaces.
3. the solder pad conduction structure of circuit board according to claim 1, it is characterized in that: when described circuit board is multilayer circuit board, respectively be provided with one deck circuit board line layer on these circuit board two surfaces, the circuit board line layer on these circuit board two surfaces forms the outer-layer circuit (4) and the weld pad (1) of circuit board respectively; Be provided with at least one layer circuit board line layer in the middle of this circuit board, each the circuit board line layer in the middle of this circuit board forms the internal layer circuit (5) of circuit board; Each via (2) runs through two-layer at least structure adjacent in each circuit board line layer by design and is divided into three kinds: first kind of via (21) runs through a lip-deep outer-layer circuit of circuit board (4) and at least one deck internal layer circuit (5) adjacent with this outer-layer circuit, second kind of via (22) do not run through any outer-layer circuit (4), only run through the middle adjacent two-layer at least internal layer circuit (5) of circuit board, the third via (23) runs through the outer-layer circuit (4) on circuit board two surfaces simultaneously.
4. according to the solder pad conduction structure of claim 1,2 or 3 described circuit boards, it is characterized in that: filling has welding resistance printing ink (6) in the metal level of described via inwall.
5. the solder pad conduction structure of circuit board according to claim 4, it is characterized in that: run through circuit board surface position that circuit board surface and its run through in the described via (2) and be provided with weld pad (1), this weld pad (1) covers the welding resistance printing ink (6) in described via (1) the inwall metal level (3).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100355737A CN101917817A (en) | 2009-09-25 | 2009-09-25 | Solder pad conduction structure of circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009100355737A CN101917817A (en) | 2009-09-25 | 2009-09-25 | Solder pad conduction structure of circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101917817A true CN101917817A (en) | 2010-12-15 |
Family
ID=43325169
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2009100355737A Pending CN101917817A (en) | 2009-09-25 | 2009-09-25 | Solder pad conduction structure of circuit board |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101917817A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102523682A (en) * | 2011-12-09 | 2012-06-27 | 华为技术有限公司 | Circuit board assembly and electronic apparatus |
| CN102548221A (en) * | 2010-12-29 | 2012-07-04 | 富葵精密组件(深圳)有限公司 | Method for manufacturing circuit board |
| CN102762027A (en) * | 2011-04-25 | 2012-10-31 | 鸿富锦精密工业（深圳）有限公司 | Server circuit board |
| CN110313881A (en) * | 2018-03-30 | 2019-10-11 | 微创（上海）医疗机器人有限公司 | Pad exchanging structure and fujinon electronic video endoscope head end structure |
-
2009
- 2009-09-25 CN CN2009100355737A patent/CN101917817A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102548221A (en) * | 2010-12-29 | 2012-07-04 | 富葵精密组件(深圳)有限公司 | Method for manufacturing circuit board |
| CN102548221B (en) * | 2010-12-29 | 2014-04-09 | 富葵精密组件(深圳)有限公司 | Method for manufacturing circuit board |
| CN102762027A (en) * | 2011-04-25 | 2012-10-31 | 鸿富锦精密工业（深圳）有限公司 | Server circuit board |
| CN102523682A (en) * | 2011-12-09 | 2012-06-27 | 华为技术有限公司 | Circuit board assembly and electronic apparatus |
| CN110313881A (en) * | 2018-03-30 | 2019-10-11 | 微创（上海）医疗机器人有限公司 | Pad exchanging structure and fujinon electronic video endoscope head end structure |
| CN110313881B (en) * | 2018-03-30 | 2021-10-26 | 上海微创医疗机器人（集团）股份有限公司 | Pad switching structure and electronic endoscope head structure |
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| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
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| C12 | Rejection of a patent application after its publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20101215 |