CN200979668Y - A double-loop low-dropout voltage regulator circuit - Google Patents
A double-loop low-dropout voltage regulator circuit Download PDFInfo
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- CN200979668Y CN200979668Y CN 200620163360 CN200620163360U CN200979668Y CN 200979668 Y CN200979668 Y CN 200979668Y CN 200620163360 CN200620163360 CN 200620163360 CN 200620163360 U CN200620163360 U CN 200620163360U CN 200979668 Y CN200979668 Y CN 200979668Y
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Abstract
The utility model discloses a double-ring low pressure manostat circuit, comprising an error amplifier, a second amplifier, a power tube, a compensator, an output sampling net, a load capacitance, a load circuit, a feedforward amplifier, an upper pulling driving tube, a lower pulling driving tube and a sample tube. Two loops are installed, too. The main loop comprises an error amplifier, a second amplifier, an upper driving tube, a power tube and output sampling net. So an inverse signal feedback loop is formed to fan-out regulated voltage V<out>. The additional ring circuit comprises a feedforward amplifier, a sample tube, a lower driving tube and a power tube. Referring to the output voltage, the loop forms a negative feedback loop and a dynamic compensation circuit, the output voltage gets advanced stabilized. Referring to the load current, a regenerative feedback is formed, so the response to the step change of load circuit is speeded up. Better transient response, better peripheral circuit and better phase margin are available with the application of the utility model.
Description
Technical field
The utility model belongs to the linear power supply technology, is specially a kind of double ring low differential voltage linear voltage stabilizer (LDO) circuit, and it can improve LDO circuit dynamic property.
Background technology
Along with the electronic technology high speed development, electronic product needs more high performance power-supply system power supply.The LDO circuit relies on its circuit structure simple, and chip occupying area is little, advantages such as low noise, high ripple inhibition, and be widely used under the occasions such as lithium cell charging, low pressure digital circuit power supply.In order to adapt to the development need in power supply market, good system stability and load transient performance become the primary study direction of linear power supply technology.
High precision LDO circuit need adopt the error amplifier of high-gain to satisfy the demand, and high-gain just needs frequency compensation, so that guarantee the stability of circuit.But the performance of circuit is high more, and the gain of required error amplifier is just high more, and the compensation intensity that needs is just big more, and dynamic property that often will sacrifice circuit meets the demands.Multiple frequency compensation scheme is used to provide stability, for example Miller compensation, nested Miller ring, and the outer or outer heavy load electric capacity of crystal grain of chip that may become part compensation.The frequency compensation when though these methods can realize the circuit steady operation, all sacrifice more or less the dynamic property of LDO circuit.So just further restriction has been proposed compensation scheme.
Fig. 1 has described a kind of typical LDO circuit and frequency compensation unit thereof of prior art.Typical case LDO circuit working principle is the sampled signal V that relatively exports
FBWith reference voltage V
REF, after amplifying, regulate output voltage V
OUTReach preset value.In order to reduce steady-state error, circuit adopts three grades of circuit, comprises that error amplifier 1, second level amplifier 2,3 pairs of error signals of power tube amplify.Multistage amplifier circuit can be brought too much limit into, causes excessive phase shift, causes phase margin seriously not enough, and system stability is difficult to.Adopt compensating unit 4 and output capacitance 6 to introduce zero point among Fig. 1, thus too much limit in the compensating circuit.High-precision LDO circuit often needs large-scale or very complicated compensating element,, makes system stability.For example, by strengthening output capacitance 6, realize compensation.Like this, the dynamic response of system is affected, is difficult to obtain precision and all best compensation method of dynamic response.
Summary of the invention
The purpose of this utility model is to provide a kind of double ring low differential voltage linear voltage stabilizer circuit, and this circuit has reduced the required compensation intensity of circuit, has improved the circuit dynamic property.
A kind of double ring low differential voltage linear voltage stabilizer circuit that the utility model provides comprises error amplifier, second level amplifier, power tube, compensating unit, output sampling network, load capacitance and load circuit; The negative input of error amplifier meets reference voltage V
REF, positive input meets the feedback voltage signal V that the output sampling network produces
FB, error amplifier is two input signals relatively, and the error signal of two input signals is amplified the single-ended output in back, and the output terminal of error amplifier is connected with the input end of amplifying circuit, output signal is input to amplifying circuit carries out the next stage amplification; Compensating unit is connected error amplifier output terminal and input amplifier junction, and circuit is carried out frequency compensation; The output sampling network comprises the resistance R 1 and the R2 of series connection, the output voltage V of the last termination LDO circuit of R2
OUTThe upper end of lower end and R1 links to each other, and produces V
FBCurrent potential is input to the normal phase input end of error amplifier; The lower end ground connection of R1; Termination LDO circuit output voltage V on the load capacitance
OUT, lower end ground connection; Load circuit connects the output voltage V of LDO circuit
OUTIt is characterized in that:
This circuit also comprise feed-forward amplifier, on draw driving tube, drop-down driving tube and sampling pipe; The negative input of feed-forward amplifier connects the output voltage V of LDO circuit
OUTPositive input connects the drain terminal of sampling pipe, and its output terminal joins with the grid of following trombone slide; On draw the source electrode of driving tube to connect the grid of power tube, its grid connects the output of amplifying circuit, its drain electrode meets LDO input power supply V
INOr the substrate electric potential of LDO power tube; The drain electrode of drop-down driving tube connects the grid of power tube, and its grid connects the output of feed-forward amplifier, its source end ground connection; Sampling pipe is in parallel with power tube, and the grid of the two, source electrode join respectively, and the drain electrode of sampling pipe connects the normal phase input end of feed-forward amplifier;
Error amplifier, second amplifier, on draw driving tube, power tube and output sampling network, constitute major loop, form negative feedback loop regulated output voltage V
OUTFeed-forward amplifier, sampling pipe, drop-down driving tube and power tube constitute additional loop, and this loop forms negative feedback loop with reference to output voltage, dynamics compensation circuits, further regulated output voltage V
OUT, and, forming positive feedback loop with reference to load current, the load current step of booster response circuit changes.
The utility model adopts a kind of dicyclo LDO structure of improving the circuit dynamic property, and this structure has fabulous improvement to load transient response, line transient response and the stability of LDO.The utility model mainly is by increasing a feed-forward amplifier AMP2, this amplifier is with respect to error amplifier among Fig. 1, has low gain, the characteristics of high bandwidth, feed-forward amplifier AMP2 compares the sampled voltage of LDO output voltage and sampling LDO power tube current, output control LDO power tube gate driving forms the dynamic property that the second loop improves circuit.Compare with existing method, the second loop of increase can compensate a zero point, reduces the compensation intensity of other required compensating units of circuit, has reduced compensating element, and chip area, provides cost savings.Another advantage of the present utility model is, the sampled signal that input end of feed-forward amplifier is the LDO power tube current, in circuit, form a positive feedback loop, like this can the booster response load or the variation of power supply, greatly improved the dynamic property of LDO circuit.The structure of this dicyclo LDO can be carried out dynamic compensation to the LDO circuit, makes circuit can adopt the more error amplifier of high-gain, to obtain higher precision.
Description of drawings
Fig. 1 is a kind of typical LDO mu balanced circuit synoptic diagram of prior art;
Fig. 2 is the synoptic diagram of the utility model double ring low differential voltage linear voltage stabilizer circuit;
Fig. 3 is a kind of specific implementation circuit diagram of feed-forward amplifier AMP2 among Fig. 2.
Embodiment
As shown in Figure 2, the utility model double ring low differential voltage linear voltage stabilizer circuit comprise error amplifier 1, second level amplifier 2, power tube 3, compensating unit 4, output sampling network 5, load capacitance 6, load circuit 7, feed-forward amplifier 8, on draw driving tube 9, drop-down driving tube 10 and sampling pipe 11.Each part mentioned above constitutes major loop and two loops of additional loop in circuit, major loop comprise error amplifier 1, second amplifier 2, on draw driving tube 9, power tube 3 and output sampling network 5, form negative feedback loop regulated output voltage V
OUTAdditional loop comprises feed-forward amplifier 8, sampling pipe 11, drop-down driving tube 10 and power tube 3, constitutes second loop, and this loop forms negative feedback loop with reference to output voltage, dynamics compensation circuits, further regulated output voltage V
OUTWith reference to load current, form positive feedback loop, the load current step of booster response circuit changes.Below each parts is made specific description.
The negative input of error amplifier 1 meets a reference voltage V
REF, this voltage generally produces by band-gap circuit, has high-precision stability, does not change with power supply or variation of temperature; Positive input meets the feedback voltage signal V that the output sampling network produces
FB Error amplifier 1 is two input signals relatively, and the error signal of two input signals is amplified the single-ended output in back.The output terminal of error amplifier 1 is connected with the input end of amplifying circuit 2, output signal is input to amplifying circuit 2 carries out the next stage amplification.
The output terminal of amplifying circuit 2 and on draw the grid of driving tube 9 to join.This amplifying circuit reduces the steady-state error of circuit for further fault in enlargement signal, and it often is designed to gain limited, the amplification grade circuit with high bandwidth.Therefore its frequency response is very little for the overall frequency response influence of regulator.
Compensating unit 4 is connected error amplifier 1 output terminal and amplifying circuit 2 input end junctions, and circuit is carried out frequency compensation.The utility model adopts directly the self compensation mode of shunt capacitance over the ground, can obtain better compensation effect.
Termination LDO circuit output voltage V on the load capacitance 6
OUTThe direct ground connection in lower end.R
ESRSeries equivalent resistance for the electric capacity parasitism.Load capacitance is used to help the stable output of LDO circuit, and filter away high frequency noise is finished frequency compensation simultaneously.The selection of this electric capacity is unsuitable excessive, and excessive electric capacity is the dynamic response of delay circuit, but also can take excessive area.
Feed-forward amplifier 8 in the additional loop, its negative input connects the output voltage V of LDO circuit
OUTPositive input connects the drain terminal of sampling pipe 11, is the sampled signal of the load current of flowing through on the sampled power pipe 3.Error signal output of feed-forward amplifier 8 same generations, output connects the grid of the following trombone slide 10 of LDO gate driver circuit, forms second loop of circuit, and dynamics compensation circuits is improved the circuit dynamic property simultaneously.
On draw driving tube 9 to be arranged in major loop, be the last pull-up network of the gate driver circuit of LDO power tube 3, its source electrode connects power tube 3 grids; Grid connects the output of amplifying circuit 2; Drain electrode meets power supply V
DD, also can directly insert LDO input power supply V
IN, perhaps connect a stable power in addition, for example the substrate electric potential of the back of the body grid-control system circuit of LDO circuit power pipe generation.
Drop-down driving tube 10 is arranged in additional loop, is the pulldown network of the gate driver circuit of LDO power tube 3.The drain electrode of drop-down driving tube 10 connects the grid of power tube 3, and grid connects the output of feed-forward amplifier 8, drain terminal ground connection.
Sampling pipe 11 is in parallel with LDO power tube 3, and their grid sources join respectively, have identical V
GS, guaranteed that their size of current is directly proportional with device size, has realized the purpose of accurate sample rate current; Its drain electrode connects the normal phase input end of feed-forward amplifier 8.
Fig. 3 has described to form in the dicyclo LDO circuit exemplary circuit of the feed-forward amplifier AMP2 of second loop, and it has simple in structure, the characteristics of dynamic compensation LDO circuit.Feed-forward amplifier 8 comprises first, second PMOS pipe the 81,82, first to the 3rd current source load 83,84 and 85, common source amplifier tube 86 and feed-forward amplifier output stage 87.Feed-forward amplifier 8 main parts are that current-mirror structure is made comparisons, output termination a common source amplifier tube 86 do active negative feedback.The small-signal gain of amplifier mainly by 86 decisions of common source amplifier tube, is common source gain amplifier level like this.It specifically is connected to, and the grid and the drain electrode of PMOS pipe 81 are joined, and connects the anode of first current source load 83 down, and then connects the grid of the 2nd PMOS pipe 82; The source electrode of the one PMOS pipe 81 connects the output voltage V of LDO
OUTThe 2nd PMOS manages the drain terminal of 82 source termination sampling pipes 11, connects the negative terminal of the 3rd current source load 85 on simultaneously; Drain terminal connects the grid of common source amplifier tube 86, connects the upper end of the resistance R of the anode of second current source load 84 and feed-forward amplifier output stage 87 simultaneously.First, second current source load 83,84 negative terminals are ground connection all.The positive termination V of the 3rd current source load 85
DD, with on draw that driving tube 9 power supplys that drain terminal connects are identical can directly to insert LDO input voltage V
IN, the perhaps substrate electric potential of LDO power tube 3.The 3rd current source load 85 is in order to guarantee that the feed-forward amplifier circuit is in underloading or still can operate as normal when unloaded and the minimum leg electric current introduced ensures.Feed-forward amplifier output stage 87 comprises resistance R 3, and metal-oxide-semiconductor electric capacity N1 connects into the single order low-pass filter network, in order to filter out the high frequency components that produces when the amplifier response load current step changes.Wherein can to regard grid as be top crown to mos capacitance N1, and the source is leaked and is the electric capacity of bottom crown; The drain electrode of termination the 2nd PMOS pipe 82 and the grid of common source amplifier tube 86 on the resistance R 3, and the anode of second current source load 84; OUT2 is exported in the lower end of resistance R 3, connects the grid of metal-oxide-semiconductor electric capacity N1 pipe simultaneously.Direct ground connection is leaked in the source of metal-oxide-semiconductor electric capacity N1 pipe.LDO circuit in the circuit shown in Figure 3 sampling pipe 11 for convenience of explanation connects and lists.
Among Fig. 2, the course of work of feed-forward amplifier 8 can separated into two parts, and part hypothesis load current is constant, the variation of feed-forward amplifier response output voltage; Another part output voltage is constant, the variation of feed-forward amplifier responsive load electric current.When load current is constant, promptly the positive input of feed-forward amplifier 8 can be considered reference data, output voltage V
OUTChange (supposing to become big), feed-forward amplifier 8 output step-downs, drop-down driving tube 10 pull-down capability descend, and power tube 3 grid potentials raise, and regulate output V
OUTDescend, form the stable output of negative feedback loop; Work as output voltage V
OUTConstant, promptly the amplifier negative input can be considered reference data, load current I
LOADChange (supposing needs to become big), amplifier output uprises, and drop-down driving tube 10 pull-down capability strengthen, and power tube 3 grid potentials descend, and regulate output current I
LOADIncrease, form positive feedback loop, the dynamic response of accelerating circuit.Above two parts be in practice staggered mix, interactional.
Shown the frequency compensation technology of typical LDO circuit in Fig. 1 of prior art, it has adopted compensating unit 4, finishes the frequency compensation function with load capacitance 6.Under the situation of this typical prior art, the zero limit of LDO circuit is as follows.Dominant pole PO is by the conducting resistance generation of load capacitance 6 and LDO power tube 3, is provided by following formula:
Limit between error amplifier 1 and the second level amplifier is as follows:
In the formula, R
EQBe the equivalent resistance over the ground of tie point between the two-stage, general main be the input equivalent resistance sum that the output resistance of previous stage error amplifier 1 adds second level amplifier 2; C
EQBeing the equivalent capacity over the ground of this node, mainly is that building-out capacitor adds partial input capacitance.
Common limit P
BMeeting and dominant pole P
OMore approaching, as to need compensation to offset limit influence.So, will in circuit shown in Figure 1, compensate two zero points, be respectively:
Provided by formula (3) zero point that compensating unit 4 is introduced, wherein G
MBe partial equivalent transconductance, C
BElectric capacity for the compensation employing.The compensation relevant with load capacitance provided by formula 4 zero point, wherein C
LBe load capacitance 6, R
ESRIt is its series equivalent resistance.
The application's figure is provided by Fig. 2, and the circuit correspondence is called among Fig. 1; Other same structure unit mark in turn.In twin nuclei shown in Figure 2, stable what special contribution was arranged is two paths of speed to circuit, and article one is and slow path identical shown in the figure one, high-gain; Another is the fast path of low gain that stresses among the application.By two path effects of speed, introduce and enter system a zero point, the ultimate principle of twin nuclei compensating circuit among the application that Here it is.Calculate by circuit shown in Figure 3 the zero point of its compensation.
The output impedance of the feed-forward amplifier 8 that is provided by formula (5) is R
AMP2, closed, because 8 inside have negative feedback loop, so its gain, output resistance are all only by 86 decisions of common source amplifier tube.Provide C by formula (6) zero point of twin nuclei compensation
87Be mos capacitance N1, C
10Export the grid input capacitance of the drop-down driving tube 10 of control for feed-forward amplifier 8.What introduce in the reality should be a pair of zero-limit, just, limit can be arranged on outside the bandwidth range by being set zero point near unity gain bandwidth than the more close true origin of limit zero point, and limit just can be ignored the influence of circuit like this.
Therefore, just only provided the formula at zero point here.In addition, in formula (6) formula at zero point g is arranged
M86, the load current that it and sampling pipe 11 are sampled has direct relation, that is to say the Z at zero point of compensation here
Dual, loopIt is dynamic bucking-out system.Usually, adopt the frequency loop analysis of the LDO circuit of twin nuclei, can be near the first order pole systems stabilisation, phase margin is near 90 degree.
Realization of the present utility model has been described under the situation of an embodiment here.Illustrated embodiment provides the LDO circuit of a twin nuclei, and it has two negative feedback loops of speed, and one is by the high-gain error amplifier, and the power controlling tube grid drives goes up pull-up network, and then control output, and the slow path of a burning voltage is provided; Another is by the amplifier than low gain, compares the sampled signal of output voltage and load current, and the power controlling tube grid drives pulldown network, and then the fast path of stable output.These two speed paths can be introduced a zero point to the response of small-signal, and system is carried out frequency compensation.Add circuit other two places compensation, can make the frequency response of the frequency response of circuit, admirably stabilizing circuit near one-pole system.Also formed the loop of a positive feedback simultaneously by the second additional loop, the step of responsive load changes, and has improved the transient response of circuit greatly.Simultaneously from large-signal, when load or power supply step changed, output voltage can have the saltus step of a negative sense at once, and fast path at first responds and changes step and change in this moment dicyclo circuit, and slow then path also begins regulating circuit; When a period of time is carried out in response, the regulating effect of fast path descends, and slow path will play main regulating action, is finally realized the high precision of circuit by the high-gain of slow path, promptly low-down steady-state error.
In the realization circuit of reality, the LDO circuit also should comprise protected location and interface element, overheat protector for example, protected locations such as short-circuit current restriction.
These embodiment are intended to explanation rather than restriction.Many variants, modification, interpolation and improvement all are possible.
Claims (2)
1, a kind of double ring low differential voltage linear voltage stabilizer circuit comprises error amplifier (1), second level amplifier (2), power tube (3), compensating unit (4), output sampling network (5), load capacitance (6) and load circuit (7);
The negative input of error amplifier (1) meets reference voltage V
REF, positive input meets the feedback voltage signal V that the output sampling network produces
FBError amplifier (1) is two input signals relatively, the error signal of two input signals is amplified the single-ended output in back, and the output terminal of error amplifier (1) is connected with the input end of amplifying circuit (2), output signal is input to amplifying circuit (2) carries out the next stage amplification;
Compensating unit (4) is connected error amplifier (1) output terminal and amplifying circuit (2) input end junction, and circuit is carried out frequency compensation;
Output sampling network (5) comprises the resistance R 1 and the R2 of series connection, the output voltage V of the last termination LDO circuit of R2
OUT, the upper end of lower end and R1 links to each other, and produces V
FBCurrent potential is input to the normal phase input end of error amplifier; The lower end ground connection of R1;
Load capacitance (6) goes up termination LDO circuit output voltage V
OUTThe direct ground connection in lower end;
Load circuit (7) connects the output voltage V of LDO circuit
OUT
It is characterized in that:
This circuit also comprise feed-forward amplifier (8), on draw driving tube (9), drop-down driving tube (10) and sampling pipe (11);
The negative input of feed-forward amplifier (8) connects the output voltage V of LDO circuit
OUTPositive input connects the drain terminal of sampling pipe (11), and its output terminal joins with the grid of following trombone slide (10);
On draw the source electrode of driving tube (9) to connect the grid of power tube (3), its grid connects the output of amplifying circuit (2), its drain electrode meets LDO input power supply V
INOr the substrate electric potential of LDO power tube (3);
The drain electrode of drop-down driving tube (10) connects the grid of power tube (3), and its grid connects the output of feed-forward amplifier (8), its source end ground connection;
Sampling pipe (11) is in parallel with power tube (3), and the grid of the two, source electrode join respectively, and the drain electrode of sampling pipe (11) connects the normal phase input end of feed-forward amplifier (8);
Error amplifier (1), second amplifier (2), on draw driving tube (9), power tube (3) and output sampling network (5) to constitute major loop, form negative feedback loop regulated output voltage V
OUTFeed-forward amplifier (8), sampling pipe (11), drop-down driving tube (10) and power tube (3) constitute additional loop, and this loop forms negative feedback loop with reference to output voltage, dynamics compensation circuits, further regulated output voltage V
OUT, and, forming positive feedback loop with reference to load current, the load current step of booster response circuit changes.
2, double ring low differential voltage linear voltage stabilizer circuit according to claim 1 is characterized in that: feed-forward amplifier (8) comprises first, second PMOS pipe (81,82), first to the 3rd current source load (83,84 and 85), common source amplifier tube (86) and feed-forward amplifier output stage (87);
The grid and the drain electrode of the one PMOS pipe (81) are joined, and are connected with the anode of first current source load (83) and the grid of the 2nd PMOS pipe (82) respectively again, and the source electrode of PMOS pipe (81) connects the output voltage V of LDO
OUT
The source end of the 2nd PMOS pipe (82) is connected with the drain terminal of sampling pipe (11) and the negative terminal of the 3rd current source load (85) respectively, its drain terminal links to each other with the grid of common source amplifier tube (86), and is connected with the anode of second current source load (84) and the upper end of the resistance R 3 of feed-forward amplifier output stage (87);
The equal ground connection of negative terminal of first, second current source load (83,84), the positive termination LDO input power supply V of the 3rd current source load (85)
INOr the substrate electric potential of LDO power tube (3);
Feed-forward amplifier output stage (87) comprises resistance R 3 and metal-oxide-semiconductor electric capacity N1, and mos capacitance N1 is to be top crown with the grid, and source, leakage link to each other as the electric capacity of bottom crown; The drain electrode of termination the 2nd PMOS pipe (82) and the grid of common source amplifier tube (86) on the resistance R 3, and the anode of second current source load (84); The lower end of resistance R 3 connects the grid of metal-oxide-semiconductor electric capacity N1 pipe simultaneously as output, and ground is missed in the source of metal-oxide-semiconductor electric capacity N1.
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| CN 200620163360 CN200979668Y (en) | 2006-12-01 | 2006-12-01 | A double-loop low-dropout voltage regulator circuit |
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| CN 200620163360 CN200979668Y (en) | 2006-12-01 | 2006-12-01 | A double-loop low-dropout voltage regulator circuit |
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| CN100432886C (en) * | 2006-10-25 | 2008-11-12 | 华中科技大学 | Double ring low differential voltage linear voltage stabilizer circuit |
| CN101867364A (en) * | 2009-04-16 | 2010-10-20 | 皓威科技有限公司 | Output stage circuit for capacitively loaded driver and control method thereof |
| CN102104331A (en) * | 2010-12-29 | 2011-06-22 | 复旦大学 | Frequency compensating circuit suitable for switched-capacitor direct-current voltage converter |
| CN103248346A (en) * | 2013-03-25 | 2013-08-14 | 珠海市杰理科技有限公司 | Power gating circuit |
| CN101727119B (en) * | 2009-11-26 | 2013-09-04 | 四川和芯微电子股份有限公司 | Low-dropout linear voltage source with effective compensation |
| CN104765397A (en) * | 2014-01-02 | 2015-07-08 | 意法半导体研发(深圳)有限公司 | LDO (linear voltage regulator) for internal electric source and with improved load transient performance |
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| CN111190456A (en) * | 2020-01-14 | 2020-05-22 | 西安电子科技大学 | Linear voltage regulator with high input voltage and stable double loops |
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| CN100432886C (en) * | 2006-10-25 | 2008-11-12 | 华中科技大学 | Double ring low differential voltage linear voltage stabilizer circuit |
| CN101867364A (en) * | 2009-04-16 | 2010-10-20 | 皓威科技有限公司 | Output stage circuit for capacitively loaded driver and control method thereof |
| CN101727119B (en) * | 2009-11-26 | 2013-09-04 | 四川和芯微电子股份有限公司 | Low-dropout linear voltage source with effective compensation |
| CN102104331A (en) * | 2010-12-29 | 2011-06-22 | 复旦大学 | Frequency compensating circuit suitable for switched-capacitor direct-current voltage converter |
| CN102104331B (en) * | 2010-12-29 | 2013-07-31 | 复旦大学 | Frequency compensating circuit suitable for switched-capacitor direct-current voltage converter |
| CN103248346A (en) * | 2013-03-25 | 2013-08-14 | 珠海市杰理科技有限公司 | Power gating circuit |
| CN103248346B (en) * | 2013-03-25 | 2015-11-18 | 珠海市杰理科技有限公司 | Power gating circuit |
| CN104765397A (en) * | 2014-01-02 | 2015-07-08 | 意法半导体研发(深圳)有限公司 | LDO (linear voltage regulator) for internal electric source and with improved load transient performance |
| CN109428488B (en) * | 2017-08-30 | 2020-01-21 | 苹果公司 | DC-DC converter with dynamically adaptive load line |
| CN109428488A (en) * | 2017-08-30 | 2019-03-05 | 苹果公司 | DC-DC converter with dynamic self-adapting load line |
| US10644592B2 (en) | 2017-08-30 | 2020-05-05 | Apple Inc. | DC-DC converter with a dynamically adapting load-line |
| CN108762361A (en) * | 2018-06-11 | 2018-11-06 | 厦门元顺微电子技术有限公司 | Low pressure difference linear voltage regulator |
| CN111190456A (en) * | 2020-01-14 | 2020-05-22 | 西安电子科技大学 | Linear voltage regulator with high input voltage and stable double loops |
| US11209850B2 (en) | 2020-02-14 | 2021-12-28 | Elite Semiconductor Memory Technology Inc. | Termination voltage regulation apparatus with transient response enhancement |
| CN114077273A (en) * | 2020-08-12 | 2022-02-22 | 株式会社东芝 | Constant voltage circuit |
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| CN114879792A (en) * | 2022-05-24 | 2022-08-09 | 中国人民解放军国防科技大学 | Double-loop low-dropout linear voltage regulator with flip voltage follower structure |
| CN114879792B (en) * | 2022-05-24 | 2024-04-19 | 中国人民解放军国防科技大学 | Double-loop low-dropout linear voltage regulator with turnover voltage follower structure |
| CN115268549A (en) * | 2022-09-28 | 2022-11-01 | 成都芯翼科技有限公司 | Circuit for reducing input-output voltage difference of LDO (low dropout regulator) and low dropout regulator |
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