CN1968577B - Printed circuit board using paste bump and manufacturing method thereof - Google Patents

Printed circuit board using paste bump and manufacturing method thereof Download PDF

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Publication number
CN1968577B
CN1968577B CN2006101454187A CN200610145418A CN1968577B CN 1968577 B CN1968577 B CN 1968577B CN 2006101454187 A CN2006101454187 A CN 2006101454187A CN 200610145418 A CN200610145418 A CN 200610145418A CN 1968577 B CN1968577 B CN 1968577B
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China
Prior art keywords
paste bump
central layer
via hole
paste
printed circuit
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Expired - Fee Related
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CN2006101454187A
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Chinese (zh)
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CN1968577A (en
Inventor
睦智秀
柳彰燮
李应硕
徐连秀
申熙凡
吴隆
徐炳培
金泰庆
朴东进
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Samsung Electro Mechanics Co Ltd
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Samsung Electro Mechanics Co Ltd
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Priority claimed from KR1020050109855A external-priority patent/KR100704927B1/en
Application filed by Samsung Electro Mechanics Co Ltd filed Critical Samsung Electro Mechanics Co Ltd
Publication of CN1968577A publication Critical patent/CN1968577A/en
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Publication of CN1968577B publication Critical patent/CN1968577B/en
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H05K3/4608—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated comprising an electrically conductive base or core
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4664—Adding a circuit layer by thick film methods, e.g. printing techniques or by other techniques for making conductive patterns by using pastes, inks or powders

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A printed circuit board using paste bumps and manufacturing method thereof are disclosed. With the method of manufacturing a printed circuit board using paste bumps, comprising: (a) perforating a core board to form at least one via hole, (b) filling the at least one via hole by fill-plating and forming a circuit pattern on at least one surface of the core board, (c) stacking a paste bump board on at least one surface of the core board, and (d) forming an outer layer circuit on a surface of the paste bump board, a structurally stable all-layer IVH structure can be implemented due to increased strength in the BVH's of the plated core boards, the manufacture time can be reduced due to parallel processes and collective stacking, implementing micro circuits can be made easy due to the copper foils of the paste bump boards stacked on the outermost layers, the manufacture costs can be reduced as certain plating and drilling processes may be omitted, the interlayer connection area is increased between circuit patterns for improved connection reliability, and dimple coverage can be obtained.

Description

Use the Printed circuit board and manufacturing methods of paste bump
The cross reference of related application
The application requires to be submitted to the 2005-0109850 korean patent application of Korea S Department of Intellectual Property and to be submitted to the priority of the 2005-0109855 korean patent application of Korea S Department of Intellectual Property on November 16th, 2005 on November 16th, 2005, and its full content is hereby expressly incorporated by reference.
Technical field
The present invention relates to a kind of printed circuit board (PCB), more specifically, relate to the Printed circuit board and manufacturing methods of a kind of use paste bump (Paste Bump).
Background technology
Traditional multilayer board is by using addition process or subtractive process etc., on central layer surface, form internal layer circuit such as copper clad panel (CCL) etc., and, stack gradually insulating barrier and metal level formation outer circuit and form by the method identical with the method that is used for internal layer circuit.
In the manufacture process of multilayer board, formed be used between every layer of circuit pattern and circuit pattern and electronic component between be electrically connected such as IVH (interlevel via), BVH (blind hole), and the various via holes of PTH (electroplating ventilating hole) etc.Wherein, the PTH of the whole thickness of the cross section that passes plate of formation except as the above-mentioned electrical connection, also is used as louvre.
Along with the development of electronic component, need a kind of technology that can improve the performance of HDI (high density interconnect) plate.Wherein, the HDI plate of the principle of having used that interlayer is electrically connected and microcircuit connects up has been applied to more highdensity printed circuit board (PCB).That is,, need a kind of technology that interlayer electrical connection and appropriate freedom can be provided in order to improve the performance of HDI plate.
Method according to the manufacturing multilayer board of prior art comprises: at first bore via hole (for example, IVH etc.) by machine drilling etc. in central layer (for example, CCL etc.); Forming coating (for example, by chemical copper plating and/or copper plating etc.) on the surface of central layer and on the inner periphery of via hole; Fill inner space and the lapped face of IVH; On the surface of central layer, form internal layer circuit by using addition process or subtractive process etc. then; And check circuit.
Then, by surface treatment with pile up RCC (resin coated copper foil) etc. and carry out forming process, be formed for the via hole that the interlayer between circuit pattern is electrically connected, on the surface of stacking plate, form outer circuit then and detect this circuit by laser drilling etc.In order to add more circuit pattern layer, repeat surface treatment and pile up RCC etc., form via hole, the plated via surface forms the process of outer circuit then.Repeat such forming process to form the circuit pattern layer of desired amt.
That is, after piling up insulating material or piling up the insulating material (for example, RCC etc.) that is formed with metal level on its surface, on the surface of central layer, form metal level; The BVH that is used for the electrical connection between metal level and the internal layer circuit then by processing such as laser drillings; Pass the PTH of the entire cross section of printed circuit board (PCB) by borings such as machine drillings; On the surface of insulating material, form the outer circuit layer by the method identical with the method that is used for internal layer circuit; And the inner periphery of electroplating PTH, make PTH be used as louvre.
Yet, traditional manufacture method that is used for multilayer board do not meet along with the product of using it (for example, the requirement of mobile phone etc.) making a price reduction and reducing cost, increase the requirement that productivity ratio shortens delivery cycle thereby can not comply with, so need a kind of new manufacture method that can address the above problem.
In addition, traditional method needs complexity, costliness and time-consuming electroplating process, and can not provide sufficient radiating effect by PTH.And when forming circuit pattern after forming coating, traditional method exists the thickness of the circuit pattern that causes owing to coating to increase the difficulty that causes forming microcircuit.
Simultaneously, in order to simplify the complex process of prior art, and in order to make multilayer printed circuit fast, at an easy rate by the method for piling up in groups, with so-called " B2IT (imbedding the projection interconnection technique) " commercialization, this printing slurry on Copper Foil 3 that makes it possible to by as shown in Figure 1 comes prefabricated paste bump plate with the stacking method simply and easily that forms projection 2 ' and pile up insulating material 1 thereon.
The prior art relevant with the paste bump plate comprises uses the invention with the simple and efficient interconnection between the terminal that the paste bump plate that is formed on the projection of being made by electrocondution slurry on the Copper Foil realizes the high density electronic component.Yet this invention only realizes holostrome IVH by the paste bump plate, so it has comparatively fragile structure.And, exist in the possibility that is short-circuited in high voltage, the high frequency environment, and have paste bump to be filled in the via hole of plate, thereby be not modified by the heat dissipation characteristics of PTH.
Summary of the invention
The present invention aims to provide a kind of Printed circuit board and manufacturing methods.Utilize this manufacture method, have the central layer of electroplating BVH by piling up in groups, have the plate and the paste bump plate that are printed on the paste bump on the central layer and form multilayer board, with the stable holostrome IVH structure of implementation structure, improve connection reliability and shorten delivery cycle by increasing the interbed join domain.
Another object of the present invention is to provide a kind of Printed circuit board and manufacturing methods that uses paste bump.Use in the printed circuit board (PCB) of paste bump at this, the paste bump stack of plates is on central layer, and paste bump is filled in the louvre, thereby has improved radiating effect.
According to an aspect of the present invention, provide a kind of method of making the printed circuit board (PCB) that uses paste bump, may further comprise the steps: (a) central layer has been punched to form at least one via hole; (b) fill at least one via hole by filling plating, and at least one surface of central layer, form circuit pattern; (c) at least one surface of central layer, pile up the paste bump plate; And (d) on the surface of paste bump plate, form outer circuit.
Central layer is preferably has the copper clad panel (CCL) that is stacked on its lip-deep copper foil layer.In certain embodiments, this method further may further comprise the steps: to central layer punching with the step (a) that forms at least one via hole before, corresponding to the position removal copper foil layer that will form at least one via hole.This method can further include following steps: central layer punching is being filled between the step (b) that forms circuit pattern at least one via hole and at least one surface at central layer, by etching partially the thickness that reduces copper foil layer with the step (a) that forms at least one via hole with by filling plating.Via hole is blind hole (BVH) preferably.
Preferably, the paste bump plate can form by following steps: (e) at least one paste bump of printing on Copper Foil; (f) at least one paste bump is set; And (g) on Copper Foil, pile up insulating material, make at least one paste bump pass insulating material.
The coating that is formed at least one via hole by the filling plating can preferably include little hole, is formed with at least one paste bump in the position corresponding to little hole.The intensity of paste bump be preferably lower than coating intensity, be higher than the intensity of insulating material.Paste bump can comprise silver paste.
In certain embodiments, this method can also may further comprise the steps: in the step (c) of piling up the paste bump plate at least one surface of central layer with between the step (d) that forms outer circuit on the surface of paste bump plate, the paste bump plate is pressed in step on the central layer.
According to a further aspect in the invention, provide a kind of and used the method for the printed circuit board (PCB) of paste bump by piling up at least one first central layer, at least one second central layer and at least one lamina rara externa manufacturing in groups, wherein, form first central layer through the following steps: (a) on a surface of chipware (core member), form at least one BVH (blind hole); And (b) fill at least one BVH, and at least one surface of chipware, form circuit pattern by filling plating.Form second central layer through the following steps: (c) at least one core projection is connected on another surface of the chipware on first central layer of the position that forms at least one BVH; (d) at least one core projection is set; And (e) on another surface of chipware, pile up the core insulating material, make at least one core projection pass the core insulating material.Simultaneously, form lamina rara externa through the following steps: (f) at least one outer projection is connected on the Copper Foil; (g) at least one outer projection is set; And (h) on Copper Foil, pile up the outer layer insulation material, make at least one outer projection pass the outer layer insulation material.
Chipware can be the copper clad panel (CCL) that copper foil layer is arranged that piles up in its surface.In certain embodiments, this method may further include following steps: the step (a) of at least one BVH of formation corresponding to the position that will form BVH, is removed copper foil layer before on a surface of chipware.This method can further include following steps: fill between the step (b) that forms circuit pattern at least one BVH and at least one surface at chipware, by etching partially the thickness that reduces copper foil layer in the step (a) that forms at least one BVH on the surface of chipware with by filling plating.
Can form at least one core projection or at least one outer projection by the printed silver slurry.The coating that is formed among at least one BVH by the filling plating preferably has little hole, can form at least one core projection or at least one outer projection corresponding to the position in little hole simultaneously.
Can be by aiming at and piling up a plurality of first central layers or a plurality of second central layer, make at least one core projection or at least one outer projection corresponding to the position in little hole, print at least one lamina rara externa then and form printed circuit board (PCB).
According to another aspect of the invention, a kind of printed circuit board (PCB) that uses paste bump is provided, comprise: central layer, be formed on BVH (blind hole) in the central layer, be filled in coating among the BVH, be formed on central layer at least one lip-deep circuit pattern, be included in the little hole in the coating and be stacked on paste bump on the central layer, wherein, the paste bump plate is by at least one paste bump is connected on the Copper Foil, and on Copper Foil, pile up insulating material, make at least one paste bump pass insulating material and form.
Central layer can be preferably has the copper clad panel (CCL) that is stacked on its lip-deep copper foil layer.Preferably, can connect at least one paste bump corresponding to the position in little hole.Also preferably, at least one paste bump is filled in little hole and with coating and is electrically connected.Also preferably, the intensity of paste bump be lower than coating intensity, be higher than the intensity of insulating material.Printed circuit board (PCB) may further include the outer circuit that forms by a plurality of parts of removing copper foil layer.
Simultaneously, printed circuit board (PCB) may further include the add-in card between central layer and paste bump plate, this add-in card can comprise: a lip-deep additional BVH (blind hole) who is formed on add-in card, be filled in the additional coating among the additional BVH, be formed at least one lip-deep adjunct circuit pattern of add-in card, be included in the additional little hole in the additional coating, and the additional bump that is connected to the opposite side of the add-in card in the position that forms additional BVH, wherein, additional bump preferably is filled in little hole and with coating and is electrically connected, and makes paste bump be filled in additional little hole and with additional coating and is electrically connected.
Paste bump, additional coating and coating can form holostrome IVH (interlevel via).
In accordance with a further aspect of the present invention, provide a kind of method of making the printed circuit board (PCB) that uses paste bump, may further comprise the steps: (a) central layer has been punched to form at least one via hole; (b) at least one surface of central layer, form internal layer circuit; (c) at least one surface of central layer, pile up the paste bump plate; And (d) on the surface of paste bump plate, form outer circuit.
Central layer can be preferably copper clad panel (CCL), and can preferably include by machine drilling with the step (a) that forms at least one via hole central layer punching and to beat at least one via hole.Punching may further include with the step (a) that forms at least one via hole to central layer: form coating on the inner periphery of at least one via hole.
Preferably form the paste bump plate through the following steps: (e) corresponding to the position that forms at least one via hole, at least one paste bump of printing on Copper Foil; And (f) at least one paste bump is set.This method may further include following steps: the step of at least one paste bump (f) being set afterwards, pile up insulating material on Copper Foil, make at least one paste bump pass insulating material.
At least one paste bump can comprise silver paste.Preferably, determine the amount of at least one paste bump, thereby fill at least one via hole corresponding to the size of at least one via hole.Preferably, the passable intensity of paste bump is less than the intensity of coating, greater than the intensity of insulating material.Preferably, paste bump can form the shape of the BVH (blind hole) that is electrically connected internal layer circuit and outer circuit.
Can may further comprise the steps in the step (c) of piling up the paste bump plate at least one surface of central layer: on two surfaces of central layer, pile up the paste bump plate.Equally, in the step (c) of piling up the paste bump plate at least one surface of central layer with between the step (d) of formation outer circuit on the surface of paste bump plate, may further include the step of grouting material projection plate on two surfaces of central layer.
In accordance with a further aspect of the present invention, a kind of printed circuit board (PCB) that uses paste bump is provided, comprise: central layer, the via hole that forms by boring, at least one the lip-deep internal layer circuit that is formed on central layer, by connecting at least one paste bump on the copper foil layer and piling up form and the lip-deep outer circuit that be stacked on the lip-deep paste bump plate of central layer and be formed on the paste bump plate of insulating material to the part of central layer, wherein, at least one paste bump connects corresponding to the position of via hole, and via hole is filled by at least one paste bump.
Central layer is copper clad panel (CCL) preferably.Coating can be formed on the inner periphery of via hole.Preferably, coating has the thickness that changes along its degree of depth from the opening of via hole, thereby via hole forms the shape corresponding to the shape of at least one paste bump.Equally, preferably, the thickness of coating increases along its degree of depth from the opening of via hole.
The paste bump plate can preferably form through the following steps: at least one paste bump is printed on the Copper Foil; At least one paste bump is set; On Copper Foil, pile up insulating material then, make at least one paste bump pass insulating material.
Paste bump can comprise silver paste.Preferably, can determine the amount of paste bump corresponding to the size of via hole.Also preferably, the intensity of paste bump be lower than coating intensity, be higher than the intensity of insulating material.
Preferably, paste bump forms BVH (blind hole) shape that is electrically connected internal layer circuit and outer circuit.Can also be preferably, can be on two surfaces of central layer with the paste bump stack of plates.
Other aspects of the present invention and advantage will be set forth in the following description, and partly will become apparent from describe, and maybe can understand by implementing the present invention.
Description of drawings
Fig. 1 is the cross-sectional view according to the paste bump plate of prior art;
Fig. 2 is the flow chart that the manufacture method of the printed circuit board (PCB) that uses paste bump according to an embodiment of the invention is shown;
Fig. 3 is the flow chart of manufacture method that the printed circuit board (PCB) of use paste bump according to another embodiment of the present invention is shown;
Fig. 4 is the schematic flow sheet that illustrates according to the manufacture process of the printed circuit board (PCB) of the use paste bump of the embodiment of the invention;
Fig. 5 is the cross-sectional view that uses the printed circuit board (PCB) of paste bump according to an embodiment of the invention;
Fig. 6 uses the printed circuit board (PCB) of paste bump and more according to an embodiment of the invention according to the cross-sectional view of the structural stability of the printed circuit board (PCB) of the use paste bump of prior art;
Fig. 7 illustrates the photo of the holostrome IVH structure that is used to illustrate the printed circuit board (PCB) that uses paste bump according to an embodiment of the invention;
Fig. 8 illustrates the photo of holostrome IVH structure of the printed circuit board (PCB) of the use paste bump that is used to illustrate according to another embodiment of the present invention;
Fig. 9 illustrates the photo of the little hole coating (dimple coverage) that is used for illustrating the printed circuit board (PCB) that uses paste bump according to an embodiment of the invention;
Figure 10 is the flow chart of manufacture method that the printed circuit board (PCB) of use paste bump according to another embodiment of the present invention is shown;
Figure 11 is the schematic flow sheet of manufacture process that the printed circuit board (PCB) of use paste bump according to another embodiment of the present invention is shown;
Figure 12 is the cross-sectional view of the printed circuit board (PCB) of use paste bump according to another embodiment of the present invention; And
Figure 13 is the cross-sectional view of the printed circuit board (PCB) of use paste bump according to another embodiment of the present invention.
Embodiment
Below with reference to accompanying drawing, the embodiment according to the Printed circuit board and manufacturing methods of the use paste bump of many aspects of the present invention is described in further detail.In explanation with reference to the accompanying drawings, components identical represented by identical reference number, and irrelevant with figure number, and repeats no more.
Fig. 2 is the flow chart that the manufacture method of the printed circuit board (PCB) that uses paste bump according to an embodiment of the invention is shown.
The present invention is intended to by pile up the paste bump plate in groups on central layer, reduce the manufacturing cost and the time of multilayer board, wherein, the paste bump plate is by the enterprising electroplating of the BVH in being formed on central layer (blind hole), on Copper Foil, print paste bump, pile up insulating material then and form corresponding to the position of BVH.That is to say, at first, by punching forms via hole (100) to central layer.
For central layer, use generally that to pile up the copper clad panel (CCL) that copper foil layer is arranged on its surface more efficient, this be because, its form aspect the circuit pattern more effective.Simultaneously, although use BVH to describe present embodiment as an example, via hole according to the present invention is not limited to BVH.
When with copper clad panel when the central layer, help in a plurality of parts of removing central layer with before forming BVH, remove the copper foil layer (90) in the appropriate section thus be formed for forming the window portion of BVH.
Next, filling is plated the surface of (fill-plate) each BVH with formation coating, and forms circuit pattern (110) on the surface of central layer.When general BVH being filled plating, plating can not produce smooth surface, but forms special spill (that is, forming little hole).Yet the present invention is not necessarily limited to the situation that forms little hole in the coating, and what it will be appreciated by those skilled in the art that is that the present invention can be applied to form flat surfaces by electroplating, rather than forms the situation in little hole.
Owing in the electroplating process of BVH, on the surface of central layer, also formed coating, increased so be formed on the thickness of the lip-deep copper foil layer of central layer, this can cause the difficulty that forms minute circuit pattern on the central layer surface.So, before in BVH, electroplating, etch partially by utilization, the thickness of the lip-deep copper foil layer of central layer is decreased to certain level (105).Thickness of coating on the central layer does not need to increase, and can form circuit pattern with required precision.
Next, on the central layer surface, pile up paste bump plate (120).Can form the paste bump plate by on copper foil surface, printing paste bump (paste bump) (122) and printed stickup projection (124) being set.
By such manufacturing paste bump plate, and the paste bump plate of manufacturing is stacked on the central layer in groups so respectively, can reduce the manufacturing step that is used for printed circuit board (PCB).To pile up treatment effeciency in groups higher in order to make, and stack of insulative materials is formed with on it on Copper Foil of paste bump (126).
Because piling up the coating of paste bump plate in can making paste bump and being formed on BVH on central layer is electrically connected, so, help making the thickness that is stacked on the insulating material on the Copper Foil height, thereby make the end of paste bump expose the surface of insulating material less than paste bump.
The intensity of the paste bump that is printed on the copper foil layer and is set up be preferably lower than the coating on the central layer intensity, be higher than the intensity of insulating material.So when with stack of insulative materials on Copper Foil the time, paste bump is distortion not, passes the surface that insulating material exposes insulating material on the contrary.
In addition, in order to prevent with the paste bump stack of plates and be pressed on the central layer,, require the intensity of paste bump to be lower than the intensity of the coating on the central layer to be electrically connected paste bump damage coating during paste bump and the coating.
In the process that the paste bump sheetpile is laminated on the central layer, when the position with the position alignment BVH of paste bump, and when paste bump was pressed onto on the central layer (125), paste bump was deformed into the shape in the little hole in the above-mentioned coating, cheats slightly to fill this.Thereby, the coating of paste bump and central layer adhered to and be electrically connected.
Although with the material of silver paste, also can use the slurry (considering intensity, cost and the applicability of slurry) that well known to a person skilled in the art other types usually as paste bump.
At last, outer circuit is formed on the surface of paste bump plate (130), to finish multilayer board.The surface of paste bump plate that is formed with outer circuit on it is corresponding to above-mentioned Copper Foil.Owing to do not need to be used to form the processing such as BVH boring, plating of outer circuit, so can avoid of the prior art by piling up RCC etc. and electroplating the problem that the copper foil layer thickness that causes increases, thereby in the process that realizes outer circuit, can form micro circuit pattern with comparalive ease.
Fig. 3 is the flow chart of manufacture method that the printed circuit board (PCB) of use paste bump according to another embodiment of the present invention is shown.
Method according to manufacturing multilayer board of the present invention is not limited to pile up paste bump on single central layer, and it also comprises the situation of piling up a plurality of central layers and paste bump plate in groups.Following description will be set forth by piling up two central layers and paste bump plate (it is a lamina rara externa) in groups and be made the example of the situation of multilayer board.
Promptly, making in the process of printed circuit board (PCB) (200) by piling up first central layer, second central layer and paste bump plate (it is a lamina rara externa) in groups, at first, form first central layer (210) by filling plating filling BVH and on the surface of central layer, forming circuit pattern (218) by on a surface of chipware, forming BVH (214).
As previously mentioned, need to use copper clad panel (CCL) as chipware, in this case, need be before forming BVH, removal will form the copper foil layer part (212) of the position of BVH, to create window portion.In addition, before forming BVH and electroplating, can be by etching partially the thickness (216) that reduces copper foil layer, to realize microcircuit.
Next, by paste bump being connected on the plate with the same form of first central layer, be formed for piling up in groups to form second central layer (220) of multilayer board with first central layer.
That is, on the surface on the surperficial opposite that is formed with BVH by will being connected central layer (222) and these core projections (core bump) (224) are set, form second central layer corresponding to the core projection of the position of the formation BVH on first central layer.It is effective utilizing the manufacture method aspect of the method formation core projection the same with the aforesaid method that is used for paste bump.Yet, clearly, the invention is not restricted to the core projection situation the same with paste bump.
The same with the situation of aforesaid paste bump plate, after connecting the core projection, with the core stack of insulative materials on another surface of chipware, thereby make the core projection pass insulating material (226), to finish second central layer.By so piling up the insulating material that will be filled between first and second central layers in advance, realize quick manufacturing by piling up in groups.
At last, form the lamina rara externa (230) that has with aforesaid paste bump plate same form.By connecting the outer projection (232) on the Copper Foil, these outer projections (234) are set, and on Copper Foil, pile up the outer layer insulation material and make outer projection pass insulating material (236), form lamina rara externa.To provide detailed description below for lamina rara externa.
In the process that second central layer is stacked on first central layer, in the little hole of the BVH of core bump fills in being formed on first central layer, thereby core projection and the coating that is filled among the BVH of first central layer are electrically connected.
Because the core projection is connected in the position of the formation BVH on second central layer, so, when stacking gradually first central layer, second central layer and lamina rara externa, the coating of first central layer is electrically connected with the core projection, the core projection is connected to the coating among the BVH that is filled in second central layer, and the coating that is filled among the BVH of second central layer is electrically connected with outer projection.
In other words, the coating that is filled among the BVH of first central layer and second central layer is electrically connected by core projection and outer projection, to form IVH (interlevel via).Because interlayer central layer and coating have enough structural strengths, so more stable by the IVH structure of piling up traditional paste bump plate formation according to this holostrome IVH structure ratio of present embodiment formation.
In order to make paste bump be filled in little hole of coating and to be electrically connected, by piling up first central layer and second central layer, the core projection is aligned in the position in little hole, presses lamina rara externa (it is the paste bump plate) then, form printed circuit board (PCB) according to an embodiment of the invention.Obviously, the number of central layer can change along with the number of required circuit pattern layer.
Fig. 4 is the flow chart that the manufacture method of the printed circuit board (PCB) that uses paste bump according to an embodiment of the invention is shown.In Fig. 4, show chipware 10,40, copper foil layer 12, window portion 14, BVH 16, coating 18, little hole 19,42, circuit pattern 20,41, Copper Foil 30, paste bump 32,44, insulating material 34,46 and outer circuit 36.
As shown in Figure 4,, pile up in groups then, form multilayer board according to present embodiment by making first central layer, second central layer and paste bump plate simultaneously.Provide the description of each unit step below.
The manufacture process of (1) first central layer
In order to make first central layer with paste bump, as shown in Fig. 4 (a1), having carried out of preparation such as copper clad panel (CCL) etc. such as pretreated chipware 10 such as curing.Then, as shown in Fig. 4 (a2), remove the part that will form BVH 16 of copper foil layer 12, to form window portion 14.
Yet the present invention needn't comprise the step that forms window portion 14 as will be described, when using CO 2When laser came treatments B VH 16, a plurality of parts that need to remove copper foil layer 12 were with formation window portion 14, and use YAG laser treatment BVH 16 does not just need to form independently window portion 14, because it also can handle copper foil layer 12.Equally, be understandable that, in well known to a person skilled in the art scope, can use various BVH formation methods.
As shown in Fig. 4 (a3), utilize machine drilling or laser (CO 2Or YAG laser) BVH is handled in boring.Before in BVH 16, electroplating, as shown in Fig. 4 (a4), by etching partially the thickness that reduces copper foil layer 12.This has prevented to cause owing to the increase of the thickness of electroplating the copper foil layer 12 that causes the difficulty of the process that realizes microcircuit.
As shown in Fig. 4 (a5), the BVH 16 that is formed on the chipware 10 is filled plating, to form coating 18.The filling plating that is applied among the BVH 16 is a kind of being used for to provide conductive process to the hole that chipware 10 (it is an insulating material) forms.By general filling plating, BVH 16 is by complete filling, but formed coating 18 according to the shape of BVH 16, thereby formed little hole 19 of the shape of the groove in the peristome with BVH 16.
The little hole 19 that forms when in the prior art, the filling plating being applied to BVH 16 is as the obstacle of the electrical connection between coating 18 and other circuit pattern layer.In an embodiment of the present invention, utilize paste bump 32 to fill by filling little hole 19 that plating forms, improving the reliability that is electrically connected, thereby can obtain the effect of " little hole coating ".
As shown in Fig. 4 (a6), will comprise that exposure, development, etching and the circuit pattern formation method that detects are applied to the lip-deep copper foil layer 12 of chipware 10, to form circuit pattern 20.Along with finishing of circuit pattern forming process, the plate that obtains is sent to " superimposed " process that below will describe.
(2) manufacture process of paste bump plate
On the Copper Foil 30 of the preparation as shown in Fig. 4 (b1), as shown in Fig. 4 (b2), the electrocondution slurry of printing such as silver paste is to form paste bump 32.In order to improve the efficient of piling up in groups, will be stacked on such as the insulating material 34 of prepreg (prepreg) etc. on the Copper Foil 30 as shown in Fig. 4 (b3).In this process, the paste bump 32 that is formed on the Copper Foil 30 passes prepreg, is exposed to the surface of insulating material 34.
By the surface that makes paste bump 32 expose insulating material 34, during piling up in groups, fill little hole 19 with paste bump 32.When the process of piling up insulating material 34 is finished, the plate that obtains is sent to " superimposed " process that below will describe.
The manufacture process of (3) second central layers
As shown in Fig. 4 (c1), the central layer that preparation is made by the manufacture process that is used for first central layer, and as shown in Fig. 4 (c2), use the conductibility slurry paste bump 44 to be printed on and to form on little hole 42 facing surfaces of a plurality of parts of coating 18 of BVH 16.The paste bump that utilization is connected to another central layer or paste bump plate fill be formed on little hole 42 of the coating on second central layer in, the paste bump 44 that is connected to second central layer is electrically connected with little hole of another central layer, or is electrically connected with circuit pattern.
The same with the situation of paste bump plate, as shown in Fig. 4 (c3), will be stacked on second central layer such as the insulating material 46 of prepreg.In this process, paste bump 44 passes prepreg, stretches out the surface of insulating material 46.
By the surface that makes paste bump 44 expose insulating material 46, during piling up in groups, fill little hole 42 with paste bump 44.When the step of piling up insulating material 46 is finished, the plate that obtains is sent to " superimposed " process that below will describe.
(4) the superimposed process of piling up in groups that reaches
As shown in Fig. 4 (d), first central layer, second central layer and paste bump plate are carried out lamination process, thereby with the position in little hole 19 of the position alignment coating 18 of paste bump.As shown in Fig. 4 (e), these plates that pile up are in groups forced together, to make multilayer board.Traditional formation method of prior art can be applied on printed circuit board (PCB), form the next step of outer circuit 36.
As (d) of Fig. 4 with (e), can pile up a plurality of first central layers or second central layer, with the number of the circuit pattern layer that obtains expectation.
Fig. 5 is the cross-sectional view that uses the printed circuit board (PCB) of paste bump according to an embodiment of the invention.In Fig. 5, show chipware 10, coating 18, little hole 19, circuit pattern 20, paste bump 32, insulating material 34 and outer circuit 36.
In multilayer board according to an embodiment of the invention, BVH is formed in the central layer, coating 18 is filled in inside, a plurality of paste bump plates are piled up in groups, with little hole 19 of utilizing paste bump 32 to fill to be formed in the coating 18 and realize and being electrically connected of coating 18, thereby formation comprises the holostrome IVH structure of coating 18 and paste bump 32.
That is, multilayer board comprises according to an embodiment of the invention: such as the central layer of copper clad panel etc., be formed on BVH in the central layer, be filled in the coating 18 among the BVH and be stacked on paste bump plate on the central layer.Wherein, the paste bump plate is by printing and paste bump 32 on the Copper Foil 30 is set, and piles up insulating material 34 then and makes paste bump 32 pass that insulating material 34 forms.
As previously mentioned, the filling plating by general forms little hole 19 in the coating 18 in being filled in BVH, and this cheats 19 obstacles as the electrical connection of the interlayer between the circuit pattern 20 slightly.Yet, in an embodiment of the present invention, the paste bump stack of plates with paste bump 32 that will form corresponding to the position in little hole 19 on central layer, thereby make paste bump 32 fill little hole 19, and make paste bump be electrically connected with coating 18.
On the paste bump plate, pile up in the process of insulating material 34, the intensity of paste bump 32 must be greater than the intensity of insulating material 34, so that paste bump 32 passes insulating material 34, simultaneously, the intensity of paste bump 32 must be lower than the intensity of coating 18, so that paste bump is filled little hole 19 and is electrically connected with coating 18 formation.Herein, pressing on central layer and piling up in the process of paste bump plate, paste bump 32 is according to the warpage in little hole 19, so paste bump 32 is filled in little hole 19.
Pile up in groups finish after, general circuit pattern formation method is applied to the Copper Foil 30 (being the outermost layer of printed circuit board (PCB)) of multilayer board, to form outer circuit 36.
Simultaneously, embodiments of the invention comprise multilayer board, wherein, also comprise one or more additional central layers between central layer and paste bump plate, with the number of circuit pattern layer that expectation is provided.In this case, each with respect to the additional central layer of aforementioned central layer (hereinafter, be referred to as " add-in card ") all have a lip-deep BVH who wherein is filled with coating 18 who is formed on it, and have the paste bump 32 on little hole 19 facing surfaces of the coating 18 in the position that is connected and forms BVH.
In piling up the process that so is formed on the add-in card on the central layer, be connected little hole 19 of the paste bump filling central layer on the add-in card, and be electrically connected with coating 18.By on add-in card, piling up other add-in cards or paste bump plate, be formed in the coating 18 of add-in card little hole 19 by will with protruding 32 fillings of determining of the slurry that the coating 18 of add-in card is electrically connected.
That is, when one or more add-in cards being placed between central layer and the paste bump plate, the coating 18 of each plate and paste bump 32 are connected to the holostrome IVH of common formation.Because the coating of arranging in the middle of this IVH has 18, so they are structurally than more stable by only piling up the holostrome IVH that the paste bump plate forms.
Fig. 6 shows comparison according to the structural stability of the printed circuit board (PCB) of the use paste bump of the embodiment of the invention with according to the sectional view of the structural stability of the printed circuit board (PCB) of prior art.In Fig. 6, show central layer 10, coating 18, Copper Foil 30,31, reach paste bump 32,33.
As shown in Fig. 6 (a), for by only piling up the holostrome IVH that the paste bump plate forms, total only utilizes Copper Foil 31 and insulating material to form, and the intensity of the deficiency in the internal core part causes structurally unstable association.This can cause such as when high voltage, when high-frequency current flows through printed circuit board (PCB), the short circuit problem between paste bump 33 and the Copper Foil 31.
On the other hand, as shown in Fig. 6 (b), have enough structural strengths owing to central layer 10 with by the coating 18 of filling plating formation, so holostrome IVH has structurally stable combination according to an embodiment of the invention.Paste bump 32 is filled little hole, and to be connected with coating, Copper Foil 30 provides the thin copper foil layer that allows to form small (minute) outer circuit 36.
Fig. 7 illustrates the photo of explanation according to the holostrome IVH structure of the printed circuit board (PCB) of the use paste bump of the embodiment of the invention; Fig. 8 illustrates the photo of holostrome IVH structure of the printed circuit board (PCB) of explanation use paste bump according to another embodiment of the present invention; And Fig. 9 illustrates the photo of explanation according to the little hole coating in the printed circuit board (PCB) of the use paste bump of the embodiment of the invention.In Fig. 7 to Fig. 9, show coating 18 and paste bump 32.
Fig. 7 and Fig. 8 show stable holostrome IVH, and wherein, layer quilt of all in the cross section is electrically connected, and wherein, holostrome IVH comprises respectively coating 18 on a plurality of central layers that are electrically connected by paste bump 32 and the outer field paste bump plate of conduct that piles up.
Be filled in and form little hole (it is the recess that the shape owing to BVH forms) in the coating 18 among each BVH of central layer, and work as in the present embodiment, when piling up the plate with paste bump 32 in groups, paste bump 32 is along with the warpage in little hole, to be electrically connected with coating 18.
Owing to so paste bump 32 is filled in little hole, and it is electrically connected with coating 18, so, improved the stability that the interlayer between the circuit pattern 20 is electrically connected, and finished " little hole coating (dimple coverage) " as the solution of the electrical connection difficulty that causes by little hole.
Figure 10 illustrates the flow chart of method that the printed circuit board (PCB) of paste bump is used in according to another embodiment of the present invention manufacturing, and Figure 11 illustrates the schematic flow sheet of method that the printed circuit board (PCB) of paste bump is used in according to another embodiment of the present invention manufacturing.In Figure 11, show paste bump plate 8a, central layer 10a, copper foil layer 12a, via hole 20a, coating 22a, internal layer circuit 30a, Copper Foil 40a, outer circuit 42a, paste bump 50a, reach insulating material 60a.
For the radiating efficiency in the printed circuit board (PCB) that improves the paste bump plate 8a that use in the embodiments of the invention has the paste bump 50a that is pre-formed on Copper Foil 40a, as shown in Figure 11 (a1), central layer 10a is perforated (as shown in Figure 11 (a2)) its a plurality of parts, to form via hole 20a (P100).
In order to improve the efficient that forms internal layer circuit 30a, preferably use copper clad panel (CCL) as central layer 10a.Because via hole 20a not only is used as the arrangements of electric connection between the interlayer circuit pattern, and with the louvre that acts on the heat that produces in the release board, determines their size so will consider radiating efficiency.And because their permissible accuracies are lower than IVH or BVH, so can use mechanical punching to come to they punchings.
As shown in Figure 11 (a3), be electrically connected but also be used for forming coating 22a on the inner periphery of via hole 20a of heat conduction better not only being used for interlayer between the circuit pattern, to improve radiating efficiency.Equally, consider that via hole not only is used for being electrically connected and also be used for conduction, so as the thickness of the coating 22a on the inner periphery of the via hole 20a of louvre thickness greater than the coating on the inner periphery of other via holes 20a.Yet, according to the method for the manufacturing printed circuit board (PCB) of the embodiment of the invention coating 22a on the inner periphery of essential needs via hole 20a not, should be appreciated that, can use the electrically connected method in the scope of well known to a person skilled in the art, such as, that will describe below utilizes paste bump 50a, realizes that between circuit pattern interlayer is electrically connected.
In the process of the inner periphery of plated via 20a, also coating 22a is formed on the surface of central layer 10a, thereby has increased the thickness (this is for realizing that micro circuit pattern is disadvantageous) of circuit pattern.In this case, can omit electroplating processes, in embodiments of the invention, only the lip-deep copper foil layer 12a by central layer 10a forms internal layer circuit 30a, more easily to realize micro circuit pattern.When on the inner periphery of via hole 20a, not forming coating 22a, utilize the electrocondution slurry projection 50a that is filled among the via hole 20a, realize that the interlayer between the circuit pattern is electrically connected.
Then, as shown in Figure 11 (a4), internal layer circuit 30a is formed on the surface of central layer 10a (P110).Subtractive process can be applied to form in the process of internal layer circuit 30a, and when omitting foregoing electroplating process, can realize more small circuit pattern.
Next, as shown in Figure 11 (c), paste bump plate 8a is stacked on the surface of central layer 10a (P120).Paste bump plate 8a is the lip-deep plate that paste bump 50a has been printed on Copper Foil 40a in advance.In order to make paste bump plate 8a, the Copper Foil 40a as shown in Figure 11 (b1) has the paste bump 50a (P122) corresponding to the position printing of the via hole 20a that is formed on central layer 10a, afterwards, paste bump 50a (P124) is set.
Make a plurality of paste bump plate 8a respectively and they are stacked on the central layer 10a in groups, reduced the manufacturing step of printed circuit board (PCB), and in order to make the process of piling up in groups more efficient, as shown in Figure 11 (b3), insulating material 60a is stacked on the Copper Foil 40a with paste bump 50a goes up (P126).
As shown in Figure 11 (c), when by paste bump plate 8a is stacked on the central layer 10a, when making paste bump 50a be filled among the via hole 20a of central layer 10a, need make the height of the thickness of the insulating material 60a that is stacked on the Copper Foil 40a, thereby make the end of paste bump 50a pass the surface of insulating material 60a less than paste bump 50a.
Printing and the intensity that is arranged on the paste bump 50a on the Copper Foil 40a is preferably lower than the intensity of central layer 10a, greater than the intensity of insulating material 60a.Thereby when insulating material 60a being stacked on Copper Foil 40a and going up, paste bump 50a passes insulating material 60a, exposes the surface of insulating material 60a and indeformable.
In addition, thus for paste bump plate 8a is stacked on the central layer 10a and presses make paste bump 50a be filled among the via hole 20a during, prevent the damage of paste bump 50a to central layer 10a, the intensity of paste bump 50a is preferably lower than the intensity of central layer 10a.
In this case, when the position with the position alignment via hole 20a of paste bump 50a, and paste bump plate 8a is pressed in central layer 10a when going up, paste bump 50 is out of shape according to the shape of the via hole 20a among the central layer 10a, to be filled in the inboard of through hole 20a.
When usually with silver paste when acting on the material of paste bump 50a, what can expect is, considers intensity, cost, and the applicability of slurry, can use the slurry of the other types in the scope as well known to those skilled in the art.
Use the conductibility slurry can further improve the efficient (as previously mentioned) of dispelling the heat, can realize that interlayer is electrically connected by via hole 20a, and need on the inner periphery of via hole 20a, not form coating 22a by the via hole 20a that is filled with paste bump 50a.
The amount that is printed on the paste bump 50a on the Copper Foil 40a is decided according to the size of via hole 20a.Thereby, in the time of on paste bump plate 8a being stacked on central layer 10a, make paste bump 50a fill the via hole 20a that is formed among the central layer 10a.
Paste bump plate 8a is stacked on the surface of central layer 10a, the outer circuit 42a that insulate mutually with the lip-deep internal layer circuit 30a that is formed on central layer 10a is provided, and, act on the BVH that is electrically connected internal layer circuit 30a and outer circuit 42a so paste bump 50a need be formed to use because the interlayer that has obtained between such circuit pattern by BVH (blind hole) connects.
Herein, paste bump 50a needn't be formed on the position of via hole 20a, and can be formed on the position that need be electrically connected with internal layer circuit 30a.
Next, as shown in Figure 11 (d), paste bump plate 8a is stacked on two surfaces of central layer 10a.As shown in Figure 11 (c), by paste bump plate 8a being aimed at central layer 10a, realize piling up paste bump plate 8a, then the paste bump plate is pressed on the two sides of central layer 10a (P130).
This is filled among the via hole 20a paste bump 50a, thereby makes via hole 20a can be used as louvre.As previously mentioned, when on the inner periphery that coating 22a is not formed on via hole 20a, via hole 20a is also with acting on the IVH that the interlayer realized between the circuit pattern connects.Therefore, embodiments of the invention can provide the holostrome IVH across entire cross section, thereby the interlayer that reduces between the circuit pattern connects branch, to reduce induced noise (inductancenoise).
At last, as shown in Figure 11 (e), outer circuit 42a is formed on the Copper Foil 40a, promptly is formed on the surface of paste bump plate 8a (P140).The same with the situation of internal layer circuit 30a, can use general addition process or subtractive process, form outer circuit 42a.
Figure 12 is the cross-sectional view of the printed circuit board (PCB) of use paste bump according to another embodiment of the present invention.In Figure 12, show central layer 10a, copper foil layer 12a, via hole 20a, coating 22a, internal layer circuit 30a, Copper Foil 40a, outer circuit 42a, paste bump 50a and insulating material 60a.
Printed circuit board (PCB) according to present embodiment is by forming at the both sides of central layer 10a grouting material projection plate.Wherein, central layer 10a has the via hole 20a that is formed on its lip-deep internal layer circuit 30a and is bored, wherein, the paste bump plate forms through the following steps: corresponding to the position of via hole 20a, be connected the paste bump 50a on the Copper Foil 40a, on paste bump 50a, pile up insulating material 60a, make paste bump 50a pass the surface that insulating material 60a exposes insulating material 60a.
Need to use copper clad panel (CCL) as central layer 10a, to increase the efficient that forms circuit pattern.By electroplating metal level is coated on the inner periphery of common via hole 20a, realization is formed on the electrical connection of two lip-deep circuit patterns of central layer 10a.As previously mentioned, connect owing to the coating 22a on the inner periphery that is formed on via hole 20a not only provides circuit, the heat of going back the transmission board generation is to be discharged into the outside with heat, and therefore, this coating has the thickness thicker than general coating.
Yet, the invention is not restricted on the inner periphery of via hole 20a, form coating 22a, can be filled among the via hole 20a by making paste bump 50a, realize the effect that is electrically connected and dispels the heat.
By in advance paste bump 50a being printed and being arranged on the Copper Foil 40a, pile up insulating material 60a then, make paste bump 50a penetrate insulating material 60a, the surface of exposing insulating material 60a forms pulp sheets.For this reason, the intensity of paste bump 50a is formed intensity greater than insulating material 60a.
Silver paste generally is used for paste bump 50a, and determines to be printed on the amount of the paste bump 50a on the Copper Foil 40a corresponding to the size that is formed on the via hole 20a among the central layer 10a.When this makes on paste bump being stacked to central layer 10a, paste bump 50a filled vias 20a.
On central layer, pile up the paste bump plate, thereby make paste bump 50a be filled in the process among the via hole 20a, require the intensity of set paste bump 50a to be lower than the intensity of central layer 10a.Therefore, in the process that the paste bump sheetpile is laminated on the central layer 10a, paste bump 50a is according to the warpage of via hole 20a, and is filled among the via hole 20a, and central layer 10a do not caused damage.
After piling up the paste bump plate, outer circuit 42a is formed on the Copper Foil 40a (that is the surface of printed circuit board (PCB)) of paste bump plate.Because paste bump 50a also uses the BVH of be electrically connected internal layer circuit 30a and outer circuit 42a, so they are formed corresponding shape.
In order to pile up processing in groups by what on the paste bump plate, suppress, simply and at an easy rate make multilayer board, with the paste bump stack of plates on two surfaces of central layer 10a.This is by with the position of paste bump and the position alignment of the via hole 20a among the central layer 10a, is pressed in then to realize on the paste bump plate.
Figure 13 is the cross-sectional view of the printed circuit board (PCB) of use paste bump according to another embodiment of the present invention.In Figure 13, show central layer 10a, copper foil layer 12a, via hole 20a, coating 23a, internal layer circuit 30a, Copper Foil 40a, outer circuit 42a, paste bump 50a and insulating material 60a.
As previously mentioned, when filling remaining space, coating 23a is formed on the inner periphery that interlayer between the circuit pattern was electrically connected and was used for the via hole 20a of the heat that release board produces that is used among the central layer 10a with paste bump 50a.
With different among Figure 12, in Figure 13, adjusted the thickness of the coating 23a on the inner periphery that is formed on via hole 20a, make paste bump 50a filled vias 20a better.That is, increase the thickness of coating 23a from the opening of via hole 20a along depth direction, make the shape of via hole 20a corresponding to the shape of paste bump 50a.
For example, if 50a forms taper with paste bump, then the thickness of coating 23a increases along the degree of depth of via hole 20a, makes via hole 20a form the infundibulate corresponding to the shape of paste bump 50a, thereby improves deformation extent and the filling of improvement in via hole 20a of paste bump 50a.
If with the same in the embodiments of the invention, the paste bump plate is pressed on two surfaces of central layer 10a, then the thickness of coating 23a increases along depth direction from opening, thereby makes the inside of via hole 20a have the shape of similar hourglass, thereby can improve the filling of paste bump 50a.
According to comprising foregoing the present invention, can be by increasing the intensity among the BVH that electroplates central layer, the holostrome IVH structure that implementation structure is stable; By parallel processing with pile up in groups, reduced manufacturing time; Be stacked on the outermost layer by the Copper Foil with the paste bump plate, feasible easier realization microcircuit is by omitting some plating and boring procedure, reduce manufacturing cost, and can increase interlayer join domain between the circuit pattern, to improve connection reliability, realize little hole coating.
In addition, by using paste bump to fill the via hole that is formed in the central layer, improved radiating effect, and because the realization of holostrome IVH stacked structure, make the interlayer electrical connection path between the circuit pattern become shorter, thereby reduced induced noise (inductionnoise).
In addition, owing to make multilayer board, therefore simplified the process of making multilayer board, shortened delivery cycle, reduced manufacturing cost by piling up the paste bump plate in groups; And owing to, electroplate outer field step so omitted, and form more small circuit pattern on the copper foil layer by subtractive process directly is applied in piling up paste bump plate (each all has copper foil layer) back formation outer circuit.
Although describe spirit of the present invention in detail with reference to specific embodiment, these embodiment only are used for explanation and are not used in restriction the present invention.What it will be appreciated by those skilled in the art that is, under the condition that does not depart from the scope of the present invention with spirit, can carry out various modifications and change to these embodiment.

Claims (21)

1. method of making the printed circuit board (PCB) that uses paste bump, described method comprises:
(a) to the central layer punching, to form at least one via hole;
(b) at least one surface of described central layer, form internal layer circuit;
(c) on two surfaces of described central layer, pile up the paste bump plate, make described paste bump contact with each other, and make the via hole that punches be filled with described paste bump; And
(d) on the surface of described paste bump plate, form outer circuit.
2. method according to claim 1, wherein, described central layer is copper clad panel (CCL).
3. method according to claim 1, wherein, described punching may further comprise the steps with the step (a) that forms at least one via hole to central layer:
Bore at least one via hole by machine drilling.
4. method according to claim 1, wherein, described further comprising the steps of with the step (a) that forms at least one via hole: as on the inner periphery of described at least one via hole, to form coating to central layer boring.
5. method according to claim 1 wherein, forms described paste bump plate through the following steps:
(e) corresponding to the position that forms described at least one via hole, at least one paste bump of printing on Copper Foil; And
(f) described at least one paste bump is set.
6. method according to claim 5, in the described step (f) that described at least one paste bump is set afterwards, further comprising the steps of: as on described Copper Foil, to pile up insulating material, make described at least one paste bump penetrate described insulating material.
7. method according to claim 5, wherein, described at least one paste bump comprises silver paste.
8. method according to claim 5 wherein, corresponding to the size of described at least one via hole, is determined the amount of described at least one paste bump, makes at least one via hole be filled.
9. method according to claim 5, wherein, the intensity of described at least one paste bump is lower than the intensity of described coating, is higher than the intensity of described insulating material.
10. method according to claim 5 wherein, forms the shape of BVH (blind hole) with described at least one paste bump, to be electrically connected described internal layer circuit and described outer circuit.
11. method according to claim 1, step (c) of piling up the paste bump plate on described at least one surface and described formation on the surface of described paste bump plate between the step (d) of outer circuit, further comprising the steps of: as on two surfaces of described central layer, to press described paste bump plate at described central layer.
12. a printed circuit board (PCB) that uses paste bump, described printed circuit board (PCB) comprises:
Central layer;
Via hole is by formation that the part of described central layer is punched;
Internal layer circuit is formed at least one surface of described central layer;
A pair of paste bump plate forms by at least one paste bump being connected to copper foil layer and piling up insulating material, and is stacked on two surfaces of described central layer; And
Outer circuit is formed on the surface of described paste bump plate,
Wherein, described paste bump contacts with each other, and the via hole that punches is filled by described paste bump.
13. printed circuit board (PCB) according to claim 12, wherein, described central layer is copper clad panel (CCL).
14. printed circuit board (PCB) according to claim 12, wherein, coating is formed on the inner periphery of described via hole.
15. printed circuit board (PCB) according to claim 14, wherein, described coating has the thickness that the depth direction from the opening of described via hole along described via hole changes, and makes described via hole form the shape corresponding to the shape of described at least one paste bump.
16. printed circuit board (PCB) according to claim 14, wherein, the degree of depth of the thickness of described coating from the opening of described via hole along via hole increases.
17. printed circuit board (PCB) according to claim 12, wherein, described paste bump plate is by at least one paste bump of printing on Copper Foil, described at least one paste bump is set, on described Copper Foil, pile up insulating material then and form, make described at least one paste bump penetrate described insulating material.
18. printed circuit board (PCB) according to claim 12, wherein, described at least one paste bump comprises silver paste.
19. printed circuit board (PCB) according to claim 12, wherein, the amount of described at least one paste bump is determined corresponding to the size of described via hole.
20. printed circuit board (PCB) according to claim 12, wherein, the intensity of described at least one paste bump is less than the intensity of described coating, greater than the intensity of described insulating material.
21. printed circuit board (PCB) according to claim 12, wherein, described at least one paste bump is formed BVH (blind hole) shape, is used to be electrically connected described internal layer circuit and described outer circuit.
CN2006101454187A 2005-11-16 2006-11-15 Printed circuit board using paste bump and manufacturing method thereof Expired - Fee Related CN1968577B (en)

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