CN1957535A - 数字转换器装置 - Google Patents

数字转换器装置 Download PDF

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CN1957535A
CN1957535A CNA2004800431736A CN200480043173A CN1957535A CN 1957535 A CN1957535 A CN 1957535A CN A2004800431736 A CNA2004800431736 A CN A2004800431736A CN 200480043173 A CN200480043173 A CN 200480043173A CN 1957535 A CN1957535 A CN 1957535A
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J·F·哈杰姆斯塔
P·A·瓦兰德
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Telefonaktiebolaget LM Ericsson AB
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Abstract

一种用于将模拟信号转换成数字信号的数字转换器装置，包括：第一A/D转换器，所述第一A/D转换器被布置以第一采样率将所述模拟信号转换成第一数字信号，第一采样率低于模拟信号的频率，第二A/D转换器，所述第二A/D转换器被布置以第二采样率将所述模拟信号转换成第二数字信号，第二采样率低于模拟信号的频率，以第三采样率将所述第一和第二数字信号组合成第三数字信号的装置，所述第三采样率至少是所述第一和第二采样率的倍数。

Description

数字转换器装置
技术背景
本发明公开一种高分辨率/高采样率的数字转换器的新颖性结构。该数字转换器打算用于具有数字信号处理的无线电接收机，并且特别适合于用于检测和定位无线电频率发射机的定向仪系统。
现代无线电接收机经常使用数字信号处理(DSP)以处理接收到的信号。所述接收机使用具有在接收链某处的模拟/数字(A/D)转换器的模拟前端。理论上，A/D转换器在比特率和比特分辨率上应该具有尽可能高的分辨率，以例如在具有很少转换步骤的接收机中采样高频信号或者覆盖较大的频带。
虽然商业上可用的A/D转换的性能稳定增加，但是仍旧面临着以下问题，即选择使用具有快速采样率和很少比特的A/D转换器或者使用具有较高分辨率和较慢采样率的转换器。
在所谓的“增益测距(gain ranging)”技术中，具有可编程增益的放大器位于A/D转换器之前。逻辑单元控制放大器的增益以扩展数字转换器系统的动态范围。其他的措施堆叠多个快速/较少比特A/D转换器以获得具有高比特分辨率的合成快速转换器。其通过以下方式来实现，即通过将转换器连接到具有不同增益的多个放大器和转换器输出信号的比特栈。Stagetech公司销售用于音频使用的这种数字转换器系统，并且也可以从海洋测深器获知。
发明概述
本发明的一个目标是提供一种用于将模拟信号转换成数字信号的数字转换器，其与现有技术系统相比提高了效率。
该目标在所附专利权利要求所要求的装置中实现。
特别地，本发明涉及使用具有不同采样频率的两个堆叠的A/D转换器的数字转换器。
附图的简要说明
以下参考附图详细描述本发明，其中：
图1说明了本发明的数字转换器在定向仪系统的接收机链中的特殊应用，
图2是包括根据本发明的数字转换器的接收机系统的示意性结构图，
图3说明了根据本发明的包括两个堆叠层的A/D转换器的数字转换器，
图4是说明通过两个具有不同采样频率的A/D转换器如何次采样(under-sampled)输入信号的示意性频域图。
发明的详细描述
首先，我们给出可以采用本发明的定向仪系统的概述。如图1所示，定向仪系统包括位于左边的天线单元1，其从多个发射机源接收RF信号。该信号被发送到位于中央的RF单元2，信号在此被放大，下变频到基带并被解调。将解调信号发送到处理单元3以进行处理和分析。标题为“Anantenna arrangement”的共同悬而未决的专利申请详细描述了天线单元1，标题为“Arrangements for receiving channels in a direction-findingsystem”的共同未决的专利申请公开了RF单元的细节。
简而言之，天线装置包括以2×2关系安装的四个天线面板，以及可以安装在天线单元中央的全方向防护天线。
图2示出了图1中定向仪系统的接收机和处理器部件。该接收机部件包括四个相位信道和一个防护信道。该图示出了接收机链所包括的主要组件，即，放大器21、混频器22和带通滤波器23。在带通滤波器23之后，在根据本发明的数字转换器24中数字化信号。该数字信号然后在以下处理器链中被处理，该处理器链包括用于执行主数据简化的门阵列25和用于执行最后信号分析的所有链公共的CPU。图2所示的接收机是具有信号中频的超外差接收机。然而，也可以使用具有更多转换级的接收机。通常，基带的带宽大约为200MHz。理想情况下，数字转换器将以至少400MHz的采样频率进行采样以符合Nyquist理论。
图3所示的数字转换器系统包括位于输出处的反混淆滤波器31。以中断频率f3来设计该滤波器，该中断频率将进入随后数字转换器的信号频率限制为数字转换器的有效采样率的一半。通过滤波器31的信号被馈送到两个并联的A/D转换器32、33。A/D转换器32、33以不同的采样频率进行采样(在随后的实例中，我们假设该采样频率分别为70MHz和50MHz)。这利用了以下事实：信号具有高达15MHz的典型带宽，并且允许系统以与具有500MHz(2.5倍于总带宽)采样率的单个A/D相比基本上更低的数据速率进行操作。在减少采样频率情况下，具有高达14比特(84dB)的A/D转换器可用，同时在500MHz情况下，分辨率通常为8比特(48dB)。数字转换器持续采样频带，并且以大约120MS/s的数据流馈送到信号处理门阵列。该信号处理门阵列将来自于两个A/D转换器的信号组合成具有14比特分辨率和350MHz采样频率的单个信号14。新的采样速率应该是两个采样速率的倍数，或者是该倍数进一步的倍数。所以，具有70和50MHz的数字转换器，其最低采样速率为350MHz。
次采样信号将显示为在A/D转换器通带内具有较低的频率。图4说明了本发明的原理。该图形示出了从0延伸到f3的接收机通带内信号fi，f3是反混淆滤波器31的截止频率。由于次采样，fi将向下折叠到各个A/D转换器32、33的通带。通过黑和较浅阴影三角来表示A/D转换器的通带。该三角关于半采样频率(也就是Nyquist频率)对称。在大约多倍的Nyquist频率时出现折叠。较浅阴影的三角表示负频率的区域。
如果我们仅有一个A/D转换器，那么我们不能够知道原始信号是否在转换器通带之外，以及与采样“视在(apparent)”频率相关的折叠率。但是，通过使用两个转换器，可以唯一地重构信号的频率。
通过首先识别两个信道中的相应信号来执行“重构”过程。通过检测信道之间的一致性来识别信号对。在积分时间1/f3上具有0.9以上相关因子的信号被认为是有效对，而具有较低相关因子的信号被屏蔽。当将信号上变频回到其正确的频率时，给定信号对的两个频率(即绝对频率值)以及这两个频率之间的相对差值将保持用于识别正确因子以进行使用的信息。如图所示，将频谱分成单个频带1、2、3...。在这些频带的每一频带中，A/D信道1和2中频率之间存在特殊的关系，并且我们可以为重构信号fi采用规则。通过以下关系给出了频移因子n：
fr1＝(fi-nf1)，n＝0，1，2，3...
fr2＝(fi-mf2)， m = n n + 1
其中fi是输入信号的频率，f1是A/D转换器1的采样率，f2是A/D转换器2的采样率，fr1是A/D转换器1所记录的输入信号的视在频率，fr2是A/D转换器2所记录的视在频率。
n的值取决于所落入的频带fr1和fr2。在图4所示的实例中，我们仅需要考虑两种情况：如果视在信号落入到两个信道较浅黑色阴影三角内，也就是fr1和fr2处于频带1内，那么m＝n。另一情况是当视在信号之一落入到频带1并且另一落入到频带2，那么m＝n+1。其在图4中示出，其他的情况不适用。
所以，使用已知频移因子n将A/D信道1中的信号上变频，同时使用已知的并且可能不同的频移因子m将A/D信道2中信号上变频。当信号进行上变频时，对来自A/D信道1和A/D2的信号相加。可替换地，仅将一个信道中的信号上变频。然而，通过使用两个信号，提高了信噪比。
虽然图4所示实例使用两个A/D转换器，但是本发明的数字转换器可以使用更多的A/D转换器。其他的选择是将本发明的堆叠方式与引言所述现有技术中的多倍组合方法相组合，并且因此获得A/D转换器矩阵。该组合具有高比特率和高分辨率。

Claims (8)

1.一种用于数字化高频模拟信号的方法，其特征在于：
以第一采样频率(f1)将所述模拟信号转换成第一数字信号，
以第二采样频率(f2)将所述模拟信号转换成第二数字信号，
使所述第一数字信号和所述第二数字信号相关，
识别所述第一和第二数字信号之间的频率比，
根据所述频率比确定第一调换率(n)，
以第一调换率(n)将所述第一数字信号调换到较高频率。
2.如权利要求1所述的方法，其特征在于：
根据所述频率比确定第二调换率(m)，
以第二调换率(m)将所述第二数字信号调换到较高频率，并且
将第一调换过的信号加到第二调换过的信号。
3.如权利要求1所述的方法，其特征在于：
保留在积分时间1/f3之上具有0.9以上的相关数字的信号并且屏蔽具有较低相关率的信号，f3等于所述第一和第二采样频率(f1，f2)的倍数。
4.如权利要求1所述的方法，其特征在于：
在所述模拟信号被转换之前，用反混淆滤波器对其进行滤波，所述反混淆滤波器具有的截止频率(f3)等于所述第一和第二采样频率(f1，f2)的倍数。
5.一种用于将模拟信号转换成数字信号的数字转换器装置，其特征在于：
第一A/D转换器(32)，所述第一A/D转换器被布置以第一采样率(f1)将所述模拟信号转换成第一数字信号，第一采样率(f1)低于模拟信号的频率(fi)，
第二A/D转换器(33)，所述第二A/D转换器被布置以第二采样率(f2)将所述高频模拟信号转换成第二数字信号，第二采样率(f2)低于模拟信号的频率(fi)，
以第三采样率(f3)将所述第一和第二数字信号组合成第三数字信号的装置，所述第三采样率(f3)至少是所述第一和第二采样率的倍数。
6.如权利要求5所述的数字转换器，其特征在于：
用于将第一和第二数字信号相关的装置，该装置被布置以屏蔽在积分时间1/f3上具有低于0.9的相关因子的信号，f3等于所述第一和第二采样频率的倍数。
7.如权利要求6所述的数字转换器，其特征在于：
用于识别第一和第二数字信号中相应信号对的装置，
基于所述信号对的频率确定第一转换因子(n)的装置，
以所述第一转换因子(n)将所述第一数字信号的频率调换到第三数字信号的装置。
8.如权利要求6所述的数字转换器，其特征在于：
用于识别第一和第二数字信号中相应信号对的装置，
基于所述信号对的频率确定第一转换因子(n)的装置，
以所述第一转换因子(n)将所述第一数字信号的频率调换到第四数字信号的装置，
基于所述信号对的频率确定第二转换因子(m)的装置，
以所述第二转换因子(m)将所述第二数字信号的频率调换到第五数字信号的装置，
用于将第四数字信号加到第五数字信号并且获得所述第三数字信号的装置。
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