CN1954421A - 在具有硅锗缓冲层的绝缘体上形成应变Si/SiGe的方法 - Google Patents

在具有硅锗缓冲层的绝缘体上形成应变Si/SiGe的方法 Download PDF

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Publication number
CN1954421A
CN1954421A CNA2005800153595A CN200580015359A CN1954421A CN 1954421 A CN1954421 A CN 1954421A CN A2005800153595 A CNA2005800153595 A CN A2005800153595A CN 200580015359 A CN200580015359 A CN 200580015359A CN 1954421 A CN1954421 A CN 1954421A
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layer
strained
sige
silicon
relaxed
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Chinese (zh)
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陈华杰
S·W·比德尔
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International Business Machines Corp
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International Business Machines Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1914Preparing SOI wafers using bonding
    • H10P90/1916Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/91Controlling charging state at semiconductor-insulator interface

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  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)
CNA2005800153595A 2004-06-29 2005-02-16 在具有硅锗缓冲层的绝缘体上形成应变Si/SiGe的方法 Pending CN1954421A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/710,255 US6893936B1 (en) 2004-06-29 2004-06-29 Method of Forming strained SI/SIGE on insulator with silicon germanium buffer
US10/710,255 2004-06-29

Publications (1)

Publication Number Publication Date
CN1954421A true CN1954421A (zh) 2007-04-25

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CNA2005800153595A Pending CN1954421A (zh) 2004-06-29 2005-02-16 在具有硅锗缓冲层的绝缘体上形成应变Si/SiGe的方法

Country Status (7)

Country Link
US (1) US6893936B1 (https=)
EP (1) EP1779422A4 (https=)
JP (1) JP2008505482A (https=)
KR (1) KR20070032649A (https=)
CN (1) CN1954421A (https=)
TW (1) TWI348200B (https=)
WO (1) WO2006011912A1 (https=)

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WO2012000284A1 (zh) * 2010-06-29 2012-01-05 清华大学 一种具有在绝缘衬底上形成高ge应变层的半导体结构及其制造方法
CN102315246A (zh) * 2010-06-30 2012-01-11 中国科学院上海硅酸盐研究所 一种弛豫SiGe虚拟衬底及其制备方法
CN103165511A (zh) * 2011-12-14 2013-06-19 中国科学院上海微系统与信息技术研究所 一种制备goi的方法
CN103165512A (zh) * 2011-12-14 2013-06-19 中国科学院上海微系统与信息技术研究所 一种超薄绝缘体上半导体材料及其制备方法
CN104835844A (zh) * 2013-11-26 2015-08-12 三星电子株式会社 鳍式场效应晶体管半导体装置及其制造方法
CN107667416A (zh) * 2015-06-01 2018-02-06 太阳能爱迪生半导体有限公司 制造绝缘体上半导体的方法
CN114000121A (zh) * 2022-01-05 2022-02-01 武汉大学 一种基于mbe法的应变金刚石生长掺杂方法及外延结构
CN114000120A (zh) * 2022-01-05 2022-02-01 武汉大学 一种基于cvd法的应变金刚石生长掺杂方法

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FR2861497B1 (fr) * 2003-10-28 2006-02-10 Soitec Silicon On Insulator Procede de transfert catastrophique d'une couche fine apres co-implantation
US7495266B2 (en) * 2004-06-16 2009-02-24 Massachusetts Institute Of Technology Strained silicon-on-silicon by wafer bonding and layer transfer
DE102004062290A1 (de) * 2004-12-23 2006-07-06 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung eines Halbleiterchips
US20070000434A1 (en) * 2005-06-30 2007-01-04 Accent Optical Technologies, Inc. Apparatuses and methods for detecting defects in semiconductor workpieces
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TWI391645B (zh) * 2005-07-06 2013-04-01 Nanometrics Inc 晶圓或其他工作表面下污染物及缺陷非接觸測量之差分波長光致發光
TWI439684B (zh) * 2005-07-06 2014-06-01 Nanometrics Inc 具自晶圓或其他工件特定材料層所發射光致發光信號優先偵測之光致發光成像
US20070008526A1 (en) * 2005-07-08 2007-01-11 Andrzej Buczkowski Apparatus and method for non-contact assessment of a constituent in semiconductor workpieces
FR2889887B1 (fr) * 2005-08-16 2007-11-09 Commissariat Energie Atomique Procede de report d'une couche mince sur un support
FR2891281B1 (fr) * 2005-09-28 2007-12-28 Commissariat Energie Atomique Procede de fabrication d'un element en couches minces.
DE102005051332B4 (de) * 2005-10-25 2007-08-30 Infineon Technologies Ag Halbleitersubstrat, Halbleiterchip, Halbleiterbauteil und Verfahren zur Herstellung eines Halbleiterbauteils
FR2893446B1 (fr) * 2005-11-16 2008-02-15 Soitec Silicon Insulator Techn TRAITEMENT DE COUCHE DE SiGe POUR GRAVURE SELECTIVE
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FR2910179B1 (fr) 2006-12-19 2009-03-13 Commissariat Energie Atomique PROCEDE DE FABRICATION DE COUCHES MINCES DE GaN PAR IMPLANTATION ET RECYCLAGE D'UN SUBSTRAT DE DEPART
CN100447950C (zh) * 2007-01-26 2008-12-31 厦门大学 低位错密度锗硅虚衬底的制备方法
US8101501B2 (en) * 2007-10-10 2012-01-24 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing semiconductor device
US7524740B1 (en) 2008-04-24 2009-04-28 International Business Machines Corporation Localized strain relaxation for strained Si directly on insulator
FR2947098A1 (fr) 2009-06-18 2010-12-24 Commissariat Energie Atomique Procede de transfert d'une couche mince sur un substrat cible ayant un coefficient de dilatation thermique different de celui de la couche mince
CN102498542B (zh) 2009-09-04 2016-05-11 住友化学株式会社 半导体基板、场效应晶体管、集成电路和半导体基板的制造方法
CN103717351A (zh) * 2011-08-01 2014-04-09 巴斯夫欧洲公司 一种制造半导体装置的方法,其包括在具有3.0至5.5的pH值的CMP组合物的存在下化学机械抛光元素锗及/或Si1-xGex 材料
CN102427068B (zh) * 2011-12-02 2014-06-18 中国科学院上海微系统与信息技术研究所 单片集成具有晶格失配的晶体模板及其制作方法
TWI457985B (zh) * 2011-12-22 2014-10-21 Nat Inst Chung Shan Science & Technology Semiconductor structure with stress absorbing buffer layer and manufacturing method thereof
US8518807B1 (en) 2012-06-22 2013-08-27 International Business Machines Corporation Radiation hardened SOI structure and method of making same
KR101381056B1 (ko) * 2012-11-29 2014-04-14 주식회사 시지트로닉스 Ⅲ-질화계 에피층이 성장된 반도체 기판 및 그 방법
US9343303B2 (en) * 2014-03-20 2016-05-17 Samsung Electronics Co., Ltd. Methods of forming low-defect strain-relaxed layers on lattice-mismatched substrates and related semiconductor structures and devices
WO2016109502A1 (en) * 2014-12-31 2016-07-07 Sunedison Semiconductor Limited Preparation of silicon-germanium-on-insulator structures
KR102257423B1 (ko) 2015-01-23 2021-05-31 삼성전자주식회사 반도체 기판 및 이를 포함하는 반도체 장치
JP2025168976A (ja) * 2024-04-30 2025-11-12 信越半導体株式会社 SiGe基板の作製方法及びSiGe基板

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US6524935B1 (en) 2000-09-29 2003-02-25 International Business Machines Corporation Preparation of strained Si/SiGe on insulator by hydrogen induced layer transfer technique
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Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8440550B2 (en) 2010-06-29 2013-05-14 Tsinghua University Method for forming strained layer with high Ge content on substrate and semiconductor structure
WO2012000284A1 (zh) * 2010-06-29 2012-01-05 清华大学 一种具有在绝缘衬底上形成高ge应变层的半导体结构及其制造方法
CN102315246A (zh) * 2010-06-30 2012-01-11 中国科学院上海硅酸盐研究所 一种弛豫SiGe虚拟衬底及其制备方法
CN102315246B (zh) * 2010-06-30 2013-03-13 中国科学院上海硅酸盐研究所 一种弛豫SiGe虚拟衬底及其制备方法
CN103165511A (zh) * 2011-12-14 2013-06-19 中国科学院上海微系统与信息技术研究所 一种制备goi的方法
CN103165512A (zh) * 2011-12-14 2013-06-19 中国科学院上海微系统与信息技术研究所 一种超薄绝缘体上半导体材料及其制备方法
CN103165511B (zh) * 2011-12-14 2015-07-22 中国科学院上海微系统与信息技术研究所 一种制备goi的方法
CN104835844B (zh) * 2013-11-26 2019-10-18 三星电子株式会社 鳍式场效应晶体管半导体装置及其制造方法
CN104835844A (zh) * 2013-11-26 2015-08-12 三星电子株式会社 鳍式场效应晶体管半导体装置及其制造方法
CN107667416A (zh) * 2015-06-01 2018-02-06 太阳能爱迪生半导体有限公司 制造绝缘体上半导体的方法
CN107667416B (zh) * 2015-06-01 2021-08-31 环球晶圆股份有限公司 制造绝缘体上半导体的方法
CN114000121A (zh) * 2022-01-05 2022-02-01 武汉大学 一种基于mbe法的应变金刚石生长掺杂方法及外延结构
CN114000120A (zh) * 2022-01-05 2022-02-01 武汉大学 一种基于cvd法的应变金刚石生长掺杂方法
CN114000121B (zh) * 2022-01-05 2022-03-15 武汉大学 一种基于mbe法的应变金刚石生长掺杂方法及外延结构
CN114000120B (zh) * 2022-01-05 2022-03-15 武汉大学 一种基于cvd法的应变金刚石生长掺杂方法
US11519097B1 (en) 2022-01-05 2022-12-06 Wuhan University Strained diamond growing and doping method based on chemical vapor deposition (CVD) method

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Publication number Publication date
US6893936B1 (en) 2005-05-17
TWI348200B (en) 2011-09-01
EP1779422A1 (en) 2007-05-02
EP1779422A4 (en) 2007-08-01
KR20070032649A (ko) 2007-03-22
WO2006011912A1 (en) 2006-02-02
JP2008505482A (ja) 2008-02-21
TW200601420A (en) 2006-01-01

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