CN1926679B - 在半导体装置制造中减少浅沟槽隔离凹陷区形成的方法 - Google Patents

在半导体装置制造中减少浅沟槽隔离凹陷区形成的方法 Download PDF

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Publication number
CN1926679B
CN1926679B CN2005800068145A CN200580006814A CN1926679B CN 1926679 B CN1926679 B CN 1926679B CN 2005800068145 A CN2005800068145 A CN 2005800068145A CN 200580006814 A CN200580006814 A CN 200580006814A CN 1926679 B CN1926679 B CN 1926679B
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China
Prior art keywords
stop layer
polish stop
nitride polish
nitride
semiconductor substrate
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Expired - Fee Related
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CN2005800068145A
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English (en)
Chinese (zh)
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CN1926679A (zh
Inventor
D·J·邦瑟
J·格罗舍普弗
S·达克希那-穆尔蒂
J·G·佩尔兰
J·D·奇克
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GlobalFoundries Inc
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GlobalFoundries Inc
Advanced Micro Devices Inc
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Publication of CN1926679A publication Critical patent/CN1926679A/zh
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
CN2005800068145A 2004-03-04 2005-02-26 在半导体装置制造中减少浅沟槽隔离凹陷区形成的方法 Expired - Fee Related CN1926679B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/791,759 US7091106B2 (en) 2004-03-04 2004-03-04 Method of reducing STI divot formation during semiconductor device fabrication
US10/791,759 2004-03-04
PCT/US2005/006177 WO2005093825A1 (en) 2004-03-04 2005-02-26 Method of reducing sti divot formation during semiconductor device fabrication

Publications (2)

Publication Number Publication Date
CN1926679A CN1926679A (zh) 2007-03-07
CN1926679B true CN1926679B (zh) 2010-10-06

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CN2005800068145A Expired - Fee Related CN1926679B (zh) 2004-03-04 2005-02-26 在半导体装置制造中减少浅沟槽隔离凹陷区形成的方法

Country Status (8)

Country Link
US (1) US7091106B2 (enExample)
JP (1) JP2007526652A (enExample)
KR (1) KR20060129037A (enExample)
CN (1) CN1926679B (enExample)
DE (1) DE112005000512B4 (enExample)
GB (1) GB2426126B (enExample)
TW (1) TWI355678B (enExample)
WO (1) WO2005093825A1 (enExample)

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Publication number Priority date Publication date Assignee Title
US12002707B2 (en) 2020-08-06 2024-06-04 Changxin Memory Technologies, Inc. Semiconductor structure and manufacturing method thereof

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KR100568259B1 (ko) * 2004-12-14 2006-04-07 삼성전자주식회사 트렌치 소자 분리형 반도체 장치 및 그 형성 방법
US20080204580A1 (en) * 2007-02-28 2008-08-28 Micron Technology, Inc. Method, apparatus and system providing imaging device with color filter array
US20090053834A1 (en) * 2007-08-23 2009-02-26 Vladimir Alexeevich Ukraintsev Use of scatterometry for in-line detection of poly-si strings left in sti divot after gate etch
KR100880227B1 (ko) * 2007-10-09 2009-01-28 주식회사 동부하이텍 플래시 메모리 소자의 제조방법
US7745320B2 (en) * 2008-05-21 2010-06-29 Chartered Semiconductor Manufacturing, Ltd. Method for reducing silicide defects in integrated circuits
WO2010125428A1 (en) * 2009-04-30 2010-11-04 X-Fab Semiconductor Foundries Ag Manufacturing integrated circuit components having multiple gate oxidations
US8274114B2 (en) * 2010-01-14 2012-09-25 Broadcom Corporation Semiconductor device having a modified shallow trench isolation (STI) region and a modified well region
US8283722B2 (en) 2010-06-14 2012-10-09 Broadcom Corporation Semiconductor device having an enhanced well region
US9123807B2 (en) 2010-12-28 2015-09-01 Broadcom Corporation Reduction of parasitic capacitance in a semiconductor device
US20120292735A1 (en) 2011-05-20 2012-11-22 GLOBALFOUNDRIES Singapore Pte.Ltd. Corner transistor suppression
US9263556B2 (en) * 2012-06-29 2016-02-16 Taiwan Semiconductor Manufacturing Company, Ltd. Silicide process using OD spacers
US8716102B2 (en) * 2012-08-14 2014-05-06 Globalfoundries Inc. Methods of forming isolation structures for semiconductor devices by performing a dry chemical removal process
US8603895B1 (en) 2012-09-11 2013-12-10 Globalfoundries Inc. Methods of forming isolation structures for semiconductor devices by performing a deposition-etch-deposition sequence
US9219059B2 (en) 2012-09-26 2015-12-22 International Business Machines Corporation Semiconductor structure with integrated passive structures
JP6591347B2 (ja) 2016-06-03 2019-10-16 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP6629159B2 (ja) * 2016-09-16 2020-01-15 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
CN111341724B (zh) * 2018-12-19 2022-11-04 上海新微技术研发中心有限公司 浅沟槽隔离工艺及浅沟槽隔离结构
KR102821368B1 (ko) 2019-06-21 2025-06-17 삼성전자주식회사 반도체 소자 및 그 제조 방법
CN113611604A (zh) * 2021-03-19 2021-11-05 联芯集成电路制造(厦门)有限公司 半导体元件的制作方法

Citations (4)

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Publication number Priority date Publication date Assignee Title
US5177028A (en) * 1991-10-22 1993-01-05 Micron Technology, Inc. Trench isolation method having a double polysilicon gate formed on mesas
CN1356722A (zh) * 2000-12-01 2002-07-03 三星电子株式会社 具有浅沟槽隔离结构的半导体器件及其制造方法
US6555476B1 (en) * 1997-12-23 2003-04-29 Texas Instruments Incorporated Silicon carbide as a stop layer in chemical mechanical polishing for isolation dielectric
US6673695B1 (en) * 2002-02-01 2004-01-06 Chartered Semiconductor Manufacturing Ltd. STI scheme to prevent fox recess during pre-CMP HF dip

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US98661A (en) * 1870-01-11 Ikank l
US5234535A (en) * 1992-12-10 1993-08-10 International Business Machines Corporation Method of producing a thin silicon-on-insulator layer
US5665633A (en) * 1995-04-06 1997-09-09 Motorola, Inc. Process for forming a semiconductor device having field isolation
US5616513A (en) * 1995-06-01 1997-04-01 International Business Machines Corporation Shallow trench isolation with self aligned PSG layer
JPH098135A (ja) * 1995-06-26 1997-01-10 Toshiba Corp 半導体装置の製造方法
JP3125719B2 (ja) * 1997-07-28 2001-01-22 日本電気株式会社 半導体装置及びその製造方法
JP3053009B2 (ja) * 1997-09-29 2000-06-19 日本電気株式会社 半導体装置の製造方法
CN1219328C (zh) * 1998-02-19 2005-09-14 国际商业机器公司 具有改善了注入剂的场效应晶体管及其制造方法
JP3178416B2 (ja) * 1998-05-22 2001-06-18 日本電気株式会社 半導体装置の製造方法
US6599810B1 (en) * 1998-11-05 2003-07-29 Advanced Micro Devices, Inc. Shallow trench isolation formation with ion implantation
US6248641B1 (en) * 1999-02-05 2001-06-19 United Microelectronics Corp. Method of fabricating shallow trench isolation
JP2001185731A (ja) * 1999-12-24 2001-07-06 Toshiba Corp 半導体装置及びその製造方法
US6432797B1 (en) 2001-01-25 2002-08-13 Chartered Semiconductor Manufacturing Ltd. Simplified method to reduce or eliminate STI oxide divots
US20020142531A1 (en) * 2001-03-29 2002-10-03 Hsu Sheng Teng Dual damascene copper gate and interconnect therefore
JP4318892B2 (ja) * 2002-05-30 2009-08-26 富士通マイクロエレクトロニクス株式会社 電子装置の設計方法および製造方法
US6566215B1 (en) * 2002-06-06 2003-05-20 Chartered Semiconductor Manufacturing Ltd. Method of fabricating short channel MOS transistors with source/drain extensions

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5177028A (en) * 1991-10-22 1993-01-05 Micron Technology, Inc. Trench isolation method having a double polysilicon gate formed on mesas
US6555476B1 (en) * 1997-12-23 2003-04-29 Texas Instruments Incorporated Silicon carbide as a stop layer in chemical mechanical polishing for isolation dielectric
CN1356722A (zh) * 2000-12-01 2002-07-03 三星电子株式会社 具有浅沟槽隔离结构的半导体器件及其制造方法
US6673695B1 (en) * 2002-02-01 2004-01-06 Chartered Semiconductor Manufacturing Ltd. STI scheme to prevent fox recess during pre-CMP HF dip

Non-Patent Citations (2)

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Title
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US 6673695 B1,全文.

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12002707B2 (en) 2020-08-06 2024-06-04 Changxin Memory Technologies, Inc. Semiconductor structure and manufacturing method thereof

Also Published As

Publication number Publication date
GB0617207D0 (en) 2006-10-11
KR20060129037A (ko) 2006-12-14
TWI355678B (en) 2012-01-01
US20050196928A1 (en) 2005-09-08
WO2005093825A1 (en) 2005-10-06
JP2007526652A (ja) 2007-09-13
DE112005000512T5 (de) 2007-01-11
GB2426126A (en) 2006-11-15
GB2426126B (en) 2008-07-23
TW200535945A (en) 2005-11-01
CN1926679A (zh) 2007-03-07
DE112005000512B4 (de) 2011-09-08
US7091106B2 (en) 2006-08-15

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