CN1842907A - Substrate for device bonding, device bonded substrate, and method for producing same - Google Patents
Substrate for device bonding, device bonded substrate, and method for producing same Download PDFInfo
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- CN1842907A CN1842907A CNA2004800243915A CN200480024391A CN1842907A CN 1842907 A CN1842907 A CN 1842907A CN A2004800243915 A CNA2004800243915 A CN A2004800243915A CN 200480024391 A CN200480024391 A CN 200480024391A CN 1842907 A CN1842907 A CN 1842907A
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- 239000000758 substrate Substances 0.000 title claims abstract description 171
- 238000004519 manufacturing process Methods 0.000 title claims description 19
- 229910052718 tin Inorganic materials 0.000 claims abstract description 258
- 229910052751 metal Inorganic materials 0.000 claims abstract description 162
- 239000002184 metal Substances 0.000 claims abstract description 162
- 229910052737 gold Inorganic materials 0.000 claims abstract description 63
- 239000010953 base metal Substances 0.000 claims abstract description 57
- 230000005496 eutectics Effects 0.000 claims abstract description 57
- 230000003746 surface roughness Effects 0.000 claims abstract description 34
- 229910052697 platinum Inorganic materials 0.000 claims abstract description 22
- 229910052797 bismuth Inorganic materials 0.000 claims abstract description 20
- 229910052738 indium Inorganic materials 0.000 claims abstract description 19
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 18
- 229910052709 silver Inorganic materials 0.000 claims abstract description 18
- 229910052725 zinc Inorganic materials 0.000 claims abstract description 18
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 17
- 229910052802 copper Inorganic materials 0.000 claims abstract description 17
- 229910052742 iron Inorganic materials 0.000 claims abstract description 17
- 239000011135 tin Substances 0.000 claims description 322
- 238000009499 grossing Methods 0.000 claims description 62
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 46
- 238000000034 method Methods 0.000 claims description 37
- 238000005476 soldering Methods 0.000 claims description 23
- 230000015572 biosynthetic process Effects 0.000 claims description 22
- 238000009940 knitting Methods 0.000 claims description 9
- 230000002520 cambial effect Effects 0.000 claims description 5
- 229910052723 transition metal Inorganic materials 0.000 claims description 4
- 150000003624 transition metals Chemical class 0.000 claims description 4
- 229910020816 Sn Pb Inorganic materials 0.000 abstract description 17
- 229910020922 Sn-Pb Inorganic materials 0.000 abstract description 17
- 229910008783 Sn—Pb Inorganic materials 0.000 abstract description 17
- 239000000919 ceramic Substances 0.000 abstract description 16
- 229910000679 solder Inorganic materials 0.000 abstract description 10
- 230000008018 melting Effects 0.000 abstract description 3
- 238000002844 melting Methods 0.000 abstract description 3
- 230000007613 environmental effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 348
- 239000004065 semiconductor Substances 0.000 description 66
- 239000010931 gold Substances 0.000 description 62
- 238000003475 lamination Methods 0.000 description 50
- 239000010408 film Substances 0.000 description 35
- BASFCYQUMIYNBI-UHFFFAOYSA-N platinum Substances [Pt] BASFCYQUMIYNBI-UHFFFAOYSA-N 0.000 description 26
- 239000000203 mixture Substances 0.000 description 19
- 230000000052 comparative effect Effects 0.000 description 13
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 12
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 11
- 239000010936 titanium Substances 0.000 description 10
- 229910000510 noble metal Inorganic materials 0.000 description 8
- 238000003466 welding Methods 0.000 description 8
- 229910045601 alloy Inorganic materials 0.000 description 7
- 239000000956 alloy Substances 0.000 description 7
- 230000000694 effects Effects 0.000 description 7
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 6
- 230000004927 fusion Effects 0.000 description 6
- 238000004544 sputter deposition Methods 0.000 description 6
- 229910017083 AlN Inorganic materials 0.000 description 5
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 5
- 229910015363 Au—Sn Inorganic materials 0.000 description 5
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 5
- 239000000047 product Substances 0.000 description 5
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- 229910001020 Au alloy Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 229910008310 Si—Ge Inorganic materials 0.000 description 1
- 229910009078 Sn—Zn—In Inorganic materials 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- 229910052728 basic metal Inorganic materials 0.000 description 1
- 150000003818 basic metals Chemical class 0.000 description 1
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- 230000008676 import Effects 0.000 description 1
- 230000000977 initiatory effect Effects 0.000 description 1
- 238000007733 ion plating Methods 0.000 description 1
- 229910052745 lead Inorganic materials 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- KDLHZDBZIXYQEI-UHFFFAOYSA-N palladium Substances [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 1
- 150000003057 platinum Chemical class 0.000 description 1
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
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- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Abstract
Disclosed is a ceramic substrate with a Pb-free solder layer which has a melting point and bonding strength equivalent to those of Sn-Pb eutectic solders which includes Pb and thus involve environmental problems. A substrate for device bonding is composed of a substrate having an electrode layer and a solder layer formed on the electrode layer. The solder layer is a Pb-free solder layer which comprises (1) a base metal composed of (i) Sn, (ii) Sn and Au, or (iii) In, (2) at least one metal selected from the group consisting of Bi, In (only in cases where the base metal is Sn, or Sn and Au), Zn, Au (only in cases where the base metal is In) and Sb, and (3) at least one metal selected from the group consisting of Ag, Ni, Fe, Al, Cu and Pt. The solder layer has a thickness of 1-15 mum and a surface roughness (Ra) of not more than 0.11 mum.
Description
Technical field
The present invention relates to be used to engage substrate for bonding element, element with retaining element and be engaged in element bonded substrate and manufacture method thereof on this substrate.
Background technology
Along with popularizing of mobile phone or optical communication etc., based on the so less reason of the dielectric loss of high frequency, as the GaAs that exports high power consumption at the height of high band operation is that FET, Si-Ge are that HBT, Si are that MOSFET or GaN are semiconductor element mounting substrates such as laser diode, has used ceramic substrate.In the ceramic substrate, because the aluminum nitride sintered product substrate possesses pyroconductivity height, the thermal coefficient of expansion excellent characteristic near semiconductor element, so receive publicity especially.
Usually, on ceramic substrates such as aluminum nitride sintered product during joint element, after generally being formed on the 1st and the 2nd substrate metal layer that engages securely on the ceramic substrate, on this substrate metal layer, form electrode layer, again at this electrode layer soldered elements by noble metals such as gold by metal-plated.Consider from the efficient aspect,, in most cases adopt the Reflow Soldering connection, therefore, must on the electrode layer of substrate, be formed for the soldering-tin layer of the special pattern of joint element in advance as the welding method of this element.
Highly integrated along with in recent years semiconductor device, the soldering-tin layer that forms on the substrate of above-mentioned Reflow Soldering connection with substrate also must adopt thin film technique to form in tiny area with high accuracy, and this soldering-tin layer generally is welded to form successively the various metal film layers of lamination and forms according to desirable when fusion.Below, this soldering-tin layer being called " film lamination soldering-tin layer ", the ceramic substrate that will form this film lamination soldering-tin layer on electrode layer is called " ceramic substrate of band film lamination soldering-tin layer ".
As the soldering-tin layer in the ceramic substrate of this band film lamination soldering-tin layer, known having formed the film lamination soldering-tin layer of Au-Sn system substrate (with reference to patent documentation 1), supply with (with reference to patent documentations 2) such as substrates that fusing point is the film lamination soldering-tin layer of 183 ℃ Sn-37 weight %Pb SnPb63 or the scolding tin that has wherein added micro-dissimilar metal (below be generically and collectively referred to as the Sn-Pb SnPb63) when having formed fusion.Above-mentioned Sn-Pb SnPb63 is the most universal as used in electronic industry scolding tin, even utilize the film lamination soldering-tin layer (for example, Pb layer shown in Figure 12 and Sn layer replace lamination soldering-tin layer) also can high bond strength joint element.
On the other hand, Qian harmfulness becomes hidden danger in recent years, and hope can be used the so-called Pb-free solder that does not contain lead composition.Consider from the viewpoint that the substitute that becomes the Sn-Pb SnPb63 is such, wish that Pb-free solder possesses the fusing point equal with this scolding tin, as this Pb-free solder, the known Sn-Zn-In that has is that scolding tin (with reference to patent documentation 3) and Sn-Ag-Bi are scolding tin (with reference to patent documentation 4).But these scolding tin are the alloy scolding tin that gets according to the composition modulation of predesignating, the example of unknown above-mentioned film lamination soldering-tin layer.In this specification, for convenience's sake, the soldering-tin layer that will form according to the alloy scolding tin of the composition modulation of predesignating is called " alloy soldering-tin layer ", to be different from aforementioned film lamination soldering-tin layer.
Patent documentation 1: the Japan Patent spy opens the 2002-373960 communique
Patent documentation 2: Japanese patent laid-open 5-186884 communique
Patent documentation 3: Japanese patent laid-open 7-155984 communique
Patent documentation 4: the Japan Patent spy opens the 2003-200288 communique
The announcement of invention
Make the ceramic substrate of band film lamination soldering-tin layer also realize to be the important techniques problem, to supply with of the progress of the film lamination soldering-tin layer of Sn-Pb SnPb63 when wishing to realize unleaded to unleaded film lamination soldering-tin layer from fusion.
But, because film lamination soldering-tin layer is formed at the whole scolding tin of regulation of realizing of molten condition lower floor, different with the situation of alloy soldering-tin layer, its performance is subjected to the influence (this point can be clear and definite from the contrast of embodiment described later and comparative example) of layer structure to a great extent.For example, even the alloy soldering-tin layer can obtain high bond strength, in most of the cases just can't obtain enough bond strengths but supply with the film lamination soldering-tin layer that forms with same composition of this alloy soldering-tin layer during by fusion.In addition, technology at the ceramic substrate joint element with Sn-Pb eutectic film lamination soldering-tin layer is existing ripe, by Sn-Pb eutectic film lamination soldering-tin layer when unleaded film lamination soldering-tin layer transforms, equal bond strength in the time of can having obtained and use Sn-Pb eutectic film lamination soldering-tin layer except certain hope, but also wish without technologic bigger variation.In addition,, must make the fusing point of used unleaded film lamination soldering-tin layer reach 170～230 ℃, be preferably 180～200 ℃ in order to satisfy above-mentioned requirements.
The purpose of this invention is to provide substrate for bonding element with the unleaded film lamination soldering-tin layer that satisfies this requirement.
The present inventor has carried out conscientiously research for solving above-mentioned problem.Consequently, passing at the Sn that contains Au is to add metals such as Bi or In in the Pb-free solder such as scolding tin, can make this scolding tin possess technical essential with the almost equal fusing point of Sn-Pb SnPb63.But the also clear and definite low problem of bond strength that on having added the film lamination soldering-tin layer of these metals, exists during soldered elements.Then, for addressing this problem and further studying, found that sometimes and can obtain high bond strength by adding special metals such as Ag, bond strength is subjected to the influence of the surface roughness on film lamination soldering-tin layer surface to a great extent, this surface roughness can obtain high bond strength during less than particular value, simultaneously successfully find stable formation surface roughness to satisfy the method for the soldering-tin layer of this condition, thereby finished the present invention.
That is, technology contents of the present invention is as described below.
[1] substrate for bonding element, this substrate is made of substrate that possesses electrode layer and the soldering-tin layer that is formed on this electrode layer, this soldering-tin layer is to comprise (1) (i) Sn, (ii) Sn and Au or the (iii) base metal (base metal) of In formation, (2) be selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, at least a kind of metal of Au when being In (be limited to base metal) and Sb, (3) be selected from Ag, Ni, Fe, Al, at least a kind of metal of Cu and Pt and the lead-free soldering tin layer that forms, the thickness of this soldering-tin layer is 1～15 μ m, and surface roughness (Ra) is below 0.11 μ m.
[2] substrate for bonding element of [1] record, aforementioned soldering-tin layer comprises (1) by (i) Sn, (ii) Sn and Au or the (iii) metal underlying layer that constitutes of In, (2) eutectic more than 1 layer that is formed by at least a kind of metal that is selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, Au when being In (be limited to base metal) and Sb is revealed metal level, the surface smoothing metal level more than 1 layer that (3) are formed by the a kind of metal that is selected from Ag, Ni, Fe, Al, Cu and Pt at least; Described each eutectic is revealed metal level and described arbitrary surface smoothing metal level adjacency.
[3] manufacture method of substrate for bonding element, it is to be included in that to form thickness on this electrode layer of the substrate that possesses electrode layer be 1～15 μ m, the manufacture method of the substrate for bonding element of [1] or [2] record of the soldering-tin layer formation operation of the lead-free soldering tin layer of surface roughness (Ra) below 0.11 μ m, described lead-free soldering tin layer comprises (1) (i) Sn, (ii) Sn and Au or the (iii) base metal of In formation, (2) be selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, at least a kind of metal of Au when being In (be limited to base metal) and Sb, (3) are selected from Ag, Ni, Fe, Al, at least a kind of metal of Cu and Pt and forming; This soldering-tin layer forms operation and comprises following each operation that is more than 1 time, promptly, by the cambial operation of aforementioned base metal, form the operation that eutectic is revealed metal level by being selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, Au when being In (be limited to base metal) and at least a kind of metal of Sb, form the operation of surface smoothing metal level at least by the a kind of metal that is selected from Ag, Ni, Fe, Al, Cu and Pt; Be right after described formation eutectic reveal the operation of metal level before and/or carry out arbitrary described surface smoothing metal level afterwards and form operation.
[4] manufacture method of substrate for bonding element, it is to be included on this electrode layer of the substrate that possesses electrode layer the knitting layer that forms knitting layer by transition metal to form operation, and formation thickness is 1～15 μ m on this knitting layer, the manufacture method of the substrate for bonding element of [1] or [2] record of the soldering-tin layer formation operation of the lead-free soldering tin layer of surface roughness (Ra) below 0.11 μ m, described lead-free soldering tin layer comprises (1) (i) Sn, (ii) Sn and Au or the (iii) base metal of In formation, (2) be selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, at least a kind of metal of Au when being In (be limited to base metal) and Sb, (3) are selected from Ag, Ni, Fe, Al, at least a kind of metal of Cu and Pt and forming; This soldering-tin layer forms operation and comprises following each operation that is more than 1 time, promptly, by the cambial operation of aforementioned base metal, form the operation that eutectic is revealed metal level by being selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, Au when being In (be limited to base metal) and at least a kind of metal of Sb, form the operation of surface smoothing metal level at least by the a kind of metal that is selected from Ag, Ni, Fe, Al, Cu and Pt; Be right after described formation eutectic reveal the operation of metal level before and/or carry out arbitrary described surface smoothing metal level afterwards and form operation.
[5] manufacture method of element bonded substrate is carried out reflow soldering after the element that mounting on the soldering-tin layer of substrate for bonding element of [1] or [2] record has an electrode makes this electrode and aforementioned soldering-tin layer contacts.
[6] the element bonded substrate of making by the method for [5] record.
Substrate for bonding element of the present invention can be realized the joint of semiconductor element under the prerequisite of not using the Sn-Pb SnPb63 that has harmfulness hidden danger.In addition, be used for substrate for bonding element of the present invention scolding tin fusing point since with the Sn-Pb SnPb63 much at one, so need not just can use to the big change of reflow soldering operation do of employed Sn-Pb SnPb63 in the past, can be at low temperatures with high bond strength welding semiconductor element.Particularly as substrate used the surface be formed with electrode layer with the substrate for bonding element of aluminium nitride as the ceramic substrate of principal component, except having above-mentioned characteristic, it is few and can discharge the such characteristic of good exothermic character of the heat that produces when using also to possess the dielectric loss of high frequency, so be very desirable substrate for bonding element.
In addition, utilize manufacture method of the present invention can make above-mentioned desirable substrate for bonding element effectively.
The best mode that carries out an invention
Substrate for bonding element of the present invention is by the substrate that possesses electrode layer and is formed at the substrate for bonding element that the soldering-tin layer on this electrode layer constitutes, this soldering-tin layer is to comprise (1) (i) Sn, (ii) Sn and Au or the (iii) base metal of In formation, (2) be selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, at least a kind of metal of Au when being In (be limited to base metal) and Sb, (3) be selected from Ag, Ni, Fe, Al, at least a kind of metal of Cu and Pt and the lead-free soldering tin layer that forms, the thickness of this soldering-tin layer is 1～15 μ m, and surface roughness (Ra) is below 0.11 μ m.
" substrate with electrode layer " of the present invention is so long as got final product by the substrate that noble metal has formed the electrode layer that plays the electrode effect in its surperficial part or whole surface, it is not particularly limited, but the angle that the high-frequency dielectric loss when using behind the bond semiconductor element is few is considered, preferably adopt on ceramic substrates such as aluminium nitride, aluminium oxide, SiC or Si substrate, particularly surface roughness Ra below the 0.05 μ m, Rmax formed the metal-plated substrate of noble metal electrode layer by metal-plated on the ceramic substrate below the 0.2 μ m.Noble metal as constituting electrode layer can exemplify Au, Ag, Pd, Pt etc., preferably uses the extremely low Au of conducting resistance.
As previously mentioned, noble metal electrode layer in these metal-plated substrates generally forms on the substrate metal layer that is engaged in ceramic substrate securely directly or indirectly, for example, in the aluminum oxide substrate, the electrode pattern that can adopt on the aluminium oxide raw cook printing to form by the pastel of refractory metals such as tungsten or molybdenum, behind this figure of sintering and the blank, on high melting point metal layer, form nickel dam as required at the same time, formed the golden substrate that waits the noble metal electrode layer more thereon.In addition, with the aluminium nitride is in the ceramic substrate of principal component, can use (i) in aluminium nitride powder, to add sintering aid, be shaped the back through the surface shape basic by formation such as sputtering methods and electrode pattern of the substrate of oversintering identical be the metal level (first basalis) of principal component with the titanium, utilizing sputtering method etc. to form with platinum on this first basalis then equally is the layer of principal component, with this metal-plated substrate as electrode layer; Be second basalis (ii) with this platinum layer, the metal-plated substrate that obtains by electrode layers such as formation gold such as sputtering methods thereon again.In the substrate for bonding element of the present invention, the good aspect of the exothermic character of the heat that produces when using after discharging joint element considers, special good to be to use by above-mentioned (i) or the aluminium nitride that (ii) obtains be the metal-plated substrate.
The thickness of the soldering-tin layer among the present invention is 1～15 μ m, considers from the delicate joint and the bond strength of element, is preferably 2～8 μ m.The thickness of soldering-tin layer is during less than 1 μ m, sometimes can't obtain enough bond strengths, if surpass 15 μ m, then soldering tin amount is too much, so after engaging the side of scolding tin covering element or the unfavorable condition of upper surface (also becoming light-emitting area in the semiconductor element) take place sometimes.
The surface roughness of the soldering-tin layer among the present invention (Ra) better is below 0.06 μ m below 0.11 μ m, and the spy is well below 0.05 μ m.The surface roughness of this soldering-tin layer (Ra) then can obtain high bond strength when soldered elements in above-mentioned scope, if surpass 0.11 μ m, then can't obtain high bond strength sometimes.In addition, bond strength except Ra is in above-mentioned scope, is preferably Rmax to the surface configuration sensitivity of soldering-tin layer below 0.90 μ m, is more preferably below 0.55 μ m.
Here, surface roughness (Ra) is that the median plane with measurement range is the arithmetic mean of the concave-convex surface of benchmark, is one of parameter that the concavo-convex shape and the magnitude numerical valueization on surface are represented.Rmax is the highest order point on surface and the difference in height in minimum site.
Among the present invention, carry out the mensuration of surface roughness (Ra) and Rmax with AFM (atomic force microscope).AFM can measure the surperficial fine shape of sample according to the resolution of atomic level ( level) three-dimensionally, carries out image processing by the three-D profile with gained, can know correct surface roughness (Ra) and Rmax.
Base metal is the most basic metal that forms scolding tin, is basic fusing point of decision and the composition that basic bond strength is manifested.As base metal, can use (i) Sn, (ii) Sn and Au or (iii) In, based on the high reason of reliability after engaging, preferably use (i) Sn or (ii) Sn and Au.
The content of the base metal in the aforementioned soldering-tin layer is that benchmark is 10～95 weight % with the total weight of soldering-tin layer, particularly preferably 34～90 weight %.Both the proportional total weight with base metal that contains when using (ii) Sn and Au as base metal is benchmark, better be that Sn is 80～99 weight %, Au is 1～20 weight %, particularly considers from bond strength, best is that Sn is 87～97 weight %, and Au is 3～13 weight %.
Eutectic is revealed the function that metal has the fusing point decline that makes soldering-tin layer.It is at least a kind of metal that is selected from Bi, In, Zn, Au and Sb that eutectic is revealed metal.But, reveal metal when using the situation of In to only limit to base metal as Sn or Sn and Au as eutectic.Based on all high reason of fusing point decline effect, reveal metal as eutectic and be preferably Bi for all base metals.In addition, when base metal is Sn or Sn and Au, except that Bi, preferably use In based on same reason.In not only possesses eutectic and reveals effect, and because itself is soft, so possess the high advantage of buffering effect when engaging.
Consider that from the angle of the fusing point of soldering-tin layer and bonding strength the content that eutectic is revealed metal is that benchmark is 0.1～30 weight % with the total weight of soldering-tin layer, particularly preferably 3～16 weight %.Eutectic is revealed the content of metal in above-mentioned scope, can make the fusing point of soldering-tin layer reach 170～230 ℃, more preferably 180～200 ℃.If it is less that eutectic is revealed the content of metal, then the fusing point of soldering-tin layer has the tendency of rising, if be lower than above-mentioned scope, then the situation of the fusing point of soldering-tin layer above 230 ℃ takes place often.
The surface smoothing metal has the function of the surface smoothingization that makes soldering-tin layer.Because surface smoothingization is effective and have the effect that fusing point is descended, so can use Ag as the surface smoothing metal.
Consider that from its smoothing effect the content of surface smoothing metal is that benchmark is 4.9～60 weight % with the total weight of soldering-tin layer, particularly preferably 7～50 weight %.
If with the total weight of soldering-tin layer be benchmark less than 20 weight %, be more preferably less than 10 weight %, then can contain compositions such as Ga, Pd, P, Mn, Cr, Ti, terres rares as required in this soldering-tin layer.
Substrate for bonding element of the present invention with soldering-tin layer of above-mentioned characteristic can carry out the element welding of high bond strength in 170～230 ℃ temperature range, need not that Sn-Pb SnPb63 is in the past done big change with the reflow soldering operation can use.
The form that exists to the contained above-mentioned various compositions of the soldering-tin layer among the present invention is not particularly limited.That is, this soldering-tin layer for example can be aforesaid film lamination soldering-tin layer, also can be the alloy soldering-tin layer, but because film lamination soldering-tin layer is the soldering-tin layer that can form Micropicture with high accuracy, so more satisfactory.The method that forms film lamination soldering-tin layer is not particularly limited, for example can adopts sputtering method, ion plating method, vapour deposition method, CVD method, galvanoplastic.
When the soldering-tin layer among the present invention is film lamination soldering-tin layer, be preferably this soldering-tin layer and comprise (1) by (i) Sn, (ii) Sn and Au or the (iii) metal underlying layer that constitutes of In, (2) eutectic more than 1 layer that is formed by at least a kind of metal that is selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, Au when being In (be limited to base metal) and Sb is revealed metal level, the surface smoothing metal level more than 1 layer that (3) are formed by the a kind of metal that is selected from Ag, Ni, Fe, Al, Cu and Pt at least; Described each eutectic is revealed metal level and described arbitrary surface smoothing metal level adjacency.When aforementioned metal underlying layer was formed by Sn and Au, this metal underlying layer can be simultaneously evaporation Sn and Au and single layer structure that the homogeneous that forms is formed, also can be to comprise the Sn layer more than 1 or 2 layer and the sandwich construction of the Au layer more than 1 or 2 layer.In addition, any composition such as aforementioned Ga, Pd, P, Mn, Cr, Ti, terres rares can import when forming metal underlying layer.
Reveal the layer structure of metal level and surface smoothing metal level adjacency as eutectic, can exemplify eutectic and reveal the layer structure that has the surface smoothing metal level on the metal level, the surface smoothing metal level is present in eutectic and reveals layer structure under the metal level, and these 3 kinds on the layer structure that all has the surface smoothing metal level up and down of revealing metal level at eutectic.
Eutectic is revealed in the layer structure that has the surface smoothing metal level on the metal level, and when film lamination soldering-tin layer formed, the layer (lead-free soldering tin layer) beyond film smoothing metal level was gone up the formation eutectic and revealed metal level.Aggegation appears in the part that the eutectic that form this moment is revealed metal level, do not form neat pantostrat, it is coarse that the surface becomes, but when forming the surface smoothing metal level thereon, may be because eutectic is revealed the synergistic cause of metal and surface smoothing metal, coarse being repaired on surface forms level and smooth surface.
The surface smoothing metal level is present in eutectic reveals in the layer structure under the metal level, and when film lamination soldering-tin layer formed, eutectic was revealed metal level and is formed on the film smoothing metal level.The eutectic that forms is revealed metal level aggegation can be taken place, but forms level and smooth pantostrat.
Reveal in the layer structure that all has the surface smoothing metal level up and down of metal level at eutectic, when film lamination soldering-tin layer formed, the most difficult initiation eutectic was revealed the aggegation of metal, and eutectic is revealed metal level and formed the high pantostrat of flatness.
As mentioned above, if contained eutectic is revealed metal level and surface smoothing metal level adjacency in the soldering-tin layer, then eutectic is revealed the pantostrat that metal level becomes surface smoothing, even perhaps temporarily taking place, aggegation forms discontinuous layer, as long as the surface smoothing metal level of lamination just can obtain repairing but utilize thereon, obtain level and smooth surface.Therefore, the final soldering-tin layer that obtains is the higher layer of surface smoothing, can bring into play strong cohesiveness when element engages and make a concerted effort.Wherein, owing to the layer structure that all has the surface smoothing metal level up and down of revealing metal level at eutectic can form the soldering-tin layer that flatness is the highest, engaging force is maximum, so desirable especially.
On the other hand, eutectic reveal metal level not with any surface smoothing metal level in abutting connection with the time, because this eutectic is revealed metal level and when film lamination soldering-tin layer forms aggegation can be taken place, can not be repaired yet, so the surface smoothing decline of the final soldering-tin layer that obtains, element engage the method that cuts in and out and obtain strong cohesiveness with joint efforts.Consequently, can not carry out welding in 170～230 ℃ the temperature range with high bond strength sometimes.
In the substrate for bonding element of the present invention, between substrate with electrode layer and soldering-tin layer, can exist from this electrode layer side begin to be followed successively by by the noble metal beyond the noble metal that constitutes this electrode layer forms layer (for example, Pt) and the knitting layer that forms by transition metal (for example, Ti).
Below, the better execution mode to soldering-tin layer with above-mentioned specific layer structure is specifically described with reference to the accompanying drawings.
For example, be preferably surface smoothing metal level 500 shown in Figure 1, gold content as metal underlying layer is gold-ashbury metal (also can abbreviate Au10-Sn as) layer 501 of 10 weight %, the eutectic of Bi etc. is revealed metal level 502, surface smoothing metal level 503 and Au10-Sn layer 504 be the structure of lamination successively, surface smoothing metal level 500 shown in Figure 2, eutectic is revealed metal level 511, surface smoothing metal level 512 and Au10-Sn layer 513 be the structure of lamination successively, surface smoothing metal level 500 perhaps shown in Figure 3, eutectic is revealed metal level 521 and Au10-Sn layer 522 structure of lamination successively.
In these forms, each layer thickness can be considered the whole suitably decision of forming, and in the form shown in Figure 1, better is that to be positioned at Au10-Sn layer 501 near substrate-side be away from 1/32～1/2 of the thickness of the Au10-Sn layer 504 of substrate-side.
Consider that from cost behavior the thickness that is positioned at undermost surface smoothing metal level 500 in the soldering-tin layer is generally 0.1～5 μ m, particularly preferably 0.2～3 μ m.If the thickness of this layer is less than 0.1 μ m, then the surface smoothing effect is low, if more than 5 μ m, does not then almost have difference when this effect and 0.2～3 μ m.This surface smoothing metal level is preferably formed by Ag.
Manufacture method to substrate for bonding element of the present invention is not particularly limited, for example after having formed the soldering-tin layer of above-mentioned composition on this electrode layer of the substrate with electrode layer, can make its thickness and surface roughness all satisfy aforementioned condition by grinding the soldering-tin layer surface, but consider from can easily and obtaining substrate for bonding element, preferably adopt following method (manufacture method of the present invention) with high raw material availability and good reproducibility.Promptly, employing is included in and forms thickness on this electrode layer of the substrate that possesses electrode layer is 1～15 μ m, the soldering-tin layer of the lead-free soldering tin layer of surface roughness (Ra) below 0.11 μ m forms the manufacture method of the substrate for bonding element of operation, described lead-free soldering tin layer comprises (1) (i) Sn, (ii) Sn and Au or the (iii) base metal of In formation, (2) be selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, at least a kind of metal of Au when being In (be limited to base metal) and Sb, (3) are selected from Ag, Ni, Fe, Al, at least a kind of metal of Cu and Pt and forming; This soldering-tin layer forms operation and comprises following each operation that is more than 1 time, promptly, by the cambial operation of aforementioned base metal, form the operation that eutectic is revealed metal level by being selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, Au when being In (be limited to base metal) and at least a kind of metal of Sb, form the operation of surface smoothing metal level at least by the a kind of metal that is selected from Ag, Ni, Fe, Al, Cu and Pt; Be right after described formation eutectic reveal the operation of metal level before and/or carry out arbitrary described surface smoothing metal level afterwards and form operation.
In addition, in the aforementioned manufacture method, also can directly on this electrode layer of the substrate with electrode layer, not form this soldering-tin layer, but on this electrode layer of the substrate with electrode layer, form knitting layer, on this knitting layer, form this soldering-tin layer again by transition metal.
Method to elements such as bond semiconductor elements on substrate for bonding element of the present invention is not particularly limited, can adopt any known welding method, but consider based on carrying out the angle that high accuracy engages effectively, be preferably in and carry out reflow soldering again after element that mounting on the soldering-tin layer of substrate for bonding element of the present invention has electrode makes this electrode and aforementioned soldering-tin layer contacts.In addition, reflow soldering is meant in advance on the regulation terminal pad of substrate or components and parts electrode or both supply with scolding tin simultaneously, components and parts are fixed on the substrate behind the assigned position, fusion scolding tin (it is flowed) and carry out the method for the joint of components and parts and substrate.In the said method, be not particularly limited, can adopt the method for utilizing the backflow conveyer belt, the method for using hot plate, gas phase circumfluence method etc. making the method that scolding tin flows.In addition, can suitably determine heating-up temperature and heating time according to the kind of scolding tin, but when having used substrate for bonding element of the present invention, can with much at one temperature when having the ceramic substrate joint element of Sn-Pb eutectic film laminated structure scolding tin figure, specifically be 170～230 ℃, be preferably 180～200 ℃ and carry out good welding.
" element " of welding adopts by welding the element with electrode of formation such as pieceable metal.Specifically, can exemplify electronic devices and components and semiconductor elements such as the resistance with electrode that can directly be connected or capacitor with other electric wiring.Great majority in the element of using always in the semiconductor applications are elements that above-mentioned electrode is made of gold, but are not limited in this.
In addition, when the orlop in the soldering-tin layer was the surface smoothing metal level, in the said elements joint method, during the heating and melting soldering-tin layer, this surface smoothing metal level fully diffused into the soldering-tin layer of fusion.At this moment, not necessarily all surface smoothing metals that constitute this surface smoothing metal level all spread, and nearby have the surface smoothing metal residual with stratiform in the bottom surface of this smoothing metal level sometimes.
Embodiment
Below, the present invention will be described in more detail to exemplify embodiment and comparative example, but the present invention is not limited in these embodiment.
Embodiment 1
The substrate for bonding element of structure shown in Figure 1 is made according to following steps.Fig. 1 is the sectional view of representative substrate for bonding element of the present invention 101, have on the aluminum nitride sintered product substrate 201 successively lamination be the 1st basalis 202 of principal component with Ti, with platinum be on the gold electrode layer of the 2nd basalis 203 of principal component and the substrate 200 that gold electrode layer 204 forms lamination the structure of soldering-tin layer 509; It is that close binder 401 and an Ag layer 500, an Au10-Sn layer 501, Bi layer 502, the 2nd Ag layer 503 and the 2nd Au10-Sn layer 504 of principal component forms that described soldering-tin layer 509 flows out with Pt layer 301, with Ti by the anti-scolding tin of lamination successively.
At first, adopt sputter equipment to pass through sputtering method, at aluminum nitride sintered product substrate { 50.8mm * 50.8mm * 0.3mmt, surface roughness Ra=0.02 μ m, Rmax=0.179 μ m, (strain) ト Network ヤ マ system } the surface form thick 0.06 μ m successively with Ti be the 1st basalis of principal component, thick 0.2 μ m be the 2nd basalis of principal component and the gold electrode layer of thick 0.6 μ m with platinum.Then, adopt photoetching process to form to prevent that scolding tin from flowing out uses figure, adopt sputtering method to form the Pt film of 0.25 μ m again.Then, adopt photoetching process to form the scolding tin figure, utilize vacuum deposition apparatus to prevent that scolding tin from flowing out on the Pt of usefulness and form the close binder Ti of thick 0.06 μ m and the Ag layer of 1.5 μ m above-mentioned, then, binary by having used Au and Sn as target is vapour deposition method simultaneously, is formed the Au-Sn layer of thick 1.0 μ m by the Au-Sn alloy of gold content 10 weight % { 217 ℃ of fusing points and Young's modulus 45.0GPa (25 ℃ time) }.Then, form the Bi layer of 0.33 μ m, the Ag layer of 0.2 μ m, by having used the binary while vapour deposition method of Au and Sn, the gold content that forms thick 2.47 μ m is the Au-Sn layer of 10 weight %, makes substrate for bonding element of the present invention (No.1) at last.
Surface roughness to the soldering-tin layer of the above substrate for bonding element that makes is measured, and records Ra=0.058 μ m, Rmax=0.689 μ m.The mensuration of surface roughness adopts Digital Instruments corporate system Contact AFM NanoScopeIII to carry out according to following steps.Promptly, the opposition side that forms face at the soldering-tin layer of substrate for bonding element of the present invention sticks two-sided tape, after being fixed in the steel plectane of diameter 12mm φ, utilize magnetic means that this plectane is fixed in the top of piezoelectric scanning instrument (piezoscanner), the cantilever of band probe is contacted with soldering-tin layer is surperficial.The direct sensitive surface of cantilever concavo-convex and displacement, its displacement is measured by " optical lever mode ".Adopt the Si of V-shape
3N
4X system and coefficient of elasticity are that 0.12N/m, probe height are that 3 μ m, radius of curvature are that 5～40nm, 1/2 cone angle are the cantilever that 35 ° front end is shaped as quadrangular pyramid shape.Install before measuring and remove electric air blast, reduce influence as far as possible because of the generation of static electricity of substrate surface.In addition, measurement range is that 20 μ m are square, and measuring visual field number is 3 visuals field of per 1 piece element substrate for bonding.After the mensuration, utilize the software of NanoScopeIII, the three-D profile that records is carried out image processing, calculate Ra, Rmax, calculate the mean value in 3 visuals field.In addition, the Ra among the present invention is that the median plane with measurement range is the mean value on the surface of benchmark, utilizes formula (1) to calculate.Rmax is the highest order point on surface and the difference in height in minimum site.
Ra＝F(1，L
XL
Y)I(0，L
Y，I(0，L
X|f(x，y)|dx)dy) (1)
(x, y) expression is the surface of benchmark with the median plane to f, L
X, L
YThe size of presentation surface.
Then, mounting has the Ga-As system semiconductor element of Au electrode on the soldering-tin layer of the above substrate for bonding element that makes, and adopts chip bonding to be installed on 220 ℃ of joints that carry out 180 seconds, makes the element bonded substrate.Similarly make 10 piece element bonded substrates, utilize ダ ィ シ ェ ア テ ス (IMADA corporate system) to measure bond strength, average splice intensity is 3.1kgf/mm
2, the form of peeling off all is in the semiconductor element.The fusing point of the soldering-tin layer in present embodiment and the comparative example adopts the system TG/DTA of Seiko instrument Co., Ltd. device SSC5200 to measure definite by DTA.
In addition, Bi layer, gold content are the Au-Sn layer (Au10-Sn layer) of 10 weight %, the thickness variation as shown in table 1 of Ag layer, make substrate for bonding element No.2 of the present invention～8, similarly carry out the mensuration of surface roughness and bond strength.Its result is shown in table 1 in the lump.
The form of peeling off is peeled off for " semiconductor element in " is meant because of the destruction of semiconductor element, and " in the soldering-tin layer " is meant because of the destruction of soldering-tin layer and peels off.The destruction of semiconductor element is at 2.5kgf/mm
2More than take place.Consider from the reliability aspect that generally when peeling off form for " in the soldering-tin layer ", average splice intensity is preferably in 2.0kgf/mm
2More than.In addition, peel off when between semiconductor element-scolding tin, taking place, we can say the poor reliability of joint.In addition, in the composition of the soldering-tin layer of table 1, because the composition beyond Au, Bi and the Ag is Sn, so omitted the weight % of Sn.
Table 1
| No. | The thickness (μ m) of the one Ag layer (surface smoothing metal level) | The thickness of the one Au 10-Sn layer (μ m) | The thickness of (eutectic is revealed metal level) of Bi layer (μ m) | The thickness (μ m) of the 2nd Ag layer (surface smoothing metal level) | The thickness of the 2nd Au 10-Sn layer (μ m) | The composition of soldering-tin layer (composition beyond following is Sn) | The fusing point of soldering-tin layer (℃) | Average splice intensity (kgf/mm 2) (n＝10) | The main form of peeling off | Ra (μm) | Rmax (μm) | |||
| Au (wt％) | Bi (wt％) | Ag (wt％) | ||||||||||||
| Embodiment 1 | 1 | 1.5 | 1 | 0.33 | 0.2 | 2.47 | 5.61 | 6.71 | 37.13 | 180 | 3.1 | In the semiconductor element | 0.058 | 0.689 |
| 2 | 1.5 | 1 | 0.164 | 0.2 | 2.636 | 5.92 | 3.36 | 37.39 | 186 | 2.9 | In the semiconductor element | 0.055 | 0.659 | |
| 3 | 1.5 | 1 | 0.501 | 0.2 | 2.299 | 5.30 | 10.13 | 36.87 | 175 | 2.7 | In the semiconductor element | 0.053 | 0.743 | |
| 4 | 1.5 | 1 | 0.675 | 0.2 | 2.125 | 4.98 | 13.55 | 36.60 | 168 | 3.3 | In the semiconductor element | 0.058 | 0.721 | |
| 5 | 1.5 | 0.077 | 0.33 | 0.2 | 2.393 | 5.61 | 6.71 | 37.13 | 180 | 2.8 | In the semiconductor element | 0.056 | 0.681 | |
| 6 | 1.5 | 1.235 | 0.33 | 0.2 | 1.235 | 5.61 | 6.71 | 37.13 | 180 | 2.2 | In the soldering-tin layer | 0.057 | 0.711 | |
| 7 | 1.5 | 1 | 0.348 | 0.81 | 1.842 | 4.44 | 6.85 | 48.73 | 182 | 2.1 | In the soldering-tin layer | 0.061 | 0.744 | |
| 8 | 0.2 | 1 | 0.33 | 0.2 | 2.47 | 7.39 | 9.38 | 12.20 | 181 | 3.2 | In the semiconductor element | 0.052 | 0.672 | |
| Embodiment 2 | 9 | 1.5 | 3.47 | 0.33 | 0.2 | - | 5.61 | 6.71 | 37.13 | 180 | 3.1 | In the semiconductor element | 0.044 | 0.390 |
| 10 | 1.5 | 3.636 | 0.164 | 0.2 | - | 5.92 | 3.36 | 37.39 | 186 | 2.8 | In the semiconductor element | 0.047 | 0.516 | |
| 11 | 1.5 | 3.299 | 0.501 | 0.2 | - | 5.30 | 10.13 | 36.87 | 175 | 2.9 | In the semiconductor element | 0.041 | 0.418 | |
| 12 | 1.5 | 3.125 | 0.675 | 0.2 | - | 4.98 | 13.55 | 36.60 | 168 | 3 | In the semiconductor element | 0.039 | 0.466 | |
| 13 | 1.5 | 3.13 | 0.34 | 0.4 | - | 5.11 | 6.99 | 41.89 | 179 | 3.7 | In the semiconductor element | 0.048 | 0.432 | |
| 14 | 1.5 | 2.842 | 0.348 | 0.81 | - | 4.44 | 6.85 | 48.73 | 185 | 2.3 | In the soldering-tin layer | 0.033 | 0.364 | |
| 15 | 0.2 | 3.47 | 0.33 | 0.2 | - | 7.39 | 9.38 | 12.20 | 179 | 3.4 | In the semiconductor element | 0.044 | 0.452 | |
| Embodiment 3 | 16 | 1.5 | 3.67 | 0.33 | - | - | 6.00 | 6.80 | 33.14 | 185 | 3.2 | In the semiconductor element | 0.101 | 0.807 |
| 17 | 1.5 | 3.836 | 0.164 | - | - | 6.32 | 3.40 | 33.37 | 193 | 2.8 | In the semiconductor element | 0.106 | 0.898 | |
| 18 | 1.5 | 3.508 | 0.492 | - | - | 5.70 | 10.06 | 32.91 | 182 | 3 | In the semiconductor element | 0.104 | 0.902 | |
| 19 | 1.5 | 3.336 | 0.664 | - | - | 5.38 | 13.48 | 32.68 | 176 | 2.9 | In the semiconductor element | 0.107 | 0.986 | |
| Comparative example 1 | 20 | 1.5 | 1.735 | 0.33 | 0.2 | 1.735 | 5.61 | 6.71 | 37.13 | 185 | 0.7 | Between semiconductor element-soldering-tin layer | 0.120 | 1.060 |
Embodiment 2
The structure of soldering-tin layer as Fig. 2 510 shown in, except on the Ag layer 500 of thick 1.5 μ m successively lamination the structure of an Au10-Sn layer 513 of the 2nd Ag layer 512 of the Bi layer 511 of thick 0.33 μ m, thick 0.2 μ m and thick 3.47 μ m, other similarly to Example 1, make substrate for bonding element, junction temperature makes element bonded substrate (No.9) similarly to Example 1.Similarly make 10 piece element bonded substrates, measured surface roughness and bond strength similarly to Example 1, Ra=0.044 μ m, Rmax=0.390 μ m, average splice intensity is 3.1kgf/mm
2, the main form of peeling off is in the semiconductor element.In addition, substrate for bonding element No.10 of the present invention～15 are made in the thickness variation as shown in table 1 of Bi layer, Au10-Sn layer, Ag layer, have similarly carried out the mensuration of bond strength.Its result is shown in table 1 in the lump.
Embodiment 3
The structure of soldering-tin layer as Fig. 3 520 shown in, except on the Ag layer 500 of thick 1.5 μ m successively lamination the structure of an Au10-Sn layer 522 of the Bi layer 521 of thick 0.33 μ m and thick 3.67 μ m, other makes element bonded substrate (No.16) similarly to Example 1.Similarly make 10 piece element bonded substrates, measured surface roughness and bond strength similarly to Example 1, Ra=0.101 μ m, Rmax=0.807 μ m, average splice intensity is 3.2kgf/mm
2, the main form of peeling off is in the semiconductor element.In addition, substrate for bonding element No.17 of the present invention～19 are made in the thickness variation as shown in table 1 of Bi layer, Au10-Sn layer, have similarly carried out the mensuration of bond strength.Its result is shown in table 1 in the lump.
Embodiment 4
The structure of soldering-tin layer as Fig. 4 530 shown in, except on the Ag layer 500 of thick 1.5 μ m successively lamination the structure of the 2nd Au10-Sn layer 534 of the 2nd Ag layer 533 of the Au10-Sn layer 513 of thick 1.0 μ m, the In layer 532 of thick 0.33 μ m, thick 0.2 μ m and thick 2.47 μ m, other similarly to Example 1, make substrate for bonding element, junction temperature makes element bonded substrate (No.21) similarly to Example 1.Similarly make 10 piece element bonded substrates, measured surface roughness and bond strength similarly to Example 1, Ra=0.049 μ m, Rmax=0.644 μ m, average splice intensity is 2.5kgf/mm
2, the main form of peeling off is in the semiconductor element.In addition, substrate for bonding element No.22 of the present invention～28 are made in the thickness variation as shown in table 2 of In layer, Au10-Sn layer, the 2nd Ag layer, have similarly carried out the mensuration of bond strength.Its result is shown in table 2 in the lump.
Table 2
| No. | The thickness (μ m) of the one Ag layer (surface smoothing metal level) | The thickness of the one Au 10-Sn layer (μ m) | The thickness of (eutectic is revealed metal level) of In layer (μ m) | The thickness (μ m) of the 2nd Ag layer (surface smoothing metal level) | The thickness of the 2nd Au 10-Sn layer (μ m) | The composition of soldering-tin layer (composition beyond following is Sn) | The fusing point of soldering-tin layer (℃) | Average splice intensity (kgf/mm 2) (n＝10) | The main form of peeling off | Ra (μm) | Rmax (μm) | |||
| Au (wt％) | In (wt％) | Ag (wt％) | ||||||||||||
| Embodiment 4 | 21 | 1.5 | 1 | 0.33 | 0.2 | 2.47 | 5.71 | 5.06 | 37.79 | 192 | 2.5 | In the semiconductor element | 0.049 | 0.644 |
| 22 | 1.5 | 1 | 0.164 | 0.2 | 2.636 | 5.97 | 2.51 | 37.72 | 193 | 2.6 | In the semiconductor element | 0.051 | 0.668 | |
| 23 | 1.5 | 1 | 0.501 | 0.2 | 2.299 | 5.44 | 7.70 | 37.86 | 184 | 2.2 | In the semiconductor element | 0.055 | 0.752 | |
| 24 | 1.5 | 1 | 0.675 | 0.2 | 2.125 | 5.16 | 10.39 | 37.92 | 179 | 2.9 | In the semiconductor element | 0.053 | 0.733 | |
| 25 | 1.5 | 0.077 | 0.33 | 0.2 | 2.393 | 5.71 | 5.06 | 37.79 | 188 | 2.3 | In the semiconductor element | 0.056 | 0.691 | |
| 26 | 1.5 | 1.235 | 0.33 | 0.2 | 1.235 | 5.71 | 5.06 | 37.79 | 191 | 2.1 | In the soldering-tin layer | 0.058 | 0.722 | |
| 27 | 1.5 | 1 | 0.348 | 0.81 | 1.842 | 4.52 | 5.16 | 49.62 | 191 | 2.3 | In the soldering-tin layer | 0.063 | 0.765 | |
| 28 | 0.2 | 1 | 0.33 | 0.2 | 2.47 | 8.03 | 7.12 | 12.51 | 190 | 2.7 | In the semiconductor element | 0.055 | 0.685 | |
| Embodiment 5 | 29 | 1.5 | 3.47 | 0.33 | 0.2 | - | 5.71 | 5.06 | 37.79 | 189 | 2.7 | In the semiconductor element | 0.035 | 0.370 |
| 30 | 1.5 | 3.636 | 0.164 | 0.2 | - | 5.97 | 2.51 | 37.72 | 194 | 3.1 | In the semiconductor element | 0.041 | 0.499 | |
| 31 | 1.5 | 3.299 | 0.501 | 0.2 | - | 5.44 | 7.70 | 37.86 | 188 | 2.6 | In the semiconductor element | 0.047 | 0.428 | |
| 32 | 1.5 | 3.125 | 0.675 | 0.2 | - | 5.16 | 10.39 | 37.92 | 180 | 3.2 | In the semiconductor element | 0.044 | 0.488 | |
| 33 | 1.5 | 3.13 | 0.34 | 0.4 | - | 5.20 | 5.27 | 42.66 | 191 | 2.8 | In the semiconductor element | 0.048 | 0.402 | |
| 34 | 1.5 | 2.842 | 0.348 | 0.81 | - | 4.52 | 5.16 | 49.62 | 194 | 2.3 | In the soldering-tin layer | 0.035 | 0.388 | |
| 35 | 0.2 | 3.47 | 0.33 | 0.2 | - | 8.03 | 7.12 | 12.51 | 191 | 2.8 | In the semiconductor element | 0.046 | 0.465 | |
| Embodiment 6 | 36 | 1.5 | 3.67 | 0.33 | - | - | 6.11 | 5.12 | 33.73 | 197 | 2.7 | In the semiconductor element | 0.105 | 0.854 |
| 37 | 1.5 | 3.836 | 0.164 | - | - | 6.38 | 2.54 | 33.67 | 204 | 2.4 | In the semiconductor element | 0.097 | 0.856 | |
| 38 | 1.5 | 3.508 | 0.492 | - | - | 5.85 | 7.65 | 33.79 | 193 | 3.1 | In the semiconductor element | 0.104 | 0.915 | |
| 39 | 1.5 | 3.336 | 0.664 | - | - | 5.58 | 10.34 | 33.86 | 188 | 2.9 | In the semiconductor element | 0.103 | 0.992 | |
The structure of soldering-tin layer as Fig. 5 540 shown in, except on the Ag layer 500 of thick 1.5 μ m successively lamination the structure of an Au10-Sn layer 543 of the 2nd Ag layer 542 of the In layer 541 of thick 0.33 μ m, thick 0.2 μ m and thick 3.47 μ m, other makes element bonded substrate (No.29) similarly to Example 1.Similarly make 10 piece element bonded substrates, measured surface roughness and bond strength similarly to Example 1, Ra=0.035 μ m, Rmax=0.370 μ m, average splice intensity is 2.7kgf/mm
2, the main form of peeling off is in the semiconductor element.In addition, substrate for bonding element No.30 of the present invention～35 are made in the thickness variation as shown in table 2 of In layer, Au10-Sn layer, have similarly carried out the mensuration of bond strength.Its result is shown in table 2 in the lump.
Embodiment 6
The structure of soldering-tin layer as Fig. 6 550 shown in, except on the Ag layer 500 of thick 1.5 μ m successively lamination the structure of an Au10-Sn layer 552 of the In layer 551 of thick 0.33 μ m and thick 3.67 μ m, other makes element bonded substrate (No.36) similarly to Example 1.Similarly make 10 piece element bonded substrates, measured surface roughness and bond strength similarly to Example 1, Ra=0.105 μ m, Rmax=0.854 μ m, average splice intensity is 2.7kgf/mm
2, the main form of peeling off is in the semiconductor element.In addition, substrate for bonding element No.37 of the present invention～39 are made in the thickness variation as shown in table 2 of In layer, Au10-Sn layer, have similarly carried out the mensuration of bond strength.Its result is shown in table 2 in the lump.
Embodiment 7
The structure of soldering-tin layer as Fig. 7 560 shown in, except on the Ag layer 500 of thick 1.5 μ m successively lamination the structure of a Sn layer 563 of the 2nd Ag layer 562 of the Bi layer 561 of thick 0.33 μ m, thick 0.2 μ m and thick 3.47 μ m, other makes element bonded substrate (No.40) similarly to Example 1.Similarly make 10 piece element bonded substrates, measured surface roughness and bond strength similarly to Example 1, Ra=0.044 μ m, Rmax=0.410 μ m, average splice intensity is 2.5kgf/mm
2, the main form of peeling off is in the semiconductor element.In addition, substrate for bonding element No.41 of the present invention～43 are made in the thickness variation as shown in table 3 of Bi layer, Sn layer, have similarly carried out the mensuration of bond strength.Its result is shown in table 3 in the lump.
Table 3
| No. | The thickness (μ m) of the one Ag layer (surface smoothing metal level) | The thickness of Bi layer (eutectic is revealed metal level) (μ m) | The thickness (μ m) of the 2nd Ag layer (surface smoothing metal level) | The thickness of the one Sn layer (μ m) | The composition of soldering-tin layer (composition beyond following is Sn) | The fusing point of soldering-tin layer (℃) | Average splice intensity (kgf/mm 2) (n＝10) | The main form of peeling off | Ra (μm) | Rmax (μm) | ||
| Bi (wt％) | Ag (wt％) | |||||||||||
| Embodiment 7 | 40 | 1.5 | 0.33 | 0.2 | 3.47 | 6.96 | 38.47 | 196 | 2.5 | In the semiconductor element | 0.044 | 0.410 |
| 41 | 0.2 | 0.33 | 0.2 | 3.27 | 10.32 | 13.42 | 193 | 2.8 | In the semiconductor element | 0.039 | 0.521 | |
| 42 | 0.2 | 0.164 | 0.2 | 3.436 | 5.20 | 13.60 | 199 | 2.9 | In the semiconductor element | 0.048 | 0.433 | |
| 43 | 0.2 | 0.501 | 0.2 | 3.099 | 15.46 | 13.24 | 178 | 2.7 | In the semiconductor element | 0.043 | 0.458 | |
| No. | The thickness (μ m) of the one Ag layer (surface smoothing metal level) | The thickness of In layer (eutectic is revealed metal level) (μ m) | The thickness (μ m) of the 2nd Ag layer (surface smoothing metal level) | The thickness of the one Sn layer (μ m) | The composition of soldering-tin layer (composition beyond following is Sn) | The fusing point of soldering-tin layer (℃) | Average splice intensity (kgf/mm 2) (n＝10) | The main form of peeling off | Ra (μm) | Rmax (μm) | ||
| In (wt％) | Ag (wt％) | |||||||||||
| Embodiment 8 | 44 | 1.5 | 0.33 | 0.2 | 3.47 | 5.25 | 39.18 | 207 | 3.1 | In the semiconductor element | 0.046 | 0.512 |
| 45 | 0.2 | 0.33 | 0.2 | 3.27 | 7.85 | 13.79 | 202 | 2.5 | In the semiconductor element | 0.049 | 0.484 | |
| 46 | 0.2 | 0.164 | 0.2 | 3.436 | 3.90 | 13.79 | 211 | 2.3 | In the soldering-tin layer | 0.041 | 0.511 | |
| 47 | 0.2 | 0.501 | 0.2 | 3.099 | 11.93 | 13.80 | 185 | 2.1 | In the soldering-tin layer | 0.047 | 0.498 | |
Embodiment 8
The structure of soldering-tin layer as Fig. 8 570 shown in, except on the Ag layer 500 of thick 1.5 μ m successively lamination the structure of a Sn layer 573 of the 2nd Ag layer 572 of the In layer 571 of thick 0.33 μ m, thick 0.2 μ m and thick 3.47 μ m, other makes element bonded substrate (No.44) similarly to Example 1.Similarly make 10 piece element bonded substrates, measured surface roughness and bond strength similarly to Example 1, Ra=0.046 μ m, Rmax=0.512 μ m, average splice intensity is 3.1kgf/mm
2, the main form of peeling off is in the semiconductor element.In addition, substrate for bonding element No.44 of the present invention～47 are made in the thickness variation as shown in table 3 of In layer, Sn layer, have similarly carried out the mensuration of bond strength.Its result is shown in table 3 in the lump.
Comparative example 1
The structure of soldering-tin layer as Fig. 9 580 shown in, except on the Ag layer 500 of thick 1.5 μ m successively lamination the structure of the 2nd Au10-Sn layer 583 of the Bi layer 582 of the Au10-Sn layer 581 of thick 1.735 μ m, thick 0.33 μ m and thick 1.735 μ m, other similarly to Example 1, make substrate for bonding element (No.20), junction temperature and condition are made the element bonded substrate similarly to Example 1.Similarly make 10 piece element bonded substrates, measured surface roughness and bond strength similarly to Example 1, Ra=0.120 μ m, Rmax=1.06 μ m, average splice intensity is 0.7kgf/mm
2, the form of peeling off all is between semiconductor element-scolding tin.
Comparative example 2
The structure of soldering-tin layer as Figure 10 590 shown in, except on the Ag layer 500 of thick 1.5 μ m successively lamination the structure of the 3rd Au10-Sn layer 595 of the 2nd Ag layer 594 of the Au10-Sn layer 591 of thick 1.156 μ m, the Bi layer 592 of thick 0.33 μ m and the 2nd Au10-Sn layer 593 of thick 1.156 μ m, thick 0.2 μ m and thick 1.156 μ m, other similarly to Example 1, make the element bonded substrate, junction temperature and condition are made the element bonded substrate similarly to Example 1.Similarly make 10 piece element bonded substrates, measured surface roughness and bond strength similarly to Example 1, Ra=0.119 μ m, Rmax=0.972 μ m, average splice intensity is 0.8kgf/mm
2, the form of peeling off all is between semiconductor element-scolding tin.
Comparative example 3
Do not form an Ag layer, the structure of soldering-tin layer is shown in the 5A0 of Figure 11, except from preventing that scolding tin from flowing out the structure with the Au10-Sn layer 5A2 of Pt side the begun lamination successively Bi layer 5A1 of thick 0.33 μ m and thick 3.67 μ m, other similarly to Example 1, making element bonded substrate.Similarly make 10 piece element bonded substrates, measured surface roughness and bond strength similarly to Example 1, Ra=0.131 μ m, Rmax=1.272 μ m, average splice intensity is 0.4kgf/mm
2, the form of peeling off all is between semiconductor element-scolding tin.
Reference example 1
Do not form an Ag layer, the Sn-Pb soldering-tin layer 600 of the structure of soldering-tin layer such as Figure 12, promptly, except forming from preventing that scolding tin from flowing out with the Pt side soldering-tin layer of structure of the 2nd Sn layer 604 of the Pb layer 601 of thick 0.55 μ m, the Sn layer 602 of thick 1.45 μ m, the 2nd Pb layer 603 of thick 0.55 μ m, thick 1.45 μ m that begun lamination successively, other similarly to Example 1, make substrate for bonding element, junction temperature is made the element bonded substrate similarly to Example 1.Similarly make 10 piece element bonded substrates, measured bond strength similarly to Example 1, average splice intensity is 3.4kgf/mm
2, the main form of peeling off is in the semiconductor element.
The cross section of the substrate for bonding element of embodiment 1～3 and comparative example 1 is ground photo and is shown in Figure 13～16 respectively, and the 3-D view on the soldering-tin layer surface that obtains during the mensuration of surface roughness (AFM) is shown in Figure 17～20 respectively.
The simple declaration of accompanying drawing
Fig. 1 is the sectional view of the substrate for bonding element of the present invention of embodiment 1 use.
Fig. 2 is the sectional view of the substrate for bonding element of the present invention of embodiment 2 uses.
Fig. 3 is the sectional view of the substrate for bonding element of the present invention of embodiment 3 uses.
Fig. 4 is the sectional view of the substrate for bonding element of the present invention of embodiment 4 uses.
Fig. 5 is the sectional view of the substrate for bonding element of the present invention of embodiment 5 uses.
Fig. 6 is the sectional view of the substrate for bonding element of the present invention of embodiment 6 uses.
Fig. 7 is the sectional view of the substrate for bonding element of the present invention of embodiment 7 uses.
Fig. 8 is the sectional view of the substrate for bonding element of the present invention of embodiment 8 uses.
Fig. 9 is the sectional view of the substrate for bonding element of comparative example 1 use.
Figure 10 is the sectional view of the substrate for bonding element of comparative example 2 uses.
Figure 11 is the sectional view of the substrate for bonding element of comparative example 3 uses.
Figure 12 is the sectional view of the element bonded substrate of the Sn-Pb scolding tin in the past that uses of reference example 1.
Figure 13 is that photo is ground in the cross section of the substrate for bonding element of embodiment 1 use.
Figure 14 is that photo is ground in the cross section of the substrate for bonding element of embodiment 2 uses.
Figure 15 is that photo is ground in the cross section of the substrate for bonding element of embodiment 3 uses.
Figure 16 is that photo is ground in the cross section of the substrate for bonding element of comparative example 1 use.
Figure 17 is the 3-D view that the soldering-tin layer surface of the substrate for bonding element of embodiment 1 use records by AFM.
Figure 18 is the 3-D view that the soldering-tin layer surface of the substrate for bonding element of embodiment 2 uses records by AFM.
Figure 19 is the 3-D view that the soldering-tin layer surface of the substrate for bonding element of embodiment 3 uses records by AFM.
Figure 20 is the 3-D view that the soldering-tin layer surface of the substrate for bonding element of comparative example 1 use records by AFM.
Symbol description: 101～112 is substrate for bonding element, 200 are the surperficial substrate that has formed the gold electrode layer, 201 is the aluminum nitride sintered product substrate, 202 for being first basalis of principal component with Ti, 203 for being second basalis of principal component with Pt, 204 is the gold electrode layer, 301 for preventing scolding tin outflow Pt, 401 for being the close binder of principal component with Ti, 500 is an Ag layer (surface smoothing metal level), 509,510,520,530,540,550,560,570,580,590 and 5A0 be soldering-tin layer, 501,513,522,531,543,552,581,591 and 5A2 be an Au10-Sn layer, 502,511,521,561,582,592 and 5A1 be Bi layer (eutectic is revealed metal level), 503,512,533,542,562,572 and 594 is the 2nd Ag layer (surface smoothing metal level), 504,534,583 and 593 is the 2nd Au10-Sn layer, 532,541,551 and 571 are In layer (eutectic is revealed metal level), 563 and 573 is a Sn layer, 595 is the 3rd Au10-Sn layer, 600 is the Sn-Pb soldering-tin layer, 601 is a Pb layer, 602 is a Sn layer, and 603 is the 2nd Pb layer, and 604 is the 2nd Sn layer.
Claims (6)
1. substrate for bonding element, this substrate is made of substrate that possesses electrode layer and the soldering-tin layer that is formed on this electrode layer, wherein, this soldering-tin layer is to comprise (1) (i) Sn, (ii) Sn and Au or the (iii) base metal of In formation, (2) be selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, at least a kind of metal of Au when being In (be limited to base metal) and Sb, (3) be selected from Ag, Ni, Fe, Al, at least a kind of metal of Cu and Pt and the lead-free soldering tin layer that forms, the thickness of this soldering-tin layer is 1～15 μ m, and surface roughness (Ra) is below 0.11 μ m.
2. substrate for bonding element as claimed in claim 1, wherein, aforementioned soldering-tin layer comprises (1) by (i) Sn, (ii) Sn and Au or the (iii) metal underlying layer that constitutes of In, (2) eutectic more than 1 layer that is formed by at least a kind of metal that is selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, Au when being In (be limited to base metal) and Sb is revealed metal level, the surface smoothing metal level more than 1 layer that (3) are formed by the a kind of metal that is selected from Ag, Ni, Fe, Al, Cu and Pt at least; Described each eutectic is revealed metal level and described arbitrary surface smoothing metal level adjacency.
3. the manufacture method of substrate for bonding element, it is to be included in that to form thickness on this electrode layer of the substrate that possesses electrode layer be 1～15 μ m, the soldering-tin layer of the lead-free soldering tin layer of surface roughness (Ra) below 0.11 μ m forms the claim 1 of operation or the manufacture method of 2 described substrate for bonding element, described lead-free soldering tin layer comprises (1) (i) Sn, (ii) Sn and Au or the (iii) base metal of In formation, (2) be selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, at least a kind of metal of Au when being In (be limited to base metal) and Sb, (3) are selected from Ag, Ni, Fe, Al, at least a kind of metal of Cu and Pt and forming; Wherein, this soldering-tin layer forms operation and comprises following each operation that is more than 1 time: by the cambial operation of aforementioned base metal, form the operation that eutectic is revealed metal level by being selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, Au when being In (be limited to base metal) and at least a kind of metal of Sb, form the operation of surface smoothing metal level at least by the a kind of metal that is selected from Ag, Ni, Fe, Al, Cu and Pt; Be right after described formation eutectic reveal the operation of metal level before and/or carry out arbitrary described surface smoothing metal level afterwards and form operation.
4. the manufacture method of substrate for bonding element, it is to be included on this electrode layer of the substrate that possesses electrode layer the knitting layer that forms knitting layer by transition metal to form operation, and formation thickness is 1～15 μ m on this knitting layer, the soldering-tin layer of the lead-free soldering tin layer of surface roughness (Ra) below 0.11 μ m forms the claim 1 of operation or the manufacture method of 2 described substrate for bonding element, described lead-free soldering tin layer comprises (1) (i) Sn, (ii) Sn and Au or the (iii) base metal of In formation, (2) be selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, at least a kind of metal of Au when being In (be limited to base metal) and Sb, (3) are selected from Ag, Ni, Fe, Al, at least a kind of metal of Cu and Pt and forming; Wherein, this soldering-tin layer forms operation and comprises following each operation that is more than 1 time: by the cambial operation of aforementioned base metal, form the operation that eutectic is revealed metal level by being selected from Bi, In when being Sn or Sn and Au (be limited to base metal), Zn, Au when being In (be limited to base metal) and at least a kind of metal of Sb, form the operation of surface smoothing metal level at least by the a kind of metal that is selected from Ag, Ni, Fe, Al, Cu and Pt; Be right after described formation eutectic reveal the operation of metal level before and/or carry out arbitrary described surface smoothing metal level afterwards and form operation.
5. the manufacture method of element bonded substrate is characterized in that, carries out reflow soldering after the element that mounting on the soldering-tin layer of claim 1 or 2 described substrate for bonding element has an electrode makes this electrode and aforementioned soldering-tin layer contacts.
6. the element bonded substrate is characterized in that, by the described method manufacturing of claim 5.
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
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| JP208783/2003 | 2003-08-26 | ||
| JP2003208783 | 2003-08-26 | ||
| JP010700/2004 | 2004-01-19 | ||
| JP2004010700 | 2004-01-19 |
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| CN1842907A true CN1842907A (en) | 2006-10-04 |
| CN100423217C CN100423217C (en) | 2008-10-01 |
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| CNB2004800243915A Expired - Fee Related CN100423217C (en) | 2003-08-26 | 2004-08-17 | Substrate for device bonding, device bonded substrate, and method for producing same |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US7459794B2 (en) |
| EP (1) | EP1672685B1 (en) |
| JP (1) | JP4979944B2 (en) |
| KR (1) | KR100825354B1 (en) |
| CN (1) | CN100423217C (en) |
| DE (1) | DE602004029915D1 (en) |
| WO (1) | WO2005020315A1 (en) |
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| CN106688085A (en) * | 2014-09-09 | 2017-05-17 | 千住金属工业株式会社 | Cu column, Cu nuclear column, solder joint, and through-silicon via |
| CN107591382A (en) * | 2016-07-06 | 2018-01-16 | 英飞凌科技股份有限公司 | Enhanced bond pads |
| CN107591382B (en) * | 2016-07-06 | 2020-06-16 | 英飞凌科技股份有限公司 | Enhanced solder pad |
| CN111872596A (en) * | 2020-07-29 | 2020-11-03 | 昆山市宏嘉焊锡制造有限公司 | Indium, lead, silver and antimony low-temperature brazing solder |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2005020315A1 (en) | 2005-03-03 |
| EP1672685B1 (en) | 2010-11-03 |
| EP1672685A4 (en) | 2007-08-22 |
| US20070001315A1 (en) | 2007-01-04 |
| CN100423217C (en) | 2008-10-01 |
| JP4979944B2 (en) | 2012-07-18 |
| KR100825354B1 (en) | 2008-04-28 |
| EP1672685A1 (en) | 2006-06-21 |
| JPWO2005020315A1 (en) | 2007-11-01 |
| KR20060086353A (en) | 2006-07-31 |
| US7459794B2 (en) | 2008-12-02 |
| DE602004029915D1 (en) | 2010-12-16 |
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