CN1781189B - 电子元件及其制造方法 - Google Patents

电子元件及其制造方法 Download PDF

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Publication number
CN1781189B
CN1781189B CN2004800068102A CN200480006810A CN1781189B CN 1781189 B CN1781189 B CN 1781189B CN 2004800068102 A CN2004800068102 A CN 2004800068102A CN 200480006810 A CN200480006810 A CN 200480006810A CN 1781189 B CN1781189 B CN 1781189B
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chip
electronic
carrying portion
electronic component
carrying
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Expired - Lifetime
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CN2004800068102A
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Chinese (zh)
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CN1781189A (zh
Inventor
加里·约翰逊
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Vlsi Technology Co ltd
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Freescale Semiconductor Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/49506—Lead-frames or other flat leads characterised by the die pad an insulative substrate being used as a diepad, e.g. ceramic, plastic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H—ELECTRICITY
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
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    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85399—Material
    • H—ELECTRICITY
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Toxicology (AREA)
  • Electromagnetism (AREA)
  • Health & Medical Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
CN2004800068102A 2003-02-13 2004-02-04 电子元件及其制造方法 Expired - Lifetime CN1781189B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/367,344 2003-02-13
US10/367,344 US6967390B2 (en) 2003-02-13 2003-02-13 Electronic component and method of manufacturing same
PCT/US2004/003100 WO2004075254A2 (en) 2003-02-13 2004-02-04 Electronic component and method of manufacturing same

Publications (2)

Publication Number Publication Date
CN1781189A CN1781189A (zh) 2006-05-31
CN1781189B true CN1781189B (zh) 2010-04-28

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CN2004800068102A Expired - Lifetime CN1781189B (zh) 2003-02-13 2004-02-04 电子元件及其制造方法

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US (1) US6967390B2 (enExample)
JP (1) JP4620656B2 (enExample)
KR (1) KR101064531B1 (enExample)
CN (1) CN1781189B (enExample)
TW (1) TWI351081B (enExample)
WO (1) WO2004075254A2 (enExample)

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* Cited by examiner, † Cited by third party
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US7353460B2 (en) * 2002-08-06 2008-04-01 Robert Tu Consulting Inc. Web site navigation under a hierarchical menu structure
US7329620B1 (en) * 2004-10-08 2008-02-12 National Semiconductor Corporation System and method for providing an integrated circuit having increased radiation hardness and reliability
JP4509806B2 (ja) * 2005-01-18 2010-07-21 株式会社日立メディコ Ｉｃパッケージ及びそれを用いたｘ線ｃｔ装置
TWI339432B (en) * 2007-08-13 2011-03-21 Ind Tech Res Inst Magnetic shielding package structure of a magnetic memory device
DE102010039063B4 (de) 2010-08-09 2024-01-18 Robert Bosch Gmbh Sensormodul mit einem elektromagnetisch abgeschirmten elektrischen Bauteil und Verfahren zur Herstellung eines solchen Sensormoduls
TWM409527U (en) * 2011-02-23 2011-08-11 Azurewave Technologies Inc Forming integrated circuit module
JP5626402B2 (ja) * 2013-04-24 2014-11-19 大日本印刷株式会社 半導体装置、半導体装置の製造方法、およびシールド板
US20150001696A1 (en) * 2013-06-28 2015-01-01 Infineon Technologies Ag Semiconductor die carrier structure and method of manufacturing the same
KR102354370B1 (ko) 2015-04-29 2022-01-21 삼성전자주식회사 쉴딩 구조물을 포함하는 자기 저항 칩 패키지
JP2018056356A (ja) 2016-09-29 2018-04-05 株式会社東芝 半導体装置
US20220230901A1 (en) * 2021-01-21 2022-07-21 Micron Technology, Inc. Containers for protecting semiconductor devices and related methods

Citations (2)

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CN1075390A (zh) * 1992-01-02 1993-08-18 国际商业机器公司 电磁屏蔽及其制造方法
CN1316778A (zh) * 2000-04-04 2001-10-10 株式会社东金 包括电子电路元件的树脂模制部件

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JPS5588356A (en) * 1978-12-27 1980-07-04 Hitachi Ltd Semiconductor device
US4888449A (en) * 1988-01-04 1989-12-19 Olin Corporation Semiconductor package
JPH0661408A (ja) * 1992-08-10 1994-03-04 Rohm Co Ltd 表面実装型半導体装置
US5294826A (en) * 1993-04-16 1994-03-15 Northern Telecom Limited Integrated circuit package and assembly thereof for thermal and EMI management
US5844168A (en) * 1995-08-01 1998-12-01 Minnesota Mining And Manufacturing Company Multi-layer interconnect sutructure for ball grid arrays
US6008996A (en) 1997-04-07 1999-12-28 Micron Technology, Inc. Interdigitated leads-over-chip lead frame, device, and method for supporting an integrated circuit die
JPH11284117A (ja) * 1998-03-27 1999-10-15 Enomoto Co Ltd 半導体装置の製造方法及び半導体リードフレーム
JP3370636B2 (ja) * 2000-03-03 2003-01-27 三井金属鉱業株式会社 キャリア箔付金属箔及びその製造方法
US6777819B2 (en) 2000-12-20 2004-08-17 Siliconware Precision Industries Co., Ltd. Semiconductor package with flash-proof device
US6689661B2 (en) * 2001-04-10 2004-02-10 Micron Technology, Inc. Method for forming minimally spaced MRAM structures

Patent Citations (2)

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Publication number Priority date Publication date Assignee Title
CN1075390A (zh) * 1992-01-02 1993-08-18 国际商业机器公司 电磁屏蔽及其制造方法
CN1316778A (zh) * 2000-04-04 2001-10-10 株式会社东金 包括电子电路元件的树脂模制部件

Non-Patent Citations (2)

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Title
赵凯华等.电磁学 1985年6月第2版.高等教育出版社,1985,第620页.
赵凯华等.电磁学 1985年6月第2版.高等教育出版社,1985,第620页. *

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Publication number Publication date
WO2004075254A2 (en) 2004-09-02
JP2006518112A (ja) 2006-08-03
US20040159916A1 (en) 2004-08-19
US6967390B2 (en) 2005-11-22
TW200416973A (en) 2004-09-01
KR101064531B1 (ko) 2011-09-14
KR20050100684A (ko) 2005-10-19
CN1781189A (zh) 2006-05-31
WO2004075254A3 (en) 2005-12-01
JP4620656B2 (ja) 2011-01-26
TWI351081B (en) 2011-10-21

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