CN1711639A - 折叠的柔性无接合引线的多芯片功率封装 - Google Patents
折叠的柔性无接合引线的多芯片功率封装 Download PDFInfo
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- CN1711639A CN1711639A CNA2003801030201A CN200380103020A CN1711639A CN 1711639 A CN1711639 A CN 1711639A CN A2003801030201 A CNA2003801030201 A CN A2003801030201A CN 200380103020 A CN200380103020 A CN 200380103020A CN 1711639 A CN1711639 A CN 1711639A
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- 238000000034 method Methods 0.000 claims description 11
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- 241001133184 Colletotrichum agaves Species 0.000 description 4
- 238000004806 packaging method and process Methods 0.000 description 3
- MTCPZNVSDFCBBE-UHFFFAOYSA-N 1,3,5-trichloro-2-(2,6-dichlorophenyl)benzene Chemical compound ClC1=CC(Cl)=CC(Cl)=C1C1=C(Cl)C=CC=C1Cl MTCPZNVSDFCBBE-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
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- 229910052737 gold Inorganic materials 0.000 description 1
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- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
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Images
Classifications
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5387—Flexible insulating substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48237—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a die pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00015—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed as prior art
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
- H01L2924/15747—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
Claims (20)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/294,011 US6731000B1 (en) | 2002-11-12 | 2002-11-12 | Folded-flex bondwire-less multichip power package |
US10/294,011 | 2002-11-12 | ||
PCT/IB2003/004950 WO2004044985A2 (en) | 2002-11-12 | 2003-11-03 | Folded-flex bondwire-less multichip power package |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1711639A true CN1711639A (zh) | 2005-12-21 |
CN1711639B CN1711639B (zh) | 2010-10-13 |
Family
ID=32176188
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2003801030201A Expired - Lifetime CN1711639B (zh) | 2002-11-12 | 2003-11-03 | 折叠的柔性无接合引线的多芯片功率封装 |
Country Status (6)
Country | Link |
---|---|
US (1) | US6731000B1 (zh) |
EP (1) | EP1563540A2 (zh) |
JP (1) | JP2006505945A (zh) |
CN (1) | CN1711639B (zh) |
AU (1) | AU2003274583A1 (zh) |
WO (1) | WO2004044985A2 (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101919033B (zh) * | 2008-01-22 | 2011-11-23 | Nxp股份有限公司 | 制造包括至少一个微电子器件在内的微电子封装的方法 |
CN101582403B (zh) * | 2008-05-15 | 2012-04-04 | 捷敏服务公司 | 以夹在金属层之间的倒装管芯为特征的半导体封装 |
CN102448277A (zh) * | 2011-10-13 | 2012-05-09 | 烽火通信科技股份有限公司 | 通信设备单板上多个xfp光模块的散热装置 |
CN113299564A (zh) * | 2021-05-21 | 2021-08-24 | 广东佛智芯微电子技术研究有限公司 | 一种板级扇出柔性封装基板的封装结构及其制备方法 |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005235825A (ja) * | 2004-02-17 | 2005-09-02 | Renesas Technology Corp | 電子回路モジュール |
US7868468B2 (en) | 2004-11-12 | 2011-01-11 | Stats Chippac Ltd. | Wire bonding structure and method that eliminates special wire bondable finish and reduces bonding pitch on substrates |
US7675166B2 (en) * | 2005-05-11 | 2010-03-09 | Maxim Integrated Products, Inc. | Integrated circuit package device comprising electrical contacts making solderless and bondless electrical-mechanical connection |
US7768075B2 (en) * | 2006-04-06 | 2010-08-03 | Fairchild Semiconductor Corporation | Semiconductor die packages using thin dies and metal substrates |
JP5165214B2 (ja) * | 2006-06-26 | 2013-03-21 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置 |
US7816778B2 (en) * | 2007-02-20 | 2010-10-19 | Micron Technology, Inc. | Packaged IC device comprising an embedded flex circuit on leadframe, and methods of making same |
US9093360B2 (en) | 2013-01-11 | 2015-07-28 | Analog Devices, Inc. | Compact device package |
US9337997B2 (en) | 2013-03-07 | 2016-05-10 | Qualcomm Incorporated | Transcoding method for multi-wire signaling that embeds clock information in transition of signal state |
US9374216B2 (en) | 2013-03-20 | 2016-06-21 | Qualcomm Incorporated | Multi-wire open-drain link with data symbol transition based clocking |
US9755818B2 (en) | 2013-10-03 | 2017-09-05 | Qualcomm Incorporated | Method to enhance MIPI D-PHY link rate with minimal PHY changes and no protocol changes |
US9735948B2 (en) | 2013-10-03 | 2017-08-15 | Qualcomm Incorporated | Multi-lane N-factorial (N!) and other multi-wire communication systems |
US9203599B2 (en) | 2014-04-10 | 2015-12-01 | Qualcomm Incorporated | Multi-lane N-factorial (N!) and other multi-wire communication systems |
EP3114792B1 (en) * | 2014-03-06 | 2021-06-09 | Qualcomm Incorporated | Clock recovery circuit for multiple wire data signals |
US9332940B1 (en) | 2015-01-05 | 2016-05-10 | Analog Devices, Inc. | Compact wearable biological sensor modules |
CN110300975A (zh) * | 2017-03-10 | 2019-10-01 | 指纹卡有限公司 | 包括指纹传感器装置和连接至该传感器装置的基板的指纹传感器模块 |
EP4063878A1 (en) | 2021-03-25 | 2022-09-28 | Nxp B.V. | Integrated circuit and associated method |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3105089B2 (ja) * | 1992-09-11 | 2000-10-30 | 株式会社東芝 | 半導体装置 |
US5637922A (en) * | 1994-02-07 | 1997-06-10 | General Electric Company | Wireless radio frequency power semiconductor devices using high density interconnect |
US6121676A (en) * | 1996-12-13 | 2000-09-19 | Tessera, Inc. | Stacked microelectronic assembly and method therefor |
JPH10189855A (ja) * | 1996-12-17 | 1998-07-21 | Samsung Aerospace Ind Ltd | マルチチップパッケージ用のリードフレーム及びその製造方法 |
US6208521B1 (en) * | 1997-05-19 | 2001-03-27 | Nitto Denko Corporation | Film carrier and laminate type mounting structure using same |
US6300679B1 (en) * | 1998-06-01 | 2001-10-09 | Semiconductor Components Industries, Llc | Flexible substrate for packaging a semiconductor component |
JP3186700B2 (ja) * | 1998-06-24 | 2001-07-11 | 日本電気株式会社 | 半導体装置及びその製造方法 |
DE69938582T2 (de) * | 1998-09-09 | 2009-06-04 | Seiko Epson Corp. | Halbleiterbauelement, seine herstellung, leiterplatte und elektronischer apparat |
US6111761A (en) * | 1999-08-23 | 2000-08-29 | Motorola, Inc. | Electronic assembly |
CN1297252A (zh) * | 1999-11-22 | 2001-05-30 | 沈明东 | 多芯片模组装置及其制造方法 |
JP2001308260A (ja) * | 2000-04-25 | 2001-11-02 | Seiko Epson Corp | 半導体装置 |
US6590282B1 (en) * | 2002-04-12 | 2003-07-08 | Industrial Technology Research Institute | Stacked semiconductor package formed on a substrate and method for fabrication |
-
2002
- 2002-11-12 US US10/294,011 patent/US6731000B1/en not_active Expired - Lifetime
-
2003
- 2003-11-03 EP EP03758558A patent/EP1563540A2/en not_active Withdrawn
- 2003-11-03 AU AU2003274583A patent/AU2003274583A1/en not_active Abandoned
- 2003-11-03 JP JP2004550895A patent/JP2006505945A/ja active Pending
- 2003-11-03 WO PCT/IB2003/004950 patent/WO2004044985A2/en active Application Filing
- 2003-11-03 CN CN2003801030201A patent/CN1711639B/zh not_active Expired - Lifetime
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101919033B (zh) * | 2008-01-22 | 2011-11-23 | Nxp股份有限公司 | 制造包括至少一个微电子器件在内的微电子封装的方法 |
CN101582403B (zh) * | 2008-05-15 | 2012-04-04 | 捷敏服务公司 | 以夹在金属层之间的倒装管芯为特征的半导体封装 |
CN102448277A (zh) * | 2011-10-13 | 2012-05-09 | 烽火通信科技股份有限公司 | 通信设备单板上多个xfp光模块的散热装置 |
CN113299564A (zh) * | 2021-05-21 | 2021-08-24 | 广东佛智芯微电子技术研究有限公司 | 一种板级扇出柔性封装基板的封装结构及其制备方法 |
Also Published As
Publication number | Publication date |
---|---|
CN1711639B (zh) | 2010-10-13 |
WO2004044985A2 (en) | 2004-05-27 |
JP2006505945A (ja) | 2006-02-16 |
US20040089933A1 (en) | 2004-05-13 |
WO2004044985A3 (en) | 2004-07-22 |
AU2003274583A1 (en) | 2004-06-03 |
EP1563540A2 (en) | 2005-08-17 |
US6731000B1 (en) | 2004-05-04 |
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