CN1685508B - 具有盖板型载体的电子模块 - Google Patents
具有盖板型载体的电子模块 Download PDFInfo
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Abstract
改进的多芯片模块包括主电路板,该板具有电性能互连焊盘的阵列,多个IC封装单元安装在该焊盘阵列上。各IC封装单元都包括一对IC封装,这两个封装安装在封装载体的正反两面。封装单元可以安装在主电路板的一面或两面上。本发明的第一基本实施例采用片状的封装载体,该载体具有一对主平面表面。各平面表面都结合有电性能接触的焊盘。通过采用平面表面上的接触焊盘来互连封装的引脚,使一个IC封装表面安装在各个主平面表面上,以形成IC封装单元。可以由许多其它变化,这些变化提供了本发明的各种其它实施例,包括在这些实施例中,载体引脚可以直接层叠在IC封装的引脚上。
Description
发明领域
本发明涉及多片电子模块的产品,更具体地说,涉及将多片集成电路封装在印刷电路板上的方法和装置。它也涉及具有三维集成电路封装结构的高密度存储器模块。
发明背景
半导体存储器的需求量往往具有较高的可塑性。一方面,当这类存储器与计算机系统的整体成本相比不是十分昂贵时,几乎难以卖出去的需求使得计算机的制造商倾向于在各个系统安装大量的主存储器,其数量远远超出平均程序使用所需的量。另一方面,当成本很贵时,制造商一般会在各系统中仅仅安装满足平均程序所需要的数量。虽然,计算机的售价可以维持在一个较低的水平上,但是终端用户立即会发现他必须使他的计算机主存储器升级。
对大容量随机存取计算机存储器越来越多的需求,以及对愈益紧凑型计算机的增长需求,连同部分半导体制造商旨在减少每位成本的动机,不仅使得电路的密度大约每三年翻四倍,而且还使封装和安装电路芯片技术的效率越来越高。一直到上世纪八十年代后期,半导体存储器芯片通常采用双列直插式封装(DIPP)。这种DIPP封装的引脚一般可直接焊在主电路板(例如,母板)通孔中,或者插入焊接在主电路板通孔中的插座中。随着表面安装技术的出现,传统的印刷电路板上的电镀通孔已经被导电的安装焊盘所取代。小外形J型引脚(SOJ)封装已经引伸出薄的小外形封装(TSOP)。因为在相邻表面安装引脚中心之间的间距或间隔明显地小于常规通孔组件的常规0.10英寸的间隔,表面安装芯片趋向于显著地小于所对应的常规芯片,从而在印刷电路板上中占据较少的空间。此外,随着不再需要通孔,表面安装技术使得它本身能适于将元件安装在印刷电路板的两面。采用在两面安装的表面安装封装的存储器模块已经成为了一种标准。较早使用的单列存储器模块(SIMM)和当今使用的双列存储器模块(DIMM)被插入在母板上的插座中。
封装密度通过制造模块而显著地增加,在该模块中,可采用三维结构来层叠多个集成电路(IC)芯片(例如,存储器芯片)。按一般的规律,芯片的三维层叠需要复杂的、非标准的封装方法。
在美国专利No.4,956,694中,Floyd Eide的题为INTEGRATEDCIRCUIT CHIP STACKING(集成电路芯片层叠)披露了一个IC芯片垂直层叠的实例。将多个集成电路封装在一个封装载体中,并且在印刷电路板上一个层叠在另一个上。除了芯片的选择端之外,芯片上所有其它类似的端子都并行连接着。
在另一个美国专利No.5,128,831中,Fox等人发明的题为“HIGH-DENSITY ELECTRONIC PACKAGE COMPRISING STACKED SUB-MODULESWHICH ARE ELECTRICALLY INTERCONNECTED BY SOLDER-FILLED VIAS(包括采用充满焊锡通孔实现电性能互连层叠子模块的高密度电子封装)”披露了另一例芯片层叠的例子。该封装是由各个可测试的子模块组合而成的,在各个子模块中具有一个键合在模块中的单个芯片。子模块采用类似框架的间隔器实现相互交错。子模块和间隔器两者都具有对准孔,对准孔提供了在各个子模块之间的互连。
美国专利No.5,313,096也披露了Floyd Eide发明的题为“IC CHIPPACKAGE HAVING CHIP ATTACHED TO AND WIRE BONDED WITHIN AN OVERLYINGSUBSTRATE(具有芯片和引脚粘结在基片上的IC芯片封装)”,则是另一个例子。这类封装包括将其上部工作表面键合在下部基片下表面的芯片上,该下部基片在其连接于外围导电焊盘的上表面具有导电引脚。在其上部工作表面上的端点和引脚之间的连接是采用在下部基片层中的通孔的引脚键合来实现的。键合到下部基片层的上部基片层具有和下部基片层的开孔相对应的开孔,并且提供了能够产生键合的间隔。在产生键合之后,该通孔被环氧填满,以形成一个独立的可测试子模块。多个子模块可以层叠在一起并且与连接于边缘的金属条互相连接。
美国专利No.5,869,353也披露了A.U.Levy等人的题为“MODULARPANEL STACKING PROCESS(有标准组件的板的层叠工艺)”的发明,这是层叠芯片模块的最后一个例子。制造多个具有通孔且在通孔的底部具有芯片安装焊盘和连接导电焊盘的面板。芯片安装焊盘和接触导电焊盘都采用焊膏涂覆。塑性压入的表面安装IC芯片定位在涂覆焊膏的安装焊盘上,将多层板以层叠的结构层叠在一起,并且加热该层叠将芯片的引脚与相邻面板的安装焊盘和连接焊盘焊在一起。随后通过切割和分裂操作从板层叠中分离出单个的芯片封装。
从上述例子中可以看到,通过复杂的封装和层叠的结构可以获得芯片密度的增加,这也必然会引起较高的每位存储的成本。
发明内容
本发明提供对印刷电路板增加电路的密度。本发明特别适用于增加计算机系统常用的存储模块上存储芯片的密度。本发明包括:封装的载体,它被设计在同样安装在PCB上的第一集成电路(IC)顶部的印刷电路板上进行安装。该载体具有一个上部的主表面,该主表面上具有焊盘阵列,在该焊盘阵列上可以安装第二个IC封装。当安装在第一个封装的上部时,载体可以认为是一个盖板或平台,在该盖板的上部可以安装第二个IC封装。该载体具有多个引脚,通过这些引脚可以将该载体表面安装至PCB。各个载体引脚都与上部表面的焊盘阵列中的单个焊盘电性能连接。本发明也包括使用至少一个PCB、至少一个封装载体和至少两个与各载体相组合的IC封装(其中一个安装在载体上,而另一个则安装在PCB上载体的下面)的多芯片模块组件。对多芯片模块的情况来说,在载体下面的IC封装与安装在上边的IC封装一起共享了所有或大多数的连接,载体的单个引脚和在载体下面封装的单个引脚可以共享PCB上的安装和连接。当必须通过在载体上相似地定位引脚和在载体下面进行封装来形成独立的连接时,PCB上所对应的焊盘就可以分成具有独立连接的各个引脚。另外,通过将标准封装引脚的信号翻转到对应于未使用引脚的载体引脚,可以将在下部封装的电性能未使用引脚下的焊盘用于上部封装的特殊信号。
载体的第一实施例包括具有第一焊盘阵列的主体,它以两行并行的线性的焊盘排列着,并且粘在载体的上部主表面上。IC封装的引脚可以采用导电性键合在第一焊盘阵列的焊盘上。该主体也具有第二焊盘阵列,以两行并行排列的线性焊盘沿着纵向边缘定位,并且粘在载体的下部主表面上。第一和第二阵列的焊盘可采用导电电镀的过孔和通孔来实现互连。载体的引脚采用电键合与第二阵列的焊盘相连接。载体还包含了散热特性。载体第一侧的端子引脚是两个电源引脚。这两个电源引脚通过第一层叠片相互连接,其中第一层叠片是连续的并在这两个引脚之间延伸并且可以延伸到载体的整个长度。可以在载体的各个端面处暴露出第一层叠片的端面部分,以便于将热传递给周围的空气中。载体第二侧的端子引脚是接地引脚。这两个接地引脚通过第二层叠片相互连接,其中第二层叠片是连续的并在这两个引脚之间延伸且可以延伸到载体的整个长度。在载体的各个端面处暴露了第二层叠片的端面部分,以便于热能传递到周围的空气中。各个层叠片都与同一行的介入引脚相分开的。第一和第二层叠片是沿着载体中心相互分开的。各个IC封装包括介质主体,嵌入在介质主体中的IC芯片,以及多个引脚,每一个引脚的末端也都嵌入在主体中并且与IC芯片的连接端子电性能耦合。对于多芯片模块的推荐实施例来说,下部IC封装的主体上部表面与层叠片密切接触,或者通过导热性化合物与层叠片热耦合,或者紧密的接触在一起,以便于将封装主体上的热传递到层叠片。
载体的第二实施例包括改进的引脚,各个引脚还具有散热的功能。各引脚的中心部分与载体主体下表面上的第二焊盘阵列的焊盘键合在一起。各引脚外侧部分的成形,便于表面安装在PCB安装/连接的焊盘上。各引脚的内侧部分向主体的中心延伸。对多芯片模块的推荐实施例来说,下部IC封装的主体上表面与各个引脚的内侧部分密切接触,或者通过导热性化合物与层叠片热耦合,或者紧密的接触在一起,以便于将封装主体上的热传递到层叠片。
载体的第四实施例只包括一组引脚。上部封装最初粘结在用于制造工艺中适当定位的引脚框架上,它可以采用诸如焊接回流的工艺与一组引脚电性能和物理性相接触。在焊接回流工艺之后,芯片/引脚框架组件经过整理并且处理后制成具有引脚的载体一安装封装,其中引脚沿着从封装向外和向下延伸,从而可以产生一空间,在其下方,可将第一封装安装于PCB之上。
载体的第五实施例适用于安装一个或多个球栅阵列类IC封装。所构成的模块可以具有一个或多个球栅阵列类封装,它可以安装在载体下面的PCB上,在载体上还可以安装一个或多个非球栅阵列类的封装。
附图说明
图1是显示其顶部的第一实施例封装载体的立体投影图;
图2是第一实施例封装载体主体,并显示了该主体下侧的立体投影图;
图3是图1所示封装载体的载体引脚的立体投影图;
图4是分别连接着接地引脚和电源引脚的第一和第二散热片的立体投影图;
图5是显示出第一和第二集成电路封装相互关系的第一实施例电子模块的分解部分的立体投影图;
图6是第一实施例电子模块的组件部分的立体投影图;
图7是第二实施例封装载体的立体投影图;
图8是第二实施例封装载体主体,并显示了该主体下侧的立体投影图;
图9是图7所示封装载体的载体引脚的立体投影图;
图10是第一或第二实施例封装载体的载体主体的上部视图;
图11是第二实施例电子模块的分解部分的立体投影图;
图12是第二实施例电子模块的组件部分的立体投影图;
图13是在无主体盖板载体的制造过程中所使用的引脚框架部分的立体投影图;
图14是图13所示引脚框架部分和在其上安装用的双翼型IC封装的分解立体投影图;
图15是图14所示可组装的引脚框架部分和IC封装的立体投影图;
图16是图15所示可组装的引脚框架部分和IC封装经过整理和成型操作之后,但在粘结薄膜片粘结在引脚的下部表面之前的立体投影图;
图17是图16所示全部可组合的引脚、IC封装和薄膜片的立体投影图;
图18是准备用于安装在电路主板部分上的图17所示组件以及一个其它IC封装的立体投影图;
图19是图18所示元件的装配视图;
图20是包括多个图19组件的DIMM模块的立体投影图;
图21是典型球栅阵列IC封装的立体投影图;
图22是准备用于安装在电路板上的四个球栅阵列IC封装和设计用于接受球栅阵列IC封装的双封装载体的分解立体投影图;
图23是图22所示元件的装配图;
图24是包括了多个图23所示组件的可组合的DIMM模块的立体投影图;以及,
图25是设计用于接受球栅阵列IC封装的单个封装的载体,并且两个这类封装安装在印刷电路板的部分上的立体投影图。
具体实施方式
从所附的附图中可以清晰地看到,本发明提出了具有增加电路密度的电子模块的制造。本发明可以用于各种应用。一种非常明显的用途是为了存储器的模块制造。由于存储器的模块一般都是与具有严格指定尺寸的印刷电路板结合成一体的,主板真实状态的更有效的使用将会使得模块具有更大的总的存储器容量。本发明也可以应用于更紧密耦合的相关但并不相同的IC封装。例如,可以要求在含有微处理器芯片的IC封装上再安装一个含有高速缓存存储器的IC封装。现在参照附图来详细讨论各个经改进的电子模块的实施例。
现在参照图1和图2,第一实施例的封装载体100具有介质主体101,该介质主体分别具有上部和下部并行的主平面表面102U和102L。对本发明所推荐的实施例来说,该主体是由通常用于制造印刷电路板的玻璃纤维加固的塑料材料制成的。介质主体101也具有第一安装焊盘阵列103,它粘附在所述的上部主平面表面102U。阵列103的安装焊盘104都是单个成形的,但共同排列以接受第一集成电路封装的引脚(在附图中没显示)。介质主体还包括了粘结在所述下部主平面表面102L的第二安装焊盘阵列105。第二阵列105的各个焊盘106利用在上部主平面表面102U和下部主平面表面102L的内部电镀孔10与所述第一阵列103的焊盘104相耦合。封装载体100还包括一组载体引脚108,每一个载体引脚都与第二安装焊盘阵列105的焊盘106相键合。载体引脚组108的单个引脚108A都是分开的并且构成在印刷电路板上的(附图中未显示)表面结构。值得注意的是,主体101在它的两个端面上都具有一个凹口109。
对载体的该实施例也应注意的是,在第一阵列103的两行焊盘104之间的间隔比在第二阵列的两行焊盘106之间的间隔窄。这种间隔上差异的原因是封装载体100可以被看成为一个盖板或平台,它覆盖和架在安装预印刷电路板的第二集成电路封装上。于是,该载体引脚108必须有较宽的间隔,以便于它能安装在所覆盖的封装引脚的外面。封装载体100还包括了一对在它两个端面上的电容器安装焊盘110。每一对焊盘的尺寸和间隔都必须能容纳表面安装去耦电容器111。
现在参照图3,第一实施例封装载体100的载体引脚组108包括多个可分节联接的引脚301,该引脚的每一个都单独粘结在第二安装焊盘阵列105的焊盘106上。每一个引脚301的外部部分基本上呈C形状。载体引脚组108还包括了三个电源引脚302,该引脚通过第一层叠片303相互互连,其中第一层叠片起到了散热层的作用。在载体引脚组108中还包括了三重的接地引脚304,该引脚是通过第二层叠片305相互互连,第二层叠片起到了散热层的作用。第一和第二层叠片303和305分别与一对延伸片306组合成一体,这样能增加来自层叠片的散热。凹口109露出部分的第一和第二层叠片103和105,从而有助于散热到周围的空气中。
图4显示了去除所有可分节联接的引脚301的载体引脚组108。左边是三个电源引脚302和相对应互连着的散热片303,而右边是三个接地引脚304和相对应互连着的散热片305。延伸片306也是容易看到的。
参照图5,显示了具有多个引脚502的第一集成电路封装501,它被对准,以表面安装至第一实施例封装载体100的上部主平面表面102U的第一安装焊盘阵列103上。印刷电路板503包括第三安装焊盘阵列504,该焊盘阵列具有以两行506L和506R并行排列的各个单独安装焊盘505。所示的第二集成电路封装507具有多个引脚508,这些引脚被对准,以用于表面安装至第三安装焊盘阵列504。封装载体100也对准表面安装第三安装焊盘阵列504上。将封装载体设计成构成它的载体引脚组108的它的两行引脚109的间隔宽于比第二集成电路封装507的引脚行508的间隔。这样的结构使得一个载体引脚108L和108R和一个第二封装引脚508能够共享印刷电路板503的安装焊盘505。当信号和/或电源输入是共同的,则焊盘505就不需要分开。然而,当信号不同(例如,片选信号)时,焊盘就必须分开,使得不同信号或电源要求可以引入到适当的焊盘。焊盘505A就是这样一个分开的焊盘。如果第一和第二封装501和507分别都是存储器芯片,并且第一封装501是表面安装在载体100,而载体100和第二封装是表面安装在印刷电路板503上,则可以通过向焊盘505A适当的半个发送信号来选择各个芯片。向各相同芯片发送片选信号的另一种方法是将未使用的引脚(在每一个封装中一般都有若干未使用的引脚)的焊盘作为一个片选信号来使用,从而将载体主体101中的信号再发送给键合了片选引脚的焊盘。值得注意的是,印刷电路板包括在第三安装焊盘阵列504的两个对角上的一对电容器安装的焊盘509。各对焊盘的尺寸和间隔都要能容纳表面安装去耦电容器111。另外,对每一个芯片也可以采用两个以上的电容器。很显然,对一对相同的存储器芯片来说,除了片选输入之外,所有的连接都可以垂直重叠。在这种情况下,可以采用内部电镀开孔107使第一安装焊盘阵列103的焊盘104同第二安装焊盘阵列105的垂直对准焊盘106相互连接。当所采用的第一和第二集成电路封装是不同时,可能需要重新导引连接的路线。这可以采用与印刷电路板设计相同的方式来完成。于是,在分别位于载体主体的上部表面102U和下部表面102L之间的第一103和第二105安装焊盘阵列之间,可以将一层或多层的引脚引线介入层嵌入在主体101的介质材料中。介入层也可以与内部电镀孔相互连接。该项技术是普通技术,所以本文件不需要进行讨论的。
现在参照图6所述可组装的第一实施例的电子模块600,第二集成电路封装507表面安装在印刷电路板503的第三安装焊盘阵列504上,第一实施例的封装载体100也表面安装在第三安装焊盘阵列504上,并且第一集成电路封装501表面安装在封装载体100的第一安装焊盘阵列103上。该组件也包括四个去耦电容器111,这些电容器表面安装在电容器安装焊盘110和509。
图7,8和9以组件形式(图7)和元件形式(图8和图9)示出了第二实施例的封装载体700。在第一实施例载体100和第二实施例载体700之间主要的差异是引脚701的形状。值得注意的是,各个引脚都具有伸长的一部分,它起着散热片的作用。不存在为第一实施例载体100的情况那样耦合至或者电源或者接地引脚的层叠片。图8显示了介质载体主体101的下侧,在该情况下,它与第一实施例的载体100是相同的。
参照图10,第一或第二芯片载体的主体俯视图显示了用于去耦电容器安装焊盘110和509的引线连接结构(图5和图6)。引线1001将焊盘110A与第一安装焊盘阵列103的电源安装焊盘104P相耦合,而引线1002将焊盘110B与第一安装焊盘阵列103的接地安装焊盘104G相耦合。同样,引线1003将焊盘509C与第一安装焊盘阵列103的接地安装焊盘104G相耦合,而引线1004将焊盘509D与第一安装焊盘阵列103的电源安装焊盘104P相耦合。
现在参照图11的分解图,所显示的具有多个引脚502的第一集成电路封装501对准表面安装在第二实施例封装载体700的上部主平面表面102U上的第一安装焊盘阵列103上。印刷电路板503包括第三安装焊盘阵列504,该阵列具有以两个并行行506L和506R排列的单个安装焊盘505。所示的第二集成电路封装507具有多个引脚508,其对准用以表面安装在第三安装焊盘阵列504上。第二实施例封装载体700也对准用以表面安装在第三安装焊盘阵列上。
现在参照图12所示的可组装的第二实施例电子模块1200,第二集成电路封装507表面安装在印刷电路板503的第三安装焊盘阵列504上,第二实施例封装载体700也表面安装在第三安装焊盘阵列504上,并且第一集成电路封装501表面安装在封装载体100的第一安装焊盘阵列103上。该组件也包括四个去耦电容器111,这些电容器表面安装在电容器安装焊盘110和509上。
接着参照图13,用于无主体盖板载体制造的引脚框架部分1300包括一对框架边1301,一对连接边的构件1302,以及一组引脚1303L和1303R分成左右两组排列。各组的引脚采用连接器连接线1304相互连接着以及连接着边连结构1302。应该理解的是,整个引脚框架带可以包括许多这类引脚框架部分1300。
现在参照图14,IC封装501具有两行翼型引脚502,该翼型引脚定位在引脚框架部分1300上。图中的虚线表示了封装501将安装在引脚框架部分1300上的安装位置。
接着参照图15,IC封装501采用诸如焊接的回流步骤已经粘结在引线框架部分1300上。值得注意的是,封装501的引脚502定位在连接器连接线1304的内侧。
参照图16,图15的组件已经经过了整理和成型的步骤,在该步骤中,已经将连接引脚和边连结构1302的连接器连接线1304冲压掉,从而形成了单个IC封装501和它所粘结的引脚1303。在该步骤中所形成的引脚1303有效地产生了一个无主体的盖板类载体。粘结薄膜带1601可以是一种导热性的、电绝缘型的、热固型的带,可以准备用于组件下边的粘结。特别是,薄膜带1601粘结在引脚1303的下表面。该薄膜带1601的存在使得组件的再加工方便,即使在整理和成型/单个步骤完成之后。
参照图17,已经将粘结薄膜带1601粘结在引脚1303的下表面。IC封装组件1701包括IC封装501,粘结的盖板,或载体,引脚1303以及粘结薄膜带1601,该IC封装组件准备用于安装在印刷电路板上。
现在参照图18,图17所示的IC封装组件1701可以定位在另一个IC封装507上,而该IC封装507则定位在印刷电路板503部分上。正如图5所示实施例的情况那样,IC封装组件507和IC封装507的引脚都表面安装在安装焊盘阵列504的焊盘上,该焊盘以两个并行行506L和506R排列。也显示了去耦电容器111用于安装在印刷电路板503上的位置。
现在参照图19所示可组装的第三实施例电子模块1900,图18所示的单个元件已经装配在印刷电路板部分503上。图20显示了八个图18所示的组件合成了一个单个的DIMM模块2001。DIMM模块一般可用于个人电脑的内存扩展板。
接着参照图21,盖板型封装载体也可以与球栅阵列类IC封装合成为一体。各个球栅阵列类IC封装2100都可以具有多个连接元件2101,在现在这种情况下,这些连接元件是焊盘,在这些连接元件中已经键合或回流粘结了金属(最好是金)球2102。
参照图22,选用一封载体2201用于一对球栅阵列IC封装2100-A和2100-B,后者在该方式中被定位,用以在其上进行安装。每一个球2102都物理和电性能地键合在载体2201上所对应焊盘2202上。这种键合可以采用回流焊接、采用振动是能量输入,或者其它任何大家所熟悉的技术来实现。同样,一对球栅阵列类IC封装2100-C和2100-D可以定位安装在载体2201下面的印刷电路板2203的部分。要注意的是,印刷电路板2203包括安装焊盘阵列2204,该阵列2204可以专门用于封装载体2201。下部球栅阵列IC封装2200-C和2200-D是通过它们各自的安装焊盘阵列2205-C和2205-D形成与印刷电路板的电路的接口。
现在参照图23的可组装的第四实施例电子模块2300,图22所示的元件的组装已经导致一由载体2201加以覆盖着的具有两个球栅阵列类封装(2100-C和2100-D)的印刷电路板组件,其中在载体上安装了另外两个球栅阵列类封装(2100-A和2100-B)。图24显示了将八个图23所示的组件合成在单个DIMM模块2400中。
参照图25,组装好的第五实施例电子模块2500类似于图23所示的电子模块,除了所设计的载体2501只可以容纳单个球栅阵列IC封装2502-A。将另外一个球栅阵列IC封装2502-B定位在载体2501的下面。载体2501和IC封装2502-B都定位在印刷电路板上,使得这样两个封装都安装在印刷电路板的部分上的这样一类封装。
虽然本文已经讨论了几个单独的实施例,但是很显然,对业内的专业人士来说,都可以在不脱离下文权利要求所定义的本发明的范围和精神的条件下进行变化和改进。例如,两个基本实施例可能具有许多种的变化。例如,表面安装IC封装的引脚可以改变。另外,载体引脚的外形部分也可以改变上文中所讨论的“C”型。目前,两类引脚最常用于表面安装元器件。一类是“J”型,另有一类是“S”型。“S”型,或翼型形状的引脚正变得更加普遍。也可以开发用于表面安装元器件的其它类型引脚。例如,针状连接的引脚也变得广泛使用,因为它们所提供的连接只需要很小的空间。这类引脚只是将其端点焊接在连接器的焊盘上。本发明并没有考虑限制在任何所构成的元器件或在芯片载体101上使用的引脚类型。引脚的类型也可以在模块所构成的元件之间混合。于是,就有可能具有将一定数量的不同引脚组合的组件。在该领域的一端,封装和载体都可以采用“C”型或“J”型的引脚。而在另一端,所有的元器件都只采用“S”型的引脚。在这两种极端情况之间,每一个元器件都可以采用目前表面安装元器件有效的三种引脚中任何一种,也可以开发新的引脚。另外,元器件的表面安装一般还包括焊接回流工艺,在该工艺中,引脚和/或安装焊盘都可以采用助焊剂涂覆。随后装配元器件,并且组件在烘箱中经受回流过程。于是,引脚就可以导电性地键合在安装焊盘上。还有一些其它众所周知的技术可以应用于引脚和安装焊盘的键合。另一种表面安装选择的方法是将金属球(通常是金)放置在每一个安装焊盘上,在将引脚放置在每一个球上,并且使用超声波的能量,使得每一个球与它所对应的焊盘和引脚融合成一体。
Claims (25)
1.一种电子模块,包括:
第一组和第二组IC封装,每一组封装都至少包括一个封装,每一个封装都具有包含集成电路芯片和多个与该所述芯片相耦合的连接元件的封装主体;
至少一个IC封装单元,具有其上带有至少一个安装位置的载体,以便对准安装位置导电性地键合上所述第一组IC封装的所述至少一个封装,所述的载体还具有一组载体引脚,该引脚从所述至少一个安装位置向外和向下延伸,从而形成一个凹槽,在该凹槽中嵌套所述的第二组IC封装;
印刷电路板,至少在其表面具有一个表面安装焊盘阵列,对着每一个焊盘阵列都导电地键合上所述至少一个IC封装单元的所述载体的所述引脚和所述嵌套着的第二组IC封装的至少一个封装的所述连接元件,
其中,所述载体只包括一组引脚,至少一个的第一组IC封装的连接元件对着该引脚组导电性地加以键合。
2.如权利要求1所述电子模块,其特征在于,所述载体包括介质载体主体,它具有上部和下部平行的主平面表面,所述安装位置定位在所述上部主平面表面上,所述载体引脚粘结在所述下部主干面表面上,在所述上部和下部主平面表面之间延伸的导电电镀孔提供了在所述载体引脚和所述安装位置之间的电性能连接。
3.如权利要求1所述电子模块,其特征在于,所述第一和第二组IC封装的每一组都是球栅阵列型的,并利用印刷电路板上所述至少一个表面安装焊盘阵列的分开的焊盘,以供安装所述至少一个IC封装单元以及所述嵌套的第二组IC封装。
4.如权利要求1所述电子模块,其特征在于,还包括至少一个安装在所述IC封装单元的去耦电容器。
5.如权利要求1所述电子模块,其特征在于,每一个载体引脚包括一薄片的延伸部分,它平行于和贴近于所述下部主平面表面。
6.如权利要求5所述电子模块,其特征在于,那些在所述第一组IC封装工作期间被设计成处于接地电位或者电源电位的载体引脚的薄片延伸部分起到散热片的作用。
7.如权利要求1所述电子模块,其特征在于,所述介质载体主体是由玻璃纤维加固的塑料材料制成的。
8.如权利要求1所述电子模块,其特征在于,利用单个表面安装焊盘阵列,以供安装所述至少一个IC封装单元和所述嵌套的第二组IC封装。
9.如权利要求8所述电子模块,其特征在于,所述表面安装焊盘阵列的至少一个焊盘是分开的,使得所述第一组封装和第二组封装的相对应连接元件分别接受唯一的信号。
10.如权利要求1所述电子模块,其特征在于,利用单个表面安装焊盘阵列以供键合所述至少一个IC封装单元和所述嵌套的第二组IC封装,其中,通过导引信号中的至少一个信号至所述第二组IC封装上未使用的连接元件位置,并随后在载体主体以内再导引该信号至适当的,与第一组IC封装上所期望的元件相对应的键合位置,唯一的信号被馈送至第一组IC封装上的,以及嵌套在所述至少一个IC封装单元中的第二组IC封装上的所对应的连接元件。
11.如权利要求1所述电子模块,其特征在于,所述第一组和第二组IC封装都是相同尺寸及具有相同的功能。
12.一种电子模块,包括:
第一组和第二组IC封装,每一组封装都至少包括一个封装,并且每一个封装都具有包含集成电路芯片和多个与该所述芯片相耦合的连接元件的封装主体:
至少一个IC封装单元,其具有一个载体,该载体带有用于所述第一组IC封装的所述至少一个封装的每一个连接元件用的键合位置,所有键合位置均处在共同的平面上,所述的载体还具有一组载体的引脚,每一个引脚都与键合的位置电性能相耦合,所述引脚从该平面向下延伸,从而形成一个凹槽,在该凹槽中嵌套所述的第二组IC封装;
其上具有至少一个表面安装焊盘阵列的印刷电路板,每一个表面安装焊盘阵列均导电性地键合到至少一个IC封装单元的所述载体的所述引脚和所述嵌套的第二组IC封装的所述至少一个封装的连接元件上,
其中,所述载体只包括一组引脚,它与所述第一组IC封装的所述至少一个封装的连接元件导电性地键合。
13.如权利要求12所述电子模块,其特征在于,还包括粘结介质薄膜条,其键合至所述安装位置下面的所有引脚。
14.如权利要求13所述电子模块,其特征在于,所述粘结薄膜条是导热性的材料。
15.如权利要求14所述电子模块,其特征在于,所述粘结薄膜带与所述嵌套的第二组IC封装相接触。
16.如权利要求12所述电子模块,其特征在于,所述载体包括介质载体主体,它具有上部和下部平行的主平面表面,所述键合位置位于所述上部主平面表面上,所述载体引脚附加在所述下部主平面表面上,而所述载体引脚和所述键合位置之间的电性能连接是采用导电电镀孔来实现的,该导电电镀孔在所述上部和下部主平面表面之间延伸。
17.如权利要求12所述电子模块,其特征在于,每一个所述第一和第二组IC封装是球栅阵列类型的,并且采用印刷电路板上所述至少一个表面安装焊盘阵列的分开的焊盘来安装所述至少一个IC封装单元和所述嵌套的第二组IC封装。
18.如权利要求16所述电子模块,其特征在于,还包括至少一个安装在每个IC封装单元上的去耦电容器。
19.如权利要求16所述电子模块,其特征在于,每一个载体引脚都包括薄片的延伸部分,该部分平行于和贴近于所述的下部主平面表面。
20.如权利要求19所述电子模块,其特征在于,那些被设计成在所述第一组IC封装的工作时处于接地电位或者电源电位的载体引脚才具有作为散热片起作用的薄片延伸部分。
21.如权利要求16所述电子模块,其特征在于,所述介质载体主体是由玻璃纤维加固的塑料材料制成的。
22.如权利要求16所述电子模块,其特征在于,还包括至少一对在所述上部主平面表面上的电容器安装焊盘,其各对焊盘的尺寸和间隔能容纳去耦电容器。
23.如权利要求12所述电子模块,其特征在于,利用单个表面安装焊盘阵列以供键合所述至少一个IC封装单元和所述嵌套的第二组IC封装。
24.如权利要求23所述电子模块,其特征在于,所述表面安装焊盘阵列的至少一个焊盘是分开的,以便所述第一组封装和第二组封装的对应连接元件分别接受唯一的信号。
25.如权利要求16所述电子模块,其特征在于,利用单个表面安装焊盘阵列以供键合所述至少一个IC封装单元和一个嵌套的第二组IC封装,其中,通过将信号中的至少一个信号导引至第二组IC封装上未使用的连接元件位置,并随后在载体主体以内导引该信号至适当的,和第一组IC封装上的期望的连接元件相对应的键合位置,唯一的信号被馈送至第一组IC封装上的,以及嵌套在所述至少一个IC封装单元中的第二组IC封装上的对应的连接元件。
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Families Citing this family (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7102892B2 (en) * | 2000-03-13 | 2006-09-05 | Legacy Electronics, Inc. | Modular integrated circuit chip carrier |
US6713854B1 (en) * | 2000-10-16 | 2004-03-30 | Legacy Electronics, Inc | Electronic circuit module with a carrier having a mounting pad array |
US6545868B1 (en) * | 2000-03-13 | 2003-04-08 | Legacy Electronics, Inc. | Electronic module having canopy-type carriers |
US7337522B2 (en) * | 2000-10-16 | 2008-03-04 | Legacy Electronics, Inc. | Method and apparatus for fabricating a circuit board with a three dimensional surface mounted array of semiconductor chips |
JP4484430B2 (ja) * | 2001-03-14 | 2010-06-16 | レガシー エレクトロニクス, インコーポレイテッド | 半導体チップの3次元表面実装アレイを有する回路基板を製造する方法 |
US6944292B2 (en) * | 2001-03-22 | 2005-09-13 | Adc Telecommunications, Inc. | Insulation strip for a pots splitter card |
JP2004222486A (ja) * | 2002-12-27 | 2004-08-05 | Murata Mfg Co Ltd | スイッチング電源モジュール |
US6924437B1 (en) | 2003-04-10 | 2005-08-02 | Cisco Technology, Inc. | Techniques for coupling an object to a circuit board using a surface mount coupling device |
US7180165B2 (en) | 2003-09-05 | 2007-02-20 | Sanmina, Sci Corporation | Stackable electronic assembly |
TWI237889B (en) * | 2004-01-16 | 2005-08-11 | Optimum Care Int Tech Inc | Chip leadframe module |
TWM256012U (en) * | 2004-03-04 | 2005-01-21 | Carry Computer Eng Co Ltd | USB connector with card detector |
DE102004012979B4 (de) * | 2004-03-16 | 2009-05-20 | Infineon Technologies Ag | Kopplungssubstrat für Halbleiterbauteile, Anordnungen mit dem Kopplungssubstrat, Kopplungssubstratstreifen, Verfahren zur Herstellung dieser Gegenstände und Verfahren zur Herstellung eines Halbleitermoduls |
US20060051912A1 (en) * | 2004-09-09 | 2006-03-09 | Ati Technologies Inc. | Method and apparatus for a stacked die configuration |
US7324344B2 (en) * | 2004-12-01 | 2008-01-29 | Cisco Technology, Inc. | Techniques for attaching a heatsink to a circuit board using anchors which install from an underside of the circuit board |
US7321493B2 (en) * | 2004-12-01 | 2008-01-22 | Cisco Technology, Inc. | Techniques for attaching a heatsink to a circuit board using anchors which install from an underside of the circuit board |
KR100688514B1 (ko) * | 2005-01-05 | 2007-03-02 | 삼성전자주식회사 | 다른 종류의 mcp를 탑재한 메모리 모듈 |
US7435097B2 (en) * | 2005-01-12 | 2008-10-14 | Legacy Electronics, Inc. | Radial circuit board, system, and methods |
US7709943B2 (en) * | 2005-02-14 | 2010-05-04 | Daniel Michaels | Stacked ball grid array package module utilizing one or more interposer layers |
KR100725458B1 (ko) | 2005-12-23 | 2007-06-07 | 삼성전자주식회사 | 온도 보상 셀프 리프레시 신호를 공유하는 멀티 칩 패키지 |
KR101012716B1 (ko) | 2006-01-05 | 2011-02-09 | 아사히 가세이 일렉트로닉스 가부시끼가이샤 | 가속도 계측 장치 |
CN101266965B (zh) * | 2007-03-15 | 2010-06-16 | 卓恩民 | 半导体封装体堆叠结构及其制法 |
EP2212983B1 (en) | 2007-10-15 | 2021-04-07 | Ampt, Llc | Systems for highly efficient solar power |
WO2009055474A1 (en) * | 2007-10-23 | 2009-04-30 | And, Llc | High reliability power systems and solar power converters |
US20110210611A1 (en) * | 2008-10-10 | 2011-09-01 | Ampt, Llc | Novel Solar Power Circuits |
WO2010120315A1 (en) | 2009-04-17 | 2010-10-21 | Ampt, Llc | Methods and apparatus for adaptive operation of solar power systems |
US9466737B2 (en) | 2009-10-19 | 2016-10-11 | Ampt, Llc | Solar panel string converter topology |
US9397497B2 (en) | 2013-03-15 | 2016-07-19 | Ampt, Llc | High efficiency interleaved solar power supply system |
CN106663673A (zh) * | 2013-08-28 | 2017-05-10 | 坤佰康有限责任公司 | 半导体晶片和封装拼板式基台 |
CN108565251A (zh) * | 2018-05-15 | 2018-09-21 | 华为技术有限公司 | 系统级封装模块及其封装方法、终端设备 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5677569A (en) * | 1994-10-27 | 1997-10-14 | Samsung Electronics Co., Ltd. | Semiconductor multi-package stack |
US5742097A (en) * | 1993-04-05 | 1998-04-21 | Matsushita Electric Industrial Co., Ltd. | Multilevel semiconductor integrated circuit device |
US6084780A (en) * | 1996-02-06 | 2000-07-04 | Kabushiki Kaisha Toshiba | Printed circuit board with high electronic component density |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4398235A (en) * | 1980-09-11 | 1983-08-09 | General Motors Corporation | Vertical integrated circuit package integration |
US4632293A (en) * | 1985-09-03 | 1986-12-30 | Feinstein Dov Y | Method of upgrading memory boards |
US5138438A (en) * | 1987-06-24 | 1992-08-11 | Akita Electronics Co. Ltd. | Lead connections means for stacked tab packaged IC chips |
US5191404A (en) * | 1989-12-20 | 1993-03-02 | Digital Equipment Corporation | High density memory array packaging |
US5377077A (en) * | 1990-08-01 | 1994-12-27 | Staktek Corporation | Ultra high density integrated circuit packages method and apparatus |
US5455740A (en) * | 1994-03-07 | 1995-10-03 | Staktek Corporation | Bus communication system for stacked high density integrated circuit packages |
US5754408A (en) * | 1995-11-29 | 1998-05-19 | Mitsubishi Semiconductor America, Inc. | Stackable double-density integrated circuit assemblies |
JPH1197619A (ja) * | 1997-07-25 | 1999-04-09 | Oki Electric Ind Co Ltd | 半導体装置及びその製造方法と実装方法 |
KR100266693B1 (ko) * | 1998-05-30 | 2000-09-15 | 김영환 | 적층가능한 비지에이 반도체 칩 패키지 및 그 제조방법 |
WO2000068996A1 (en) * | 1999-05-07 | 2000-11-16 | Seagate Technology Llc | Surface mount ic stacking method and device |
US6545868B1 (en) * | 2000-03-13 | 2003-04-08 | Legacy Electronics, Inc. | Electronic module having canopy-type carriers |
-
2000
- 2000-10-16 US US09/688,499 patent/US6545868B1/en not_active Expired - Lifetime
-
2001
- 2001-10-16 KR KR1020037005309A patent/KR100628286B1/ko not_active IP Right Cessation
- 2001-10-16 JP JP2002537052A patent/JP2004523882A/ja active Pending
- 2001-10-16 DE DE60138205T patent/DE60138205D1/de not_active Expired - Lifetime
- 2001-10-16 EP EP01981665A patent/EP1327265B1/en not_active Expired - Lifetime
- 2001-10-16 AU AU2002213295A patent/AU2002213295A1/en not_active Abandoned
- 2001-10-16 CN CN018173705A patent/CN1685508B/zh not_active Expired - Fee Related
- 2001-10-16 WO PCT/US2001/032330 patent/WO2002033752A2/en active Search and Examination
- 2001-10-16 AT AT01981665T patent/ATE427561T1/de not_active IP Right Cessation
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2003
- 2003-01-13 US US10/341,522 patent/US20030137808A1/en not_active Abandoned
- 2003-07-03 JP JP2003191521A patent/JP2004235606A/ja active Pending
-
2004
- 2004-01-14 HK HK04100275.2A patent/HK1057645A1/xx not_active IP Right Cessation
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5742097A (en) * | 1993-04-05 | 1998-04-21 | Matsushita Electric Industrial Co., Ltd. | Multilevel semiconductor integrated circuit device |
US5677569A (en) * | 1994-10-27 | 1997-10-14 | Samsung Electronics Co., Ltd. | Semiconductor multi-package stack |
US6084780A (en) * | 1996-02-06 | 2000-07-04 | Kabushiki Kaisha Toshiba | Printed circuit board with high electronic component density |
Also Published As
Publication number | Publication date |
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KR100628286B1 (ko) | 2006-09-27 |
CN1685508A (zh) | 2005-10-19 |
JP2004523882A (ja) | 2004-08-05 |
WO2002033752A3 (en) | 2003-03-13 |
KR20030071763A (ko) | 2003-09-06 |
AU2002213295A1 (en) | 2002-04-29 |
HK1057645A1 (en) | 2004-04-08 |
EP1327265B1 (en) | 2009-04-01 |
JP2004235606A (ja) | 2004-08-19 |
DE60138205D1 (de) | 2009-05-14 |
WO2002033752A2 (en) | 2002-04-25 |
EP1327265A2 (en) | 2003-07-16 |
ATE427561T1 (de) | 2009-04-15 |
US20030137808A1 (en) | 2003-07-24 |
US6545868B1 (en) | 2003-04-08 |
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