CN1609782A - 不确定长度的讯息的调整方法与装置 - Google Patents
不确定长度的讯息的调整方法与装置 Download PDFInfo
- Publication number
- CN1609782A CN1609782A CN200410092948.0A CN200410092948A CN1609782A CN 1609782 A CN1609782 A CN 1609782A CN 200410092948 A CN200410092948 A CN 200410092948A CN 1609782 A CN1609782 A CN 1609782A
- Authority
- CN
- China
- Prior art keywords
- signal
- message
- circuit
- character
- signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0602—Systems characterised by the synchronising information used
- H04J3/0605—Special codes used as synchronising signal
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0008—Synchronisation information channels, e.g. clock distribution lines
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Communication Control (AREA)
- Logic Circuits (AREA)
Abstract
Description
Claims (11)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/812,810 US7376152B2 (en) | 2004-03-30 | 2004-03-30 | Method and/or architecture implemented in hardware for the adjustment of messages with indeterministic length |
US10/812,810 | 2004-03-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1609782A true CN1609782A (zh) | 2005-04-27 |
CN100373325C CN100373325C (zh) | 2008-03-05 |
Family
ID=34795862
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004100929480A Expired - Fee Related CN100373325C (zh) | 2004-03-30 | 2004-11-11 | 不确定长度的讯息的调整方法与装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7376152B2 (zh) |
CN (1) | CN100373325C (zh) |
TW (1) | TWI285836B (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2450564B (en) | 2007-06-29 | 2011-03-02 | Imagination Tech Ltd | Clock frequency adjustment for semi-conductor devices |
RU2563008C2 (ru) | 2010-12-03 | 2015-09-10 | Виртген Гмбх | Резцедержатель и система резцедержателя с резцедержателем и корпусом |
US10530611B1 (en) * | 2013-04-25 | 2020-01-07 | Analog Devices, Inc. | Fast control interface |
US9866323B2 (en) * | 2015-12-29 | 2018-01-09 | Intel Corporation | Techniques for optical wireless communication |
US9923638B1 (en) | 2016-12-22 | 2018-03-20 | Intel Corporation | Clock tracking algorithm for twinkle VPPM in optical camera communication systems |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4344180A (en) * | 1980-06-19 | 1982-08-10 | Bell Telephone Laboratories, Incorporated | Redundant word frame synchronization circuit |
JP3522779B2 (ja) * | 1992-10-15 | 2004-04-26 | 富士通株式会社 | Fifoメモリ装置及びデータ分配装置 |
US5490168A (en) * | 1994-07-08 | 1996-02-06 | Motorola, Inc. | Method and system for automatic optimization of data throughput using variable packet length and code parameters |
KR0133423B1 (ko) * | 1994-12-09 | 1998-04-27 | 양승택 | 프레임 동기 장치(frame synchronizng device) |
US7082516B1 (en) * | 2000-09-28 | 2006-07-25 | Intel Corporation | Aligning instructions using a variable width alignment engine having an intelligent buffer refill mechanism |
JP2002132775A (ja) * | 2000-10-20 | 2002-05-10 | Sharp Corp | 検索情報生成装置 |
TW564623B (en) * | 2002-02-22 | 2003-12-01 | Via Tech Inc | Device and method for comma detection and word alignment in serial transmission |
-
2004
- 2004-03-30 US US10/812,810 patent/US7376152B2/en active Active
- 2004-10-14 TW TW093131189A patent/TWI285836B/zh not_active IP Right Cessation
- 2004-11-11 CN CNB2004100929480A patent/CN100373325C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
TWI285836B (en) | 2007-08-21 |
TW200532548A (en) | 2005-10-01 |
CN100373325C (zh) | 2008-03-05 |
US7376152B2 (en) | 2008-05-20 |
US20050220151A1 (en) | 2005-10-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1155967C (zh) | 输出数据的方法、存储器装置和设备 | |
US8539009B2 (en) | Parallel true random number generator architecture | |
CN1797381A (zh) | 片上数据传输控制装置和方法 | |
CN1165839C (zh) | 微处理器,尤其用于芯片卡的微处理器 | |
CN113220108B (zh) | 计算机可读取存储介质、操作频率调整方法及装置 | |
CN111258535B (zh) | 一种用于fpga实现的排序方法 | |
CN1763729A (zh) | 用于闪速存储器的数据处理设备和方法 | |
CN105511806A (zh) | 处理写请求的方法和移动终端 | |
CN1892528A (zh) | 产生数字信号处理器和存储器的时钟信号的电路和方法 | |
CN1609782A (zh) | 不确定长度的讯息的调整方法与装置 | |
CN106155747B (zh) | 一种基于fpga可加速配置的方法和控制系统 | |
CN1420457A (zh) | 高阶合成方法以及高阶合成装置 | |
CN1848075A (zh) | 用于在存储器系统中进行队列深度检测的方法和装置 | |
CN1301460C (zh) | 程序状态寄存器处理状态改变的系统与方法 | |
CN110764600A (zh) | 一种基于cpld/fpga的复位控制方法、设备以及存储介质 | |
CN1942974A (zh) | 半导体存储器 | |
CN1295624C (zh) | 高速缓冲存储器及控制方法 | |
CN1139858C (zh) | 具有定时计数器的定时装置 | |
CN1625093A (zh) | 丢弃错误的逻辑传输单元的方法与装置 | |
CN1238788C (zh) | 可处理变长数据的先进先出寄存器队列装置及控制方法 | |
CN1630292A (zh) | 在硬件上处理多工子层数据单元数据的方法与装置 | |
WO2016177083A1 (zh) | 一种数据存储方法、存储装置和计算机存储介质 | |
CN1315018C (zh) | 时钟脉冲切换系统及其时钟脉冲切换方法 | |
CN1508687A (zh) | 微型计算机及其评价装置 | |
CN100346300C (zh) | 用多重加载/存储指令初始化系统全局变量的设备和方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20160726 Address after: California, USA Patentee after: INTEL Corp. Address before: The Cayman Islands, British West Indies Patentee before: VIA Telecom Co.,Ltd. |
|
TR01 | Transfer of patent right |
Effective date of registration: 20200403 Address after: California, USA Patentee after: Apple Inc. Address before: California, USA Patentee before: INTEL Corp. |
|
TR01 | Transfer of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080305 Termination date: 20211111 |
|
CF01 | Termination of patent right due to non-payment of annual fee |