CN1582088A - Method and device for checking and comparing consistency of circuit schematic diagram and PCB wiring diagram - Google Patents
Method and device for checking and comparing consistency of circuit schematic diagram and PCB wiring diagram Download PDFInfo
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Abstract
The method includes steps: picking up and arranging data of networks and nodes; picking up a name of connection network in network table, determining whether all picked names of connection network in network table are identical; if not, carrying out step for picking up name of connection network; if yes, then comparing node data; if yes, discarding them; if no, then recording them; determining whether comparison is carried out for all connection networks; if no, then returning back to step for picking up name of connection network; if yes determining whether connection network is identical; if no, it indicates there is a difference; if yes, determining next connection network is identical or not continuously till comparison for all connection network is finished. The invention raises efficiency and reduces cost.
Description
Technical field
The present invention relates to the printed wire plate technique, be specifically related to a kind of inspection comparison circuit schematic diagram and the conforming method and apparatus of PCB (printed substrate) wiring diagram.
Background technology
The design of circuit board generally comprises the design of circuit theory diagrams and PCB layout figure, wherein the design of PCB layout figure is the drawing according to circuit theory diagrams design carrying out and be directly used in production, and whether the line node connection of PCB layout figure is consistent with circuit theory diagrams is the important ring that can the product development design correctly realize.
In the prior art, exist circuit theory diagrams to be connected inconsistent with the line node of PCB layout figure, the follow-up variation of circuit theory diagrams does not embody among the PCB layout figure, or the follow-up adjustment device position of PCB layout figure, changing reason such as device package causes and is connected situations such as inconsistent with the circuit theory node of graph, cause the generation of defective circuit board, and then cause lot of manpower and material resources to waste, as seen in board design, how to guarantee the consistency that both line node connect, and then guarantee that the correctness of design is considerable.
Satisfy above-mentioned requirements, must correctly check out consistency that circuit theory diagrams are connected with PCB layout figure line node or the difference that reflects the two apace, check and modification for the designer.Below just be described with reference to the design cycle of 1 pair of circuit theory diagrams of figure and PCB layout figure:
Fig. 1 shows the simplified diagram of the flow process of design circuit schematic diagram and PCB layout figure.At first, designer's design circuit schematic diagram is constantly revised by emulation, and circuit theory diagrams are finished in design; Then, according to circuit theory diagrams design PCB layout figure, during design PCB layout figure, constantly revise PCB layout figure design; According to the needs of PCB layout figure design, revise circuit theory diagrams, as changing chip model etc.These processes are designed PCB layout figure constantly repeatedly at last.Whether after designing PCB layout figure, it is consistent with circuit theory diagrams to need to detect PCB layout figure.
In the prior art, the consistency that has two kinds of methods to come the comparison circuit schematic diagram to be connected with PCB layout figure line node:
1) artificial comparison method (checking) by the device pin line
Connected node by manually coming each device on the collating circuit schematic diagram whether with PCB layout figure on consistent, mainly PCB net table is printed at present, it is right one by one the device on wire net, node and the circuit theory diagrams and line to be carried out the artificial nucleus again, and whether consistent on the pin of the electronic devices and components that connect by node on the comparison circuit schematic diagram and the PCB layout figure determined.
Obviously, this method is only effective for simple circuit board, complicated multilayer circuit board, and tens pages of drawings, the artificial nucleus is to accomplishing.
2) utilize PCB instrument comparison method (checking) by network name
Fig. 2 shows the flow chart of the PCB of utilization instrument comparison method of the prior art (checking by network name).Generative circuit schematic diagram net table at first, it is consistent that necessary strictness of its form and PCB instrument require, and circuit theory diagrams net table called in the PCB layout figure instrument again, utilizes instrument relatively, main algorithm is to judge whether network name is identical earlier, if whether the node below the identical then judgement is consistent.
Though said method has reduced human cost to a certain extent, because network name system tool meeting automatic assignment and modification title connect unanimity so both often occur, but the inconsistent situation of network name, especially repeatedly after changing, difference is bigger.As seen, the comparative result of the method is unreliable, still need manually check, and the design tool kind is a lot of now, and the display mode of every kind of design tool is all different, judges the relatively difficulty of getting up also.
At above-mentioned shortcoming, develop a kind of circuit theory diagrams that can be correctly embody fully fast and is connected difference with PCB layout figure line node for the method for the developer's use very necessity that seems.
Summary of the invention
The invention provides a kind of method and apparatus of checking comparison circuit schematic diagram and PCB layout figure, to solve efficient and the low problem of accuracy that prior art causes because of needing manual operation.The present invention mainly carries out from network node and network name two aspects, utilize data structure algorithm and computer technology to realize, drawn the part algorithm of PCB instrument comparison method, and increased algorithm and optimized, the consistency that is connected that can directly compare each network node connection and components and parts pin fast, and the difference that embodies components and parts be connected inconsistent, inconsistent result is divided into the different classes of demonstration of exporting, manually from this work, freeing, and can guarantee result's accuracy.
For addressing the above problem, the invention provides following technical scheme:
A kind of method of checking comparison circuit schematic diagram and PCB layout figure comprises the steps:
Extract network and node data in finishing circuit schematic diagram and the PCB layout figure net table;
Extract a title that connects network in circuit theory diagrams and/or the PCB layout figure net table;
Whether the described connection network title of judging described extraction is identical, and goes to judge according to judged result whether the node data of said extracted is identical again.
Alternatively, go again to judge according to judged result whether identical step comprises for the node data of said extracted:
If inequality, carry out the step of extracting the title that connects network;
If identical, if the comparison node data identical, are then rejected, if difference, then record;
Judge whether that all connection networks all compare,
If not, return the step of extracting the title that connects network;
If whether decision circuitry schematic diagram and PCB layout figure described is connected network identical, if different, show that circuit theory diagrams and PCB layout figure are variant, if identical, continue to judge whether next connection network is identical, relatively finishes up to whole connection networks.
Described decision circuitry schematic diagram and PCB layout figure described is connected network, and whether identical step comprises: the node of first node in the described connection network of sense circuit schematic diagram and PCB layout figure net table relatively, or the node comparison of getting first node and circuit theory diagrams net table in the described connection network of PCB layout figure:
If there is not same node point, the relatively more next network that connects;
If same node point is arranged, relatively whether other nodes are consistent;
If all the node unanimity illustrates that this connection network is identical;
If there is node inconsistent, record and/or the relatively more next network that connects.
Method provided by the invention also can comprise the steps:
Rejecting has only the connection network of a node;
Judge whether to exist through all and search network and the node that does not all find;
If have, record also shows;
If no, show relatively to finish that if all identical, show circuit theory diagrams and PCB layout figure, otherwise it is different to show that circuit theory diagrams and PCB layout figure have, record also shows.
Alternatively, method also comprises step: show according to comparative result: connect network on the circuit theory diagrams and not on PCB layout figure; And/or
Connect network on PCB layout figure and not on circuit theory diagrams; And/or
It is identical but still have part of nodes inconsistent to connect network name; And/or
It is inequality but have only the part of nodes unanimity to connect network name.
Preferably, described method is applicable to the net table of text mode, wherein, circuit theory diagrams net tableau format comprises: CAPTURE ｀ S TELESIS, CAPTURE ｀ S PADSPCB, VIEWDRAW FORALLEGRO, VIEDRAW FOR PADS, orcad for DOS ' s TELESIS;
PCB tool web tableau format comprises: ALLEGRO ｀ S NETIN (NO BACK), POWERPCB ｀ S NETLIST W/O PIN INFO form.
Alternatively, network and node data comprise in described circuit theory diagrams or the PCB layout figure net table: gauge outfit, relevant circuit theory diagrams with described gauge outfit or PCB layout figure network and node data, described data comprise at least one sublist head, comprise at least two relevant nodes under this sublist head, this network and node data are represented the structure of network.
Preferably, also comprise step: utilize the gauge outfit form to judge instrument and described net sheet format automatically, judge the similarities and differences of network.
Alternatively, the form of network and node data is realized by following program in described circuit theory diagrams and the PCB layout figure net table:
struct detail { char*ping； struct detail*next； }；struct net { char*name； struct net*next； struct detail*daughter； }。
Preferably, described decision circuitry schematic diagram and PCB layout figure described is connected network, and whether identical step comprises: among decision circuitry schematic diagram and the PCB layout figure the identical node that is connected network name with whether identically connect, whether the decision circuitry schematic diagram different with PCB layout figure to be connected all nodes of network name identical with connection if being.
The device of a kind of inspection comparison circuit schematic diagram and PCB (printed substrate) wiring diagram is characterized in that, comprising:
Extraction element is used for extracting finishing circuit schematic diagram and PCB layout figure net table network and node data; With a title that is connected network in the net table that extracts circuit theory diagrams and/or PCB layout figure,
Judgment means is used for judging whether the described connection network title of net table of the circuit theory diagrams of extraction and/or PCB layout figure is identical, and judges whether that all connection networks all compare;
The node comparison means is used for relatively connecting the node data of network;
Tape deck is used to write down judged result and comparative result.
Device of the present invention also can comprise: display unit: be used to show judged result and comparative result.
Preferably, described extraction element comprises the device of the net table that is used for the generative circuit schematic diagram and is used to generate the device of PCB layout figure net table.
Utilize the present invention, can improve the ability of circuit design and making, reduced cost and production time, improved rate of finished products.
Description of drawings
Fig. 1 shows the simplified diagram of the flow process of design circuit schematic diagram and PCB layout figure in the prior art;
Fig. 2 shows the flow chart of the PCB of utilization instrument comparison method of the prior art (checking by network name);
Fig. 3 is the schematic diagram of the netlist data of the circuit theory diagrams of the preferred embodiments of the present invention and PCB layout figure with the tables of data of data structure mode;
Fig. 4 is comparison circuit schematic diagram of the preferred embodiments of the present invention and the flow chart of PCB layout figure.
Embodiment
The present invention mainly comes comparison from node and the network name of circuit theory diagrams and PCB layout figure, the table of net separately by circuit theory diagrams and PCB layout figure carries out, pass through computer realization with simple effective method, netlist data with both is extracted into tables of data with data structure mode earlier, unit of a node, compare by each node again, thereby compare difference under the various situations.
Below in conjunction with drawings and the specific embodiments the present invention is described in further detail.
With reference to Fig. 3, Fig. 3 is the schematic diagram of the netlist data of the circuit theory diagrams of the preferred embodiments of the present invention and PCB layout figure with the tables of data of data structure mode.As shown in the figure, the data structure of this method takes structure to add the chained list mode, the wire net and the node extraction of a net table are organized into double chained list, the main chain table is that network connects, child list is that node connects, wherein each network name is represented with structural table, and the gauge outfit of child list is an attribute of network configuration table.Such data structure can support follow-uply to search fast, compares, reject automatically and data rearrange.
In an embodiment of the present invention, the net table size of considering general circuit figure is generally all below 3M, and internal memory 64M at least usually, and therefore, data are not established temporary on the hard disk, and the storage of data and use and all directly handle in internal memory is with speed up processing.
Fig. 4 is comparison circuit schematic diagram of the preferred embodiments of the present invention and the flow chart of PCB layout figure.Its flow process is: at first divide with the searching more once of network name, if whether identical comparison node again is consistent, and reject from the network chained list, utilize PCB instrument comparative approach before this part has been drawn; And then the network in the tables of data is pressed node relatively, identical node compares other node consistency of this node place network again; With the network filtering of single node, the then expression that all relatively finishes is consistent then, and remaining partly output for difference shows.
Demonstration in the embodiments of the invention comprises:
A. connect network on the schematic diagram and not on PCB layout figure;
B. connect network on PCB layout figure and not on circuit theory diagrams;
C. it is identical but still have part of nodes inconsistent to connect network name;
D. it is inequality but have only the part of nodes unanimity to connect network name.
In the embodiments of the invention, discern different developing instruments and net tableau format automatically according to the gauge outfit pattern, extract data according to different-format again, judgement and extraction are pressed modular manner fully and are formed program, and extensibility is strong.Wherein developing instrument comprise that present Huawei Company uses circuit theory diagrams and PCB layout figure instrument, also contained several general utility tools of industry substantially.Form comprises the net table of all text modes:
A. circuit theory bitmap-format: CAPTURE ｀ S TELESIS, CAPTURE ｀ S PADSPCB, VIEWDRAW FOR ALLEGRO, VIEDRAW FOR PADS, orcad for DOS ' s TELESIS;
B.PCB instrument form: ALLEGRO ｀ S NETIN (NO BACK), seven kinds of forms of POWERPCB ｀ SNETLIST W/O PIN INFO.
Method in the embodiments of the invention realizes by software, utilizes the exploitation with VC (a kind of computer language), and in the operation of Windows interface, dynamic link library (DLL) directly is cured in the program, need not install fully.
Refer again to Fig. 4,, select to obtain net table path by dialog box in step 1.In step 2, the net table is handled and put in order, handle by following data structure;
struct detail { char*ping； struct detail*next； }；Struct net { char*name； Struct net*next； struct detail*daughter； }；
In an embodiment of the present invention, a network " DIN in the circuit theory diagrams net table; J1.9R1004.1 ... " be organized into: " detail XX1 (J1.9, * XX2); DetailXX2 (R1004.1, * XX3); Net X1 (DIN, * X2, * XX1) " form, wherein X is the title that system distributes automatically, XX1, XX2, XX3 etc. form the node subchain under the same connection network; The address of begin chain XX1 again as an attribute be suspended to connect network DIN on, the network X1 of DIN is connected the main chain of network X2 formation connection network with other.Utilize this method, be suitable for program and search and reject identical network fast.
In step 3, more consistent according to each connection network title in two after the arrangement net tables, " DIN " in enforcement of the present invention, arranged in the circuit theory diagrams, need see whether a connection network that is " DIN " is also arranged among the PCB.If have, if do not continue the relatively more next network that connects to step 4.
In step 4, if find the connection network of DIN, if relatively more following again node identical, is then rejected in previous examples, whether comparison circuit schematic diagram and PCB have " J1.9, R1004.1 " unanimity; As find that R1004.1 unanimity, J1.9 just are modified as detail XX1 (J1.9, * XX3), and next connection of expression XX1 is XX3, XX2 just weeds out from chain.
In step 5, judge that all connect network and whether relatively finish, if finish, enter next step, otherwise, repeat above-mentioned steps.
In step 6, get first node that connects in the network and in another net table, compare, in an embodiment of the present invention, the J1.9 of sense circuit schematic diagram sees in which connection network of PCB layout figure in PCB;
In step 7, whether after finding, it is consistent relatively to connect in the network other nodes, and in an embodiment of the present invention, whether the R1004.1 that continues comparison principle figure is in same the connection in the network with J1.9 in PCB.
In step 8, connect network up to all and all relatively finish;
In step 9, will have only the connection network (the empty network that connects) of a node to weed out among circuit theory diagrams or the PCB;
In step 10, judge whether to exist among circuit theory diagrams or the PCB and search network and the node that does not all find through all;
In step 11, the node that ifs circuit schematic diagram or PCB there are differences then shows; Ifs circuit schematic diagram or PCB do not have difference, and showing does not more successfully have difference.In an embodiment of the present invention, the result of output classification is temporarily stored in the text, opens demonstration again after all are relatively finished.In application, also can be designed to use form herein, the figure isotype makes output, so that the more beautiful close friend in interface.
The present invention has realized judging automatically that by the gauge outfit form instrument and the tabular method of net and modularization extract the extensibility of data method.For example: the difference by following gauge outfit realizes that software judges the net sheet format automatically, first character for exist in " $ " and the several leading row "! " be " VIEWDRAW FORALLEGRO " form, starting to " * C " is " POWERPCB ｀ S NETLIST W/O PIN INFO " form.
In an embodiment of the present invention, the device of a kind of inspection comparison circuit schematic diagram and printed substrate (PCB) wiring diagram comprises: extraction element is used for extracting finishing circuit schematic diagram and PCB layout figure net table network and node data; With a title that is connected network in the net table that extracts circuit theory diagrams and/or PCB layout figure, judgment means, whether the described connection network title of net table that is used for judging the circuit theory diagrams of extraction and/or PCB layout figure is identical, and judges whether that all connection networks all compare; The node comparison means is used for relatively connecting the node data of network; Tape deck is used to write down judged result and comparative result.
In an embodiment, also comprise: display unit: be used to show judged result and comparative result.Content displayed comprises in an embodiment:
Connect network on the schematic diagram and not on PCB layout figure;
Connect network on PCB layout figure and not on circuit theory diagrams;
It is identical but still have part of nodes inconsistent to connect network name;
It is inequality but have only the part of nodes unanimity to connect network name.
In an embodiment, extraction element comprises the device of the net table that is used for the generative circuit schematic diagram and is used to generate the device of PCB layout figure net table.
Though described the present invention by embodiment, those of ordinary skills know, the present invention has many distortion and variation and do not break away from spirit of the present invention, wish that appended claim comprises these distortion and variation and do not break away from spirit of the present invention.
Claims (11)
1. the method for inspection comparison circuit schematic diagram and printed substrate (PCB) wiring diagram is characterized in that described method comprises step:
Network and node data in extraction and finishing circuit schematic diagram and the PCB layout figure net table;
A title that connects network in the net table of extraction circuit theory diagrams and/or PCB layout figure;
Judge whether the described connection network title of extracting is identical, and judge according to judged result whether the node data of described extraction is identical.
2. the method for claim 1 is characterized in that, describedly judges according to judged result whether identical step comprises for the node data of described extraction:
If inequality, carry out the step of extracting the title that connects network;
If identical, if the comparison node data identical, are then rejected, if difference, then record;
Judge whether that all connection networks all compare,
If not, return the step of extracting the title that connects network;
If whether decision circuitry schematic diagram and PCB layout figure described is connected network identical, if different, show that circuit theory diagrams and PCB layout figure are variant, if identical, continue to judge whether next connection network is identical, relatively finishes up to whole connection networks.
3. method as claimed in claim 2, it is characterized in that, described decision circuitry schematic diagram and PCB layout figure described is connected network, and whether identical step comprises: the node of first node in the described connection network of sense circuit schematic diagram and PCB layout figure net table relatively, or the node comparison of getting first node and circuit theory diagrams net table in the described connection network of PCB layout figure:
If there is not same node point, the relatively more next network that connects;
If same node point is arranged, relatively whether other nodes are consistent;
If all the node unanimity illustrates that this connection network is identical;
If there is node inconsistent, record and/or the relatively more next network that connects.
4. method as claimed in claim 3 is characterized in that, also comprises step:
Rejecting has only the connection network of a node;
Judge whether to exist through all and search network and the node that does not all find;
If have, record also shows;
If no, show relatively to finish, if all identical, show circuit theory diagrams and
PCB layout figure, otherwise it is different to show that circuit theory diagrams and PCB layout figure have, and record also shows.
5. method as claimed in claim 2 is characterized in that, also comprises step: show according to comparative result: connect network on the circuit theory diagrams and not on PCB layout figure; And/or
Connect network on PCB layout figure and not on circuit theory diagrams; And/or
It is identical but still have part of nodes inconsistent to connect network name; And/or
It is inequality but have only the part of nodes unanimity to connect network name.
6. as the described method of one of claim 1-5, it is characterized in that, network and node data comprise in described circuit theory diagrams or the PCB layout figure net table: gauge outfit, relevant circuit theory diagrams with described gauge outfit or PCB layout figure network and node data, described data comprise at least one sublist head, comprise at least two relevant nodes under this sublist head, this network and node data are represented the structure of network.
7. method as claimed in claim 6 is characterized in that, also comprises step: utilize the gauge outfit form to judge instrument and described net sheet format automatically, judge the similarities and differences of network.
8. the method for claim 1, it is characterized in that, described decision circuitry schematic diagram and PCB layout figure described is connected network, and whether identical step comprises: among decision circuitry schematic diagram and the PCB layout figure the identical node that is connected network name with whether identically connect, whether the decision circuitry schematic diagram different with PCB layout figure to be connected all nodes of network name identical with connection if being.
9. the device of inspection comparison circuit schematic diagram and printed substrate (PCB) wiring diagram is characterized in that, comprising:
Extraction element is used for extracting finishing circuit schematic diagram and PCB layout figure net table network and node data; With a title that is connected network in the net table that extracts circuit theory diagrams and/or PCB layout figure,
Judgment means is used for judging whether the described connection network title of net table of the circuit theory diagrams of extraction and/or PCB layout figure is identical, and judges whether that all connection networks all compare;
The node comparison means is used for relatively connecting the node data of network;
Tape deck is used to write down judged result and comparative result.
10. device as claimed in claim 9 is characterized in that, also comprises: display unit: be used to show judged result and comparative result.
11. device as claimed in claim 10 is characterized in that, described extraction element comprises the device of the net table that is used for the generative circuit schematic diagram and is used to generate the device of PCB layout figure net table.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB03143777XA CN100433953C (en) | 2003-08-05 | 2003-08-05 | Method and device for checking and comparing consistency of circuit schematic diagram and PCB wiring diagram |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB03143777XA CN100433953C (en) | 2003-08-05 | 2003-08-05 | Method and device for checking and comparing consistency of circuit schematic diagram and PCB wiring diagram |
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| Publication Number | Publication Date |
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| CN1582088A true CN1582088A (en) | 2005-02-16 |
| CN100433953C CN100433953C (en) | 2008-11-12 |
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| Application Number | Title | Priority Date | Filing Date |
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| CNB03143777XA Expired - Fee Related CN100433953C (en) | 2003-08-05 | 2003-08-05 | Method and device for checking and comparing consistency of circuit schematic diagram and PCB wiring diagram |
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| CN100461190C (en) * | 2006-05-16 | 2009-02-11 | 英业达股份有限公司 | System and method for wiring realtime interactive printing circuit board |
| CN101267712B (en) * | 2008-04-25 | 2011-07-20 | 中兴通讯股份有限公司 | A processing method for alleviating Galvanic corrosion of PCB board |
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| CN103020357A (en) * | 2012-12-13 | 2013-04-03 | 迈普通信技术股份有限公司 | Checking method and device for circuit network topology matching |
| CN104091161A (en) * | 2014-07-15 | 2014-10-08 | 山东超越数控电子有限公司 | Schematic circuit diagram netlist comparison method |
| CN105335570A (en) * | 2015-11-24 | 2016-02-17 | 深圳市兴森快捷电路科技股份有限公司 | Method for netlist comparison based on connection relationship of pins of components |
| CN105575234A (en) * | 2016-01-19 | 2016-05-11 | 广西职业技术学院 | Encoding method for circuit diagram characteristic string |
| CN106815425A (en) * | 2017-01-12 | 2017-06-09 | 侯海亭 | Multi-layer PCB board fault detection method and system |
| CN107025362A (en) * | 2017-04-28 | 2017-08-08 | 无锡市同步电子科技有限公司 | A kind of method for verifying schematic diagram and PCB creation data uniformity |
| CN112307694A (en) * | 2020-10-16 | 2021-02-02 | 烽火通信科技股份有限公司 | Method and device for comparing difference of circuit schematic diagram |
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| US6778695B1 (en) * | 1999-12-23 | 2004-08-17 | Franklin M. Schellenberg | Design-based reticle defect prioritization |
| TW502191B (en) * | 2000-12-18 | 2002-09-11 | Inst Information Industry | Layout allocation module and the method thereof |
| JP2002251424A (en) * | 2001-02-22 | 2002-09-06 | Nec Corp | Layout design method, device, program and record medium |
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| CN101267712B (en) * | 2008-04-25 | 2011-07-20 | 中兴通讯股份有限公司 | A processing method for alleviating Galvanic corrosion of PCB board |
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| CN102214129B (en) * | 2010-04-06 | 2015-04-15 | 中山市云创知识产权服务有限公司 | System and method for managing internal storage capacity limit test report |
| CN103020357B (en) * | 2012-12-13 | 2016-08-24 | 迈普通信技术股份有限公司 | Circuit network topology matching inspection method and device |
| CN103020357A (en) * | 2012-12-13 | 2013-04-03 | 迈普通信技术股份有限公司 | Checking method and device for circuit network topology matching |
| CN104091161A (en) * | 2014-07-15 | 2014-10-08 | 山东超越数控电子有限公司 | Schematic circuit diagram netlist comparison method |
| CN105335570A (en) * | 2015-11-24 | 2016-02-17 | 深圳市兴森快捷电路科技股份有限公司 | Method for netlist comparison based on connection relationship of pins of components |
| US10592631B2 (en) | 2015-11-24 | 2020-03-17 | Guangzhou Fastprint Circuit Tech Co., Ltd. | Method for performing netlist comparison based on pin connection relationship of components |
| CN105335570B (en) * | 2015-11-24 | 2018-11-06 | 深圳市兴森快捷电路科技股份有限公司 | A method of netlist comparison is carried out based on component pin connection relation |
| CN105575234A (en) * | 2016-01-19 | 2016-05-11 | 广西职业技术学院 | Encoding method for circuit diagram characteristic string |
| CN106815425A (en) * | 2017-01-12 | 2017-06-09 | 侯海亭 | Multi-layer PCB board fault detection method and system |
| CN106815425B (en) * | 2017-01-12 | 2018-04-27 | 侯海亭 | multi-layer PCB board fault detection method and system |
| CN107025362A (en) * | 2017-04-28 | 2017-08-08 | 无锡市同步电子科技有限公司 | A kind of method for verifying schematic diagram and PCB creation data uniformity |
| CN107025362B (en) * | 2017-04-28 | 2020-12-22 | 无锡市同步电子科技有限公司 | Method for checking consistency of schematic diagram and PCB production data |
| CN112307694A (en) * | 2020-10-16 | 2021-02-02 | 烽火通信科技股份有限公司 | Method and device for comparing difference of circuit schematic diagram |
| CN112307694B (en) * | 2020-10-16 | 2022-04-26 | 烽火通信科技股份有限公司 | Method and device for comparing difference of circuit schematic diagram |
| CN114021510A (en) * | 2022-01-05 | 2022-02-08 | 深圳佑驾创新科技有限公司 | Test jig schematic diagram generation method, device, equipment and storage medium |
| CN116011394A (en) * | 2023-01-04 | 2023-04-25 | 之江实验室 | Abnormality detection method, abnormality detection device, abnormality detection equipment and storage medium |
| CN116011394B (en) * | 2023-01-04 | 2023-09-01 | 之江实验室 | Abnormality detection method, abnormality detection device, abnormality detection equipment and storage medium |
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Assignee: Jiangmen Glory Faith PCB Co., Ltd. Assignor: Huawei Technologies Co., Ltd. Contract fulfillment period: 2008.12.10 to 2013.12.9 contract change Contract record no.: 2009440001254 Denomination of invention: Method and device for checking and comparing consistency of circuit schematic diagram and PCB wiring diagram Granted publication date: 20081112 License type: Exclusive license Record date: 2009.8.14 |
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